Arcadia Design Systems
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Arcadia Design Systems Employees
Employee
Years
Job
Industry
Koshi Matsushita Koshi Matsushita's Arcadia Design Systems Experience December 1998 - August 2004
Job Senior Staff Design Consultant at Synopsys
Industry Semiconductors
Experience
Synopsys August 2004 - Present
Toasters R Us Club 2007 - 2013
Arcadia Design Systems December 1998 - August 2004
ASCII Corporation Japan April 1990 - September 1998
Skills
Physical Design, Timing Closure, SoC, EDA, ASIC, Static Timing Analysis, VLSI, Verilog, Digital Signal..., Formal Verification, Logic Synthesis, RTL design, TCL, Low-power Design, Embedded Systems, Functional Verification
Education
Tokyo University of Technology 1986 — 1990
BS, Information Engineering
Synopsys August 2004 - Present
Toasters R Us Club 2007 - 2013
Arcadia Design Systems December 1998 - August 2004
ASCII Corporation Japan April 1990 - September 1998
Skills
Physical Design, Timing Closure, SoC, EDA, ASIC, Static Timing Analysis, VLSI, Verilog, Digital Signal..., Formal Verification, Logic Synthesis, RTL design, TCL, Low-power Design, Embedded Systems, Functional Verification
Education
Tokyo University of Technology 1986 — 1990
BS, Information Engineering
Cheney Gao Cheney Gao's Arcadia Design Systems Experience March 1999 - March 2003
Job Design Engineer at Marvell
Industry Semiconductors
Experience
Marvell June 2006 - Present
Chartered Semiconductor June 2005 - June 2006
Fangtek Inc March 2003 - June 2005
Arcadia Design Systems March 1999 - March 2003
Skills
Integrated Circuit..., ASIC, Logic Design, USB, Static Timing Analysis, Verilog, SoC, Semiconductors, SystemVerilog, RTL design, VLSI, IC, Functional Verification, Mixed Signal, EDA, Timing Closure, Logic Synthesis, Microprocessors, FPGA, RTL Design
Education
Tsinghua University 1900 — 1999
MS, EE
Marvell June 2006 - Present
Chartered Semiconductor June 2005 - June 2006
Fangtek Inc March 2003 - June 2005
Arcadia Design Systems March 1999 - March 2003
Skills
Integrated Circuit..., ASIC, Logic Design, USB, Static Timing Analysis, Verilog, SoC, Semiconductors, SystemVerilog, RTL design, VLSI, IC, Functional Verification, Mixed Signal, EDA, Timing Closure, Logic Synthesis, Microprocessors, FPGA, RTL Design
Education
Tsinghua University 1900 — 1999
MS, EE
Victor Shadan Victor Shadan's Arcadia Design Systems Experience 2001 - 2001
Job MEMS Design Enginner at Qualcomm Innovation Center Inc
Industry Computer Hardware
Experience
Qualcomm Innovation Center Inc June 2011 - Present
IBM 2010 - Present
IEEE 2005 - 2009
Intelleflex Corp. 2008 - 2008
SST Inc. 2006 - 2008
XILINX 2005 - 2006
Broadcom 2005 - 2005
INTEL Corporation. 2001 - 2004
Arcadia Design Systems 2001 - 2001
NEC and SandCraft Inc 1997 - 2000
Skills
Verilog, IC, ASIC, CMOS, Physical Design, Mixed Signal, Circuit Design, SPICE, Semiconductors, LVS, SoC, Microprocessors, Static Timing Analysis, Analog Circuit Design, DRC, Embedded Systems, Signal Integrity, Semiconductor Industry, Computer Architecture, ModelSim, Synopsys Primetime, SRAM, Electronics, Xilinx, Simulations
Education
University of Southern California USC 1977 — 2013
B.S., E.E.
San Jose State University 1966 — 2004
M.S., E.E.
Don Bosco ANDISHEH 1963 — 1965
High School, Math, Physics and Chemistry
Qualcomm Innovation Center Inc June 2011 - Present
IBM 2010 - Present
IEEE 2005 - 2009
Intelleflex Corp. 2008 - 2008
SST Inc. 2006 - 2008
XILINX 2005 - 2006
Broadcom 2005 - 2005
INTEL Corporation. 2001 - 2004
Arcadia Design Systems 2001 - 2001
NEC and SandCraft Inc 1997 - 2000
Skills
Verilog, IC, ASIC, CMOS, Physical Design, Mixed Signal, Circuit Design, SPICE, Semiconductors, LVS, SoC, Microprocessors, Static Timing Analysis, Analog Circuit Design, DRC, Embedded Systems, Signal Integrity, Semiconductor Industry, Computer Architecture, ModelSim, Synopsys Primetime, SRAM, Electronics, Xilinx, Simulations
Education
University of Southern California USC 1977 — 2013
B.S., E.E.
San Jose State University 1966 — 2004
M.S., E.E.
Don Bosco ANDISHEH 1963 — 1965
High School, Math, Physics and Chemistry
Dmitry Mironov's Arcadia Design Systems Experience 1999 - 2000
Job Design Automation Consultant
Industry Computer Software
Experience
Novorado 2012 - Present
Symica 2011 - 2012
Nangate A/S 2005 - 2011
Allied Testing / Charles Schwab 2004 - 2005
AmmoCore Technology 2002 - 2004
Tera Systems 2000 - 2002
Arcadia Design Systems 1999 - 2000
Gambit Automated Design, Synopsys 1993 - 1999
Skills
C++, Microchip PIC, Cygwin, GCC, TCL, PHP, MySQL, PCB design, Shell Scripting, Qt, MFC, OWL, ASIC, Layout Tools, HFSS, matlab, CadSoft Eagle, Antennas, LT Spice, SoC, EDA, Hardware, CAM350, Algorithms, Microcontrollers, Electronics, Simulations
Education
Moscow Institute of Electronic Technology (Technical University) (MIET) 1991 — 1997
MS CS/EE, studied semiconductor physics, methods and algorithms of VLSI CAD
Novorado 2012 - Present
Symica 2011 - 2012
Nangate A/S 2005 - 2011
Allied Testing / Charles Schwab 2004 - 2005
AmmoCore Technology 2002 - 2004
Tera Systems 2000 - 2002
Arcadia Design Systems 1999 - 2000
Gambit Automated Design, Synopsys 1993 - 1999
Skills
C++, Microchip PIC, Cygwin, GCC, TCL, PHP, MySQL, PCB design, Shell Scripting, Qt, MFC, OWL, ASIC, Layout Tools, HFSS, matlab, CadSoft Eagle, Antennas, LT Spice, SoC, EDA, Hardware, CAM350, Algorithms, Microcontrollers, Electronics, Simulations
Education
Moscow Institute of Electronic Technology (Technical University) (MIET) 1991 — 1997
MS CS/EE, studied semiconductor physics, methods and algorithms of VLSI CAD
Jan Gasperetti's Arcadia Design Systems Experience 2000 - 2002
Job Professional Relaxer at Permanently Retired
Industry Computer Software
Experience
Permanently Retired July 2014 - Present
Finjan Holdings, Inc. April 2013 - July 2014
Finjan January 2013 - April 2013
Finjan, Inc. May 2003 - December 2009
Arcadia Design Systems 2000 - 2002
Zen Research 1998 - 2000
Quality Semiconductor 1997 - 1998
DSP Group 1996 - 1997
Wesgo 1992 - 1996
Ipsen Industries 1980 - 1983
Skills
Professional Services
Education
Northwestern University
BA, Accounting, Finance
Permanently Retired July 2014 - Present
Finjan Holdings, Inc. April 2013 - July 2014
Finjan January 2013 - April 2013
Finjan, Inc. May 2003 - December 2009
Arcadia Design Systems 2000 - 2002
Zen Research 1998 - 2000
Quality Semiconductor 1997 - 1998
DSP Group 1996 - 1997
Wesgo 1992 - 1996
Ipsen Industries 1980 - 1983
Skills
Professional Services
Education
Northwestern University
BA, Accounting, Finance
Ng, Shunyee Frank's Arcadia Design Systems Experience 1998 - 2000
Job Principal Engineer at Samsung Semiconductor, Inc.
Industry Wireless
Experience
Samsung Semiconductor, Inc. November 2013 - Present
Qualcomm.com October 2004 - November 2013
Memec Design 2000 - 2003
Arcadia Design Systems 1998 - 2000
Education
University of California, Los Angeles
MSEE
Samsung Semiconductor, Inc. November 2013 - Present
Qualcomm.com October 2004 - November 2013
Memec Design 2000 - 2003
Arcadia Design Systems 1998 - 2000
Education
University of California, Los Angeles
MSEE
Jie Shen's Arcadia Design Systems Experience January 1999 - March 2001
Job Sr. Principal System Architect at OmniVision Technologies, Inc.
Industry Semiconductors
Experience
OmniVision Technologies, Inc. June 2013 - Present
Altera July 2012 - May 2013
Rambus May 2003 - July 2012
Mindspeed Technologies March 2001 - April 2003
Arcadia Design Systems January 1999 - March 2001
Skills
SERDES, Mixed Signal, RTL design, CMOS, SoC, IC, Verilog, VLSI, EDA, Analog, Static Timing Analysis, FPGA, ASIC, Cadence Virtuoso, RTL Design, Analog Circuit Design, Semiconductors
Education
Tsinghua University 1987 — 1998
Ph.D, EE
Bayi
OmniVision Technologies, Inc. June 2013 - Present
Altera July 2012 - May 2013
Rambus May 2003 - July 2012
Mindspeed Technologies March 2001 - April 2003
Arcadia Design Systems January 1999 - March 2001
Skills
SERDES, Mixed Signal, RTL design, CMOS, SoC, IC, Verilog, VLSI, EDA, Analog, Static Timing Analysis, FPGA, ASIC, Cadence Virtuoso, RTL Design, Analog Circuit Design, Semiconductors
Education
Tsinghua University 1987 — 1998
Ph.D, EE
Bayi
Norman Wu, CPA's Arcadia Design Systems Experience 1999 - 2000
Job Senior Associate at PwC
Industry Accounting
Experience
PwC September 2011 - Present
AMCC August 2006 - February 2009
Faraday Technology Corporation 2004 - 2006
Cisco 2000 - 2003
Arcadia Design Systems 1999 - 2000
Rise Technology 1991 - 1999
Education
San Jose State University 2010 — 2011
Master of Science (M.S.), Accountancy
UC Berkeley 1987 — 1991
BS, Electrical Engineering and Computer Science
PwC September 2011 - Present
AMCC August 2006 - February 2009
Faraday Technology Corporation 2004 - 2006
Cisco 2000 - 2003
Arcadia Design Systems 1999 - 2000
Rise Technology 1991 - 1999
Education
San Jose State University 2010 — 2011
Master of Science (M.S.), Accountancy
UC Berkeley 1987 — 1991
BS, Electrical Engineering and Computer Science
Guangjun Shen's Arcadia Design Systems Experience April 2003 - February 2005
Job RF SoC design
Industry Semiconductors
Experience
SomeWhere October 2010 - Present
OmniVision February 2005 - October 2010
Arcadia Design Systems April 2003 - February 2005
Huawei March 2001 - April 2003
Skills
SoC, Verilog, FPGA, ASIC, RTL design, VLSI, IC, Static Timing Analysis, Logic Synthesis, Mixed Signal, TCL, SystemVerilog, Functional Verification, Semiconductors, EDA, RTL coding, Cadence Virtuoso, Integrated Circuit..., Analog Circuit Design, CMOS, Spectre, RF, VHDL, Formal Verification, Simulations, Low-power Design, Firmware, Timing Closure, DFT, SERDES, Digital Signal..., Cadence, Logic Design, Primetime, PCIe, Computer Architecture, PLL, Physical Design, DRC, Embedded Systems, Perl, ATPG, NCSim, Processors, SPICE, Analog, AMBA AHB, Debugging, Hardware Architecture, Circuit Design
Education
University of Electronic Science and Technology 1998 — 2001
Master, Communication and information
Southwest Jiaotong University 1994 — 1998
Bachelor, Applied Electoric
SomeWhere October 2010 - Present
OmniVision February 2005 - October 2010
Arcadia Design Systems April 2003 - February 2005
Huawei March 2001 - April 2003
Skills
SoC, Verilog, FPGA, ASIC, RTL design, VLSI, IC, Static Timing Analysis, Logic Synthesis, Mixed Signal, TCL, SystemVerilog, Functional Verification, Semiconductors, EDA, RTL coding, Cadence Virtuoso, Integrated Circuit..., Analog Circuit Design, CMOS, Spectre, RF, VHDL, Formal Verification, Simulations, Low-power Design, Firmware, Timing Closure, DFT, SERDES, Digital Signal..., Cadence, Logic Design, Primetime, PCIe, Computer Architecture, PLL, Physical Design, DRC, Embedded Systems, Perl, ATPG, NCSim, Processors, SPICE, Analog, AMBA AHB, Debugging, Hardware Architecture, Circuit Design
Education
University of Electronic Science and Technology 1998 — 2001
Master, Communication and information
Southwest Jiaotong University 1994 — 1998
Bachelor, Applied Electoric
Hau-Yung Chen's Arcadia Design Systems Experience May 1995 - October 1998
Job Tech Junkie
Industry
Experience
Springsoft, USA August 2008 - October 2012
Silicon Canvas, Inc. January 2001 - August 2008
Arcadia Design Systems May 1995 - October 1998
Education
University of Illinois at Urbana-Champaign
Doctor of Philosophy (Ph.D.), EE
Springsoft, USA August 2008 - October 2012
Silicon Canvas, Inc. January 2001 - August 2008
Arcadia Design Systems May 1995 - October 1998
Education
University of Illinois at Urbana-Champaign
Doctor of Philosophy (Ph.D.), EE