ASIC North
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ASIC North Employees
Employee
Years
Job
Industry
Adam Pasternak Adam Pasternak's ASIC North Experience Physical Verification/CAD EngineerIBMJune 2003 - April 2014
Job Electrical & Electronics Engineer
Industry Electrical/Electronic Manufacturing
Experience
ASIC North Physical Verification/CAD EngineerIBMJune 2003 - April 2014
Skills
Perl, Embedded Systems, Software Engineering, Unix, Software Development, Semiconductors, Linux, C, Integrated Circuit..., Analog Circuit Design, Technical Documentation, International Relations, Test Engineering, Test Automation, Perl Automation, Mentor Graphics, Synopsis, EAGLE Cad, Altium Designer
Education
Rensselaer Polytechnic Institute 1998 — 2003
Bachelor's Degree, Electrical Engineering (minor in electronic arts)
Rensselaer Polytechnic Institute
ASIC North Physical Verification/CAD EngineerIBMJune 2003 - April 2014
Skills
Perl, Embedded Systems, Software Engineering, Unix, Software Development, Semiconductors, Linux, C, Integrated Circuit..., Analog Circuit Design, Technical Documentation, International Relations, Test Engineering, Test Automation, Perl Automation, Mentor Graphics, Synopsis, EAGLE Cad, Altium Designer
Education
Rensselaer Polytechnic Institute 1998 — 2003
Bachelor's Degree, Electrical Engineering (minor in electronic arts)
Rensselaer Polytechnic Institute
Howard Druckerman Howard Druckerman's ASIC North Experience 2013 - Present
Job VLSI Design for Test (DFT) | Scan | LBIST | MBIST | AtSpeed | Analog Testing | Handson Debug
Industry Computer Hardware
Experience
ASIC North 2013 - Present
Northstar Fireworks December 2009 - Present
IBM 2004 - 2013
IBM 1992 - 2004
Skills
Integration, Testing, Unix, Software Development, Java, MySQL, Linux, Software Engineering, ClearCase, Perl, Embedded Systems, Databases, Shell Scripting, Debugging, C++, Solution Architecture, Verilog, Visual Basic, Programming, C, JavaScript, System Architecture, Test Automation, Explosives, VLSI, Design for Test, Test Development, TCL, CMOS, Analog, DFT
Education
Syracuse University
Master of Science (MS), Computer Engineering
Syracuse University
Bachelor of Science (BS), Electrical Engineering, cum laude
Ketcham HS
NYS Regents Diploma, Math, Science, English, Social Studies, and German
ASIC North 2013 - Present
Northstar Fireworks December 2009 - Present
IBM 2004 - 2013
IBM 1992 - 2004
Skills
Integration, Testing, Unix, Software Development, Java, MySQL, Linux, Software Engineering, ClearCase, Perl, Embedded Systems, Databases, Shell Scripting, Debugging, C++, Solution Architecture, Verilog, Visual Basic, Programming, C, JavaScript, System Architecture, Test Automation, Explosives, VLSI, Design for Test, Test Development, TCL, CMOS, Analog, DFT
Education
Syracuse University
Master of Science (MS), Computer Engineering
Syracuse University
Bachelor of Science (BS), Electrical Engineering, cum laude
Ketcham HS
NYS Regents Diploma, Math, Science, English, Social Studies, and German
Terry Keim Terry Keim's ASIC North Experience August 2013 - Present
Job Circuit Design Engineer at ASIC North
Industry Information Technology and Services
Experience
ASIC North August 2013 - Present
IBM March 1996 - July 2013
Skills
Testing, Unix, Physical Design, Cadence, Simulations, Electrical Engineering, Circuit Design, Cadence Virtuoso XL, Performance Tuning, Layout, SPICE, ASIC, Memory, Compilers, Electronics, Linux, C++, Perl, Digital Circuit Design, Monte Carlo Simulation, Circuit Analysis, Troubleshooting, Multi Tasking, Microsoft Office, Microsoft Excel, Microsoft Word, Lotus 123, CAD, PowerPoint, Windows 7, DRC, LVS, Windows, Debugging, Static Timing Analysis, Verilog, Semiconductors, EDA, Timing Closure, Logic Design, Hardware Architecture, AIX, Microprocessors, Computer Architecture, Cadence Virtuoso, Functional Verification, IC, Processors
Education
SUNY New Paltz
Bachelor of Applied Science (B.A.Sc.), Electrical and Electronics Engineering
Dutchess Community College
none - part time
ITT Technical Institute-Fort Wayne
Associate of Science (A.S.), Electrical and Electronics Engineering
Fairfield High School
ASIC North August 2013 - Present
IBM March 1996 - July 2013
Skills
Testing, Unix, Physical Design, Cadence, Simulations, Electrical Engineering, Circuit Design, Cadence Virtuoso XL, Performance Tuning, Layout, SPICE, ASIC, Memory, Compilers, Electronics, Linux, C++, Perl, Digital Circuit Design, Monte Carlo Simulation, Circuit Analysis, Troubleshooting, Multi Tasking, Microsoft Office, Microsoft Excel, Microsoft Word, Lotus 123, CAD, PowerPoint, Windows 7, DRC, LVS, Windows, Debugging, Static Timing Analysis, Verilog, Semiconductors, EDA, Timing Closure, Logic Design, Hardware Architecture, AIX, Microprocessors, Computer Architecture, Cadence Virtuoso, Functional Verification, IC, Processors
Education
SUNY New Paltz
Bachelor of Applied Science (B.A.Sc.), Electrical and Electronics Engineering
Dutchess Community College
none - part time
ITT Technical Institute-Fort Wayne
Associate of Science (A.S.), Electrical and Electronics Engineering
Fairfield High School
Martin Lundberg Martin Lundberg's ASIC North Experience September 2013 - Present
Job Circuit Design Engineer at ASIC North, Inc.
Industry Semiconductors
Experience
ASIC North September 2013 - Present
Skills
Circuit Design, Analog Circuit Design, Mixed-Signal IC Design, Power Electronics, Power Supplies, ESD control, Motor Control, Integrated Circuit..., IC, CMOS, Analog, Testing
Education
Georgia Tech
Bachelor of Electrical Engineering (BEE), Electrical and Electronics Engineering
University of Kentucky
Master of Science (MSEE), Electrical and Electronics Engineering
ASIC North September 2013 - Present
Skills
Circuit Design, Analog Circuit Design, Mixed-Signal IC Design, Power Electronics, Power Supplies, ESD control, Motor Control, Integrated Circuit..., IC, CMOS, Analog, Testing
Education
Georgia Tech
Bachelor of Electrical Engineering (BEE), Electrical and Electronics Engineering
University of Kentucky
Master of Science (MSEE), Electrical and Electronics Engineering
Steven Hoggarth Steven Hoggarth's ASIC North Experience May 2012 - Present
Job Senior Analog IC Designer at ASIC North
Industry Semiconductors
Experience
ASIC North May 2012 - Present
CSR (formerly Zoran/Microtune) February 2005 - December 2011
Freescale Semiconductor January 2004 - February 2005
Motorola Solutions January 1994 - January 2003
Skills
Analog Circuit Design, Analog to Digital..., Opamp Design, Digital to Analog..., Analog, Opamp
Education
University of Florida 1995 — 1997
University of Michigan 1990 — 1994
BS, EE
ASIC North May 2012 - Present
CSR (formerly Zoran/Microtune) February 2005 - December 2011
Freescale Semiconductor January 2004 - February 2005
Motorola Solutions January 1994 - January 2003
Skills
Analog Circuit Design, Analog to Digital..., Opamp Design, Digital to Analog..., Analog, Opamp
Education
University of Florida 1995 — 1997
University of Michigan 1990 — 1994
BS, EE
Robert Bramley Robert Bramley's ASIC North Experience October 2013 - Present
Job ASIC Product Test Engineer at ASIC North
Industry Information Technology and Services
Experience
ASIC North October 2013 - Present
IBM Micro Electronics - Vermont September 2000 - May 2013
General Dynamics January 1995 - August 2000
Skills
Testing, Electronics, Semiconductors, ASIC, Failure Analysis, Data Analysis, Quality Assurance, Requirements Analysis, Test Planning, Quality Center, Test Automation, Business Analysis, Project Management, Process Improvement, Manual Testing, Electrical Engineering, Power Electronics, Manufacturing..., Electrical Safety, Electrical Controls, UL, EMI, Integration, Hardware Architecture, CMOS
Education
State University of New York at Buffalo
ASIC North October 2013 - Present
IBM Micro Electronics - Vermont September 2000 - May 2013
General Dynamics January 1995 - August 2000
Skills
Testing, Electronics, Semiconductors, ASIC, Failure Analysis, Data Analysis, Quality Assurance, Requirements Analysis, Test Planning, Quality Center, Test Automation, Business Analysis, Project Management, Process Improvement, Manual Testing, Electrical Engineering, Power Electronics, Manufacturing..., Electrical Safety, Electrical Controls, UL, EMI, Integration, Hardware Architecture, CMOS
Education
State University of New York at Buffalo
Stan Bush Stan Bush's ASIC North Experience June 2008 - Present
Job Senior ASIC Design Engineer at ASIC North
Industry Semiconductors
Experience
ASIC North June 2008 - Present
Andigilog Inc. March 2005 - April 2008
Freescale Semiconductor 2000 - 2005
Motorola Semiconductor 2000 - 2005
Freescale 2000 - 2005
Motorola 1981 - 2005
Motorola GEG 1982 - 2000
Motorola Government Electronics Group 1982 - 1999
Skills
BIST, Compilers, Synopsys tools, SoC, ASIC, Timing Closure, Verilog, DFT, RTL design, Static Timing Analysis, IC, Logic Synthesis, TCL, Analog, Analog Circuit Design, CMOS, Cadence, Cadence Virtuoso, Circuit Design, DRC, Debugging, Digital Electronics, Digital Signal..., EDA, FPGA, Floorplanning, Hardware, Integrated Circuit..., LVS, Logic Design, Low-power Design, Mixed Signal, ModelSim, NCSim, PLL, Physical Design, Power Management, RTL Design, RTL coding, Primetime, Semiconductors, SystemVerilog, Testing, Timing, VLSI, VHDL
Education
New Mexico State University 1978 — 1981
New Mexico Military Institute 1976 — 1978
AA
ASIC North June 2008 - Present
Andigilog Inc. March 2005 - April 2008
Freescale Semiconductor 2000 - 2005
Motorola Semiconductor 2000 - 2005
Freescale 2000 - 2005
Motorola 1981 - 2005
Motorola GEG 1982 - 2000
Motorola Government Electronics Group 1982 - 1999
Skills
BIST, Compilers, Synopsys tools, SoC, ASIC, Timing Closure, Verilog, DFT, RTL design, Static Timing Analysis, IC, Logic Synthesis, TCL, Analog, Analog Circuit Design, CMOS, Cadence, Cadence Virtuoso, Circuit Design, DRC, Debugging, Digital Electronics, Digital Signal..., EDA, FPGA, Floorplanning, Hardware, Integrated Circuit..., LVS, Logic Design, Low-power Design, Mixed Signal, ModelSim, NCSim, PLL, Physical Design, Power Management, RTL Design, RTL coding, Primetime, Semiconductors, SystemVerilog, Testing, Timing, VLSI, VHDL
Education
New Mexico State University 1978 — 1981
New Mexico Military Institute 1976 — 1978
AA
Carl Ashley Carl Ashley's ASIC North Experience November 2014 - Present
Job System Verification Engineer at ASIC North
Industry Computer Hardware
Experience
ASIC North November 2014 - Present
Verification and Design Professional Engineer August 2013 - Present
IBM April 2001 - July 2013
IBM May 1999 - April 2001
IBM September 1996 - April 1999
IBM May 1995 - August 1996
IBM June 1994 - May 1995
IBM May 1993 - June 1994
IBM August 1991 - April 1993
IBM June 1981 - August 1991
Skills
ASIC, Functional Verification, Microprocessors, PCIe, Firmware, Infiniband, Team Leadership, Virtual Teams, Collaborative, Debugging, Processors, Verilog, Hardware, Computer Architecture, C, Testing, VLSI, EDA, Hardware Architecture, Logic Design, SoC, TCL, Static Timing Analysis, FPGA, CMOS, Simulations, High Performance..., SystemVerilog, RTL design, X86, IC, Perl, Embedded Systems, Semiconductors, ModelSim, Timing Closure, Integrated Circuit..., Thought Leadership, IO Design, Verification, Linux, Mentoring, C++, VHDL, Customer Engagement
Education
University of Central Florida 1975 — 1981
Bachelor of Science (BS), Electrical Engineering
University of Florida 1977 — 1978
ASIC North November 2014 - Present
Verification and Design Professional Engineer August 2013 - Present
IBM April 2001 - July 2013
IBM May 1999 - April 2001
IBM September 1996 - April 1999
IBM May 1995 - August 1996
IBM June 1994 - May 1995
IBM May 1993 - June 1994
IBM August 1991 - April 1993
IBM June 1981 - August 1991
Skills
ASIC, Functional Verification, Microprocessors, PCIe, Firmware, Infiniband, Team Leadership, Virtual Teams, Collaborative, Debugging, Processors, Verilog, Hardware, Computer Architecture, C, Testing, VLSI, EDA, Hardware Architecture, Logic Design, SoC, TCL, Static Timing Analysis, FPGA, CMOS, Simulations, High Performance..., SystemVerilog, RTL design, X86, IC, Perl, Embedded Systems, Semiconductors, ModelSim, Timing Closure, Integrated Circuit..., Thought Leadership, IO Design, Verification, Linux, Mentoring, C++, VHDL, Customer Engagement
Education
University of Central Florida 1975 — 1981
Bachelor of Science (BS), Electrical Engineering
University of Florida 1977 — 1978
Kevin Grosselfinger Kevin Grosselfinger's ASIC North Experience January 2011 - Present
Job ASIC North ASIC Design Manager
Industry Semiconductors
Experience
ASIC North January 2011 - Present
IBM February 2004 - January 2011
IBM April 2002 - February 2004
IBM August 2000 - April 2002
IBM June 1996 - August 2000
Skills
ASIC, EDA, Mixed Signal, Physical Design, Semiconductors, Analog, VLSI, Simulations, Low-power Design, Testing, IC, Static Timing Analysis, CMOS, TCL, Circuit Design, SoC, Verilog, RTL design, Timing Closure, Functional Verification, Integrated Circuit..., Microprocessors, Cadence Virtuoso, Processors, Logic Design, Analog Circuit Design, LVS, Logic Synthesis, Cadence, Signal Integrity, Debugging, Silicon, Perl, Computer Architecture, Formal Verification, Embedded Systems, SPICE, DFT, Hardware Architecture, DRC, Physical Verification, VHDL, RTL coding, ModelSim
Education
National Technological University 1998 — 2002
Masters, Electrical Engineering
Alfred University 1992 — 1996
Bachelors, Electrical Engineering
Suffern High School
ASIC North January 2011 - Present
IBM February 2004 - January 2011
IBM April 2002 - February 2004
IBM August 2000 - April 2002
IBM June 1996 - August 2000
Skills
ASIC, EDA, Mixed Signal, Physical Design, Semiconductors, Analog, VLSI, Simulations, Low-power Design, Testing, IC, Static Timing Analysis, CMOS, TCL, Circuit Design, SoC, Verilog, RTL design, Timing Closure, Functional Verification, Integrated Circuit..., Microprocessors, Cadence Virtuoso, Processors, Logic Design, Analog Circuit Design, LVS, Logic Synthesis, Cadence, Signal Integrity, Debugging, Silicon, Perl, Computer Architecture, Formal Verification, Embedded Systems, SPICE, DFT, Hardware Architecture, DRC, Physical Verification, VHDL, RTL coding, ModelSim
Education
National Technological University 1998 — 2002
Masters, Electrical Engineering
Alfred University 1992 — 1996
Bachelors, Electrical Engineering
Suffern High School
Chris Scoville Chris Scoville's ASIC North Experience July 2007 - October 2010
Job Electrical Engineer
Industry Electrical/Electronic Manufacturing
Experience
BAMC October 2010 - May 2014
ASIC North July 2007 - October 2010
IBM Microelectronics June 1998 - July 2007
Education
Rensselaer Polytechnic Institute 1994 — 1998
MS, BS, Electrical Engineering
BAMC October 2010 - May 2014
ASIC North July 2007 - October 2010
IBM Microelectronics June 1998 - July 2007
Education
Rensselaer Polytechnic Institute 1994 — 1998
MS, BS, Electrical Engineering
Ali Gorji Ali Gorji's ASIC North Experience May 2015 - Present
Job Staff Circuit Design Engineer
Industry Semiconductors
Experience
ASIC North May 2015 - Present
McGill University January 2009 - December 2014
ASIC North February 2011 - December 2013
Skills
Analog Circuit Design, CMOS, Mixed Signal, VLSI, Signal Processing, Cadence Virtuoso, Circuit Design, Verilog, Algorithms, Matlab, Simulations, VHDL, LaTeX, C++, Image Processing, IC, Analog, Simulink, Integrated Circuit..., Programming, Characterization
Education
McGill University
University of Alberta
Concordia University
ASIC North May 2015 - Present
McGill University January 2009 - December 2014
ASIC North February 2011 - December 2013
Skills
Analog Circuit Design, CMOS, Mixed Signal, VLSI, Signal Processing, Cadence Virtuoso, Circuit Design, Verilog, Algorithms, Matlab, Simulations, VHDL, LaTeX, C++, Image Processing, IC, Analog, Simulink, Integrated Circuit..., Programming, Characterization
Education
McGill University
University of Alberta
Concordia University
Richard (Dick) Jordan Richard (Dick) Jordan's ASIC North Experience August 2012 - Present
Job Computer Hardware Professional
Industry Computer Hardware
Experience
ASIC North August 2012 - Present
IBM July 2009 - July 2012
IBM February 2002 - February 2009
IBM February 1997 - February 2002
IBM June 1994 - February 1997
IBM April 1993 - June 1994
IBM February 1988 - April 1993
Skills
ASIC, IC, Physical Design, Mixed Signal, CMOS, Skill Coding, Design Environment..., Simulations, Semiconductors, Static Timing Analysis, Cadence Virtuoso, TCL, Analog, Circuit Design, SPICE, Signal Integrity, Perl, Logic Design, DRC, Cadence, Microprocessors, Spectre, Testing, PCB design, LVS, VLSI, SoC, EDA, Verilog, Functional Verification, Analog Circuit Design, VHDL, Timing Closure, SystemVerilog, RTL design, Integrated Circuit...
Education
University of Toledo 1985 — 1988
Masters of Science, Electrical Engineering
University of Mount Union 1981 — 1985
Bachelor or Science, Major in Physics & Math w/ Minor in Computer Science
ASIC North August 2012 - Present
IBM July 2009 - July 2012
IBM February 2002 - February 2009
IBM February 1997 - February 2002
IBM June 1994 - February 1997
IBM April 1993 - June 1994
IBM February 1988 - April 1993
Skills
ASIC, IC, Physical Design, Mixed Signal, CMOS, Skill Coding, Design Environment..., Simulations, Semiconductors, Static Timing Analysis, Cadence Virtuoso, TCL, Analog, Circuit Design, SPICE, Signal Integrity, Perl, Logic Design, DRC, Cadence, Microprocessors, Spectre, Testing, PCB design, LVS, VLSI, SoC, EDA, Verilog, Functional Verification, Analog Circuit Design, VHDL, Timing Closure, SystemVerilog, RTL design, Integrated Circuit...
Education
University of Toledo 1985 — 1988
Masters of Science, Electrical Engineering
University of Mount Union 1981 — 1985
Bachelor or Science, Major in Physics & Math w/ Minor in Computer Science
Steven P. Koch Steven P. Koch's ASIC North Experience July 2013 - Present
Job Senior Physical Design Engineer at ASIC North
Industry Computer Hardware
Experience
ASIC North July 2013 - Present
ASIC North January 2008 - Present
Infineon Technologies (and spinoff to Qimonda) December 2003 - January 2008
ASIC North July 2002 - December 2003
IBM July 1984 - July 2002
Skills
Physical Design, Floorplanning, EDA, Perl, IC, ASIC, Layout, CMOS, DRAM, Virtuoso Layout Editor, Unix Shell Scripting, Mask Design, DRC, LVS, Mixed Signal, Physical Verification, Cadence Virtuoso, Virtuoso, Semiconductors, Microprocessors, Analog, Parasitic Extraction, Low-power Design, Power Management, SPICE, Cadence, Circuit Design, VLSI
Education
University of Vermont 1996 — 1997
Computer Engineering
SUNY at New Paltz 1990 — 1992
Electrical Engineering
Brooklyn Polytechnic University 1985 — 1987
Electrical Engineering
National Institue of Technology 1982 — 1984
Associates, Electronic Engineering Technology
Oakland Community College 1980 — 1982
AA, Liberal Arts
ASIC North July 2013 - Present
ASIC North January 2008 - Present
Infineon Technologies (and spinoff to Qimonda) December 2003 - January 2008
ASIC North July 2002 - December 2003
IBM July 1984 - July 2002
Skills
Physical Design, Floorplanning, EDA, Perl, IC, ASIC, Layout, CMOS, DRAM, Virtuoso Layout Editor, Unix Shell Scripting, Mask Design, DRC, LVS, Mixed Signal, Physical Verification, Cadence Virtuoso, Virtuoso, Semiconductors, Microprocessors, Analog, Parasitic Extraction, Low-power Design, Power Management, SPICE, Cadence, Circuit Design, VLSI
Education
University of Vermont 1996 — 1997
Computer Engineering
SUNY at New Paltz 1990 — 1992
Electrical Engineering
Brooklyn Polytechnic University 1985 — 1987
Electrical Engineering
National Institue of Technology 1982 — 1984
Associates, Electronic Engineering Technology
Oakland Community College 1980 — 1982
AA, Liberal Arts
Mudit Gupta Mudit Gupta's ASIC North Experience January 2011 - May 2011
Job Analog Design Engineer at Microchip Technology
Industry Semiconductors
Experience
Microchip Technology August 2013 - Present
Microchip Technology June 2011 - Present
ASIC North January 2011 - May 2011
School of Electrical Engineering August 2009 - May 2011
Maxim Integrated Products May 2010 - August 2010
Texas Instruments July 2008 - December 2008
Reliance Energy Limited May 2006 - July 2006
Skills
Analog, Verilog, Cadence Virtuoso, Mixed Signal, Integrated Circuit..., Functional Verification, Algorithms, Cadence Spectre, Calibre DRC and LVS, Hspice, Finesim, Physical Design, ASIC, SPICE, IC, Low-power Design
Education
Arizona State University 2009 — 2011
Master's, Electronic Circuits and Mixed Signal Design
Birla Institute of Technology and Science 2005 — 2009
B.E, Electronics and Instrumentation
Bal Bharati Public School 1991 — 2005
Microchip Technology August 2013 - Present
Microchip Technology June 2011 - Present
ASIC North January 2011 - May 2011
School of Electrical Engineering August 2009 - May 2011
Maxim Integrated Products May 2010 - August 2010
Texas Instruments July 2008 - December 2008
Reliance Energy Limited May 2006 - July 2006
Skills
Analog, Verilog, Cadence Virtuoso, Mixed Signal, Integrated Circuit..., Functional Verification, Algorithms, Cadence Spectre, Calibre DRC and LVS, Hspice, Finesim, Physical Design, ASIC, SPICE, IC, Low-power Design
Education
Arizona State University 2009 — 2011
Master's, Electronic Circuits and Mixed Signal Design
Birla Institute of Technology and Science 2005 — 2009
B.E, Electronics and Instrumentation
Bal Bharati Public School 1991 — 2005
rachel eberle rachel eberle's ASIC North Experience April 2015 - Present
Job computer engineer
Industry Computer Hardware
Experience
ASIC North April 2015 - Present
IBM July 2001 - June 2011
Improv Systems September 2000 - November 2000
Skills
Linux, Unix, C, Testing, Embedded Systems, VHDL, Java, Perl, Hardware, Debugging, Integration, Software Development, C++, Verilog, VLSI, Simulations, Computer Architecture, Hardware Architecture, ASIC, Office Administration
Education
Rochester Institute of Technology 1996 — 2001
Bachelor of Science (BS), Computer Engineering
Wilson Magnet High School 1992 — 1996
ASIC North April 2015 - Present
IBM July 2001 - June 2011
Improv Systems September 2000 - November 2000
Skills
Linux, Unix, C, Testing, Embedded Systems, VHDL, Java, Perl, Hardware, Debugging, Integration, Software Development, C++, Verilog, VLSI, Simulations, Computer Architecture, Hardware Architecture, ASIC, Office Administration
Education
Rochester Institute of Technology 1996 — 2001
Bachelor of Science (BS), Computer Engineering
Wilson Magnet High School 1992 — 1996
Suzanne Ruiz-Monazzami Suzanne Ruiz-Monazzami's ASIC North Experience December 2012 - March 2013
Job President / Sr. IC Layout Designer at ICMagicLLC
Industry Semiconductors
Experience
ICMagicLLC September 2006 - Present
HRL Laboratories March 2013 - Present
ASIC North December 2012 - March 2013
HRL Laboratories September 2011 - December 2012
ViaSat December 2010 - September 2011
Qualcomm November 2009 - November 2010
Directions Engineering November 2005 - August 2008
S5 Wireless 2008 - 2008
IC Power 2006 - 2007
Airgo Networks 2006 - 2006
Skills
Cadence Virtuoso, Floorplanning, LVS, Hercules, Linux, Planning, IC, RF, BiCMOS, PLL, CMOS, Mixed Signal, DRC, Semiconductors, Analog, Physical Verification, Physical Design, Project Management, Analog Circuit Design, Power Management, ASIC, Debugging, PCB design, Electronics, Virtuoso, EDA, Cadence, VLSI, Circuit Design, Integrated Circuit..., IC layout, Microprocessors, SoC, VCO, FPGA, Silicon, MEMS, Low-power Design, Semiconductor Industry, IC Layout, PCB Design
Education
University of Phoenix 2005 — 2007
Bachelors
Pima Community College 1993 — 1995
None
Eastern Arizona College 1984 — 1986
Associates
ICMagicLLC September 2006 - Present
HRL Laboratories March 2013 - Present
ASIC North December 2012 - March 2013
HRL Laboratories September 2011 - December 2012
ViaSat December 2010 - September 2011
Qualcomm November 2009 - November 2010
Directions Engineering November 2005 - August 2008
S5 Wireless 2008 - 2008
IC Power 2006 - 2007
Airgo Networks 2006 - 2006
Skills
Cadence Virtuoso, Floorplanning, LVS, Hercules, Linux, Planning, IC, RF, BiCMOS, PLL, CMOS, Mixed Signal, DRC, Semiconductors, Analog, Physical Verification, Physical Design, Project Management, Analog Circuit Design, Power Management, ASIC, Debugging, PCB design, Electronics, Virtuoso, EDA, Cadence, VLSI, Circuit Design, Integrated Circuit..., IC layout, Microprocessors, SoC, VCO, FPGA, Silicon, MEMS, Low-power Design, Semiconductor Industry, IC Layout, PCB Design
Education
University of Phoenix 2005 — 2007
Bachelors
Pima Community College 1993 — 1995
None
Eastern Arizona College 1984 — 1986
Associates
Jounghyuk (Junghyuk) Suh Jounghyuk (Junghyuk) Suh's ASIC North Experience May 2011 - August 2011
Job Analog Design Engineer at NXP Semiconductors
Industry Electrical/Electronic Manufacturing
Experience
NXP Semiconductors August 2013 - Present
NXP Semiconductors June 2013 - August 2013
Arizona State University January 2008 - May 2013
Arizona State University August 2010 - December 2012
ASIC North May 2011 - August 2011
Skills
Matlab, Cadence Virtuoso, Analog Circuit Design, Circuit Design, Verilog, VLSI, Simulations, VHDL, ModelSim, Signal Processing, Labview, FPGA, SPICE, Semiconductors, CMOS, Sensors, Characterization, Digital Signal...
Education
Arizona State University 2009 — 2013
Doctor of Philosophy (Ph.D.), Electrical and Electronics Engineering
Arizona State University 2007 — 2009
Master of Science (M.S.), Electrical and Electronics Engineering
NXP Semiconductors August 2013 - Present
NXP Semiconductors June 2013 - August 2013
Arizona State University January 2008 - May 2013
Arizona State University August 2010 - December 2012
ASIC North May 2011 - August 2011
Skills
Matlab, Cadence Virtuoso, Analog Circuit Design, Circuit Design, Verilog, VLSI, Simulations, VHDL, ModelSim, Signal Processing, Labview, FPGA, SPICE, Semiconductors, CMOS, Sensors, Characterization, Digital Signal...
Education
Arizona State University 2009 — 2013
Doctor of Philosophy (Ph.D.), Electrical and Electronics Engineering
Arizona State University 2007 — 2009
Master of Science (M.S.), Electrical and Electronics Engineering
Kenneth Barnett Kenneth Barnett's ASIC North Experience August 2013 - Present
Job Raleigh Design Center and RF Design Manager
Industry Design
Experience
ASIC North August 2013 - Present
Freescale Semiconductor January 2011 - August 2013
Qualcomm August 1999 - December 2010
Motorola 1992 - 1999
Skills
IC, RF, SoC, ASIC, Mixed Signal, Analog, CMOS, Semiconductors, Cellular Communications, Systems Engineering, Integrated Circuit..., Wireless, System Design, Low-power Design, Embedded Systems, Analog Circuit Design, Risk Management, Program Management, Firmware, Bluetooth, RF Design, EDA, PLL, Debugging, Team Leadership, Patents, Internet of Things
Education
Georgia Institute of Technology 1984 — 1992
MS, Electrical Engineering
ASIC North August 2013 - Present
Freescale Semiconductor January 2011 - August 2013
Qualcomm August 1999 - December 2010
Motorola 1992 - 1999
Skills
IC, RF, SoC, ASIC, Mixed Signal, Analog, CMOS, Semiconductors, Cellular Communications, Systems Engineering, Integrated Circuit..., Wireless, System Design, Low-power Design, Embedded Systems, Analog Circuit Design, Risk Management, Program Management, Firmware, Bluetooth, RF Design, EDA, PLL, Debugging, Team Leadership, Patents, Internet of Things
Education
Georgia Institute of Technology 1984 — 1992
MS, Electrical Engineering
Greg O'Malley Greg O'Malley's ASIC North Experience March 2015 - Present
Job Senior Engineer / Manager
Industry Electrical/Electronic Manufacturing
Experience
ASIC North March 2015 - Present
IBM November 1999 - July 2013
IBM January 1996 - November 1999
Skills
Project Management, Engineering, Manufacturing..., Quality Management, Management, Electrical Engineering, Recruiting, Budget Process, Testing, Program Management, Manufacturing, Semiconductors, Product Development, Project Planning, Engineering Management, Hardware
Education
University of Vermont 1986 — 1990
Bachelor of Science, Electrical and Electronics Engineering
Rensselaer Polytechnic Institute 1990 — 1992
Manufacuring Systems Engineering
ASIC North March 2015 - Present
IBM November 1999 - July 2013
IBM January 1996 - November 1999
Skills
Project Management, Engineering, Manufacturing..., Quality Management, Management, Electrical Engineering, Recruiting, Budget Process, Testing, Program Management, Manufacturing, Semiconductors, Product Development, Project Planning, Engineering Management, Hardware
Education
University of Vermont 1986 — 1990
Bachelor of Science, Electrical and Electronics Engineering
Rensselaer Polytechnic Institute 1990 — 1992
Manufacuring Systems Engineering
Chris Rebeor Chris Rebeor's ASIC North Experience October 2013 - Present
Job Advisory Circuit Design Engineer at ASIC North
Industry Semiconductors
Experience
ASIC North October 2013 - Present
IBM June 1984 - July 2013
General Electric Ordnance Systems 1978 - 1982
Skills
Electronic Circuit..., Physical Design, Standard Cell Design, SRAM Design, Register Array Design, IO and ESD Design, Cadence Spectre, Cadence Virtuoso, Hspice, Synopsys NCX, Reliability Analysis, Electro-migration..., Model-Hardware..., Manufacturing Design..., Transistor Level Design..., Documentation, Perl Script, Linux, Software Documentation, SPICE, Debugging, Analog, IC, Circuit Design, Simulations, Reliability Engineering, Testing, Semiconductors, Product Engineering, Failure Analysis, VLSI, ASIC
Education
UMASS Amherst 1982 — 1984
Bachelor of Science (BS), Electrical and Electronics Engineering
Hudson Valley Community College 1976 — 1978
Associate's degree, Electrical and Electronics Engineering
ASIC North October 2013 - Present
IBM June 1984 - July 2013
General Electric Ordnance Systems 1978 - 1982
Skills
Electronic Circuit..., Physical Design, Standard Cell Design, SRAM Design, Register Array Design, IO and ESD Design, Cadence Spectre, Cadence Virtuoso, Hspice, Synopsys NCX, Reliability Analysis, Electro-migration..., Model-Hardware..., Manufacturing Design..., Transistor Level Design..., Documentation, Perl Script, Linux, Software Documentation, SPICE, Debugging, Analog, IC, Circuit Design, Simulations, Reliability Engineering, Testing, Semiconductors, Product Engineering, Failure Analysis, VLSI, ASIC
Education
UMASS Amherst 1982 — 1984
Bachelor of Science (BS), Electrical and Electronics Engineering
Hudson Valley Community College 1976 — 1978
Associate's degree, Electrical and Electronics Engineering
Regene Graen Regene Graen's ASIC North Experience January 2011 - Present
Job Advisory Physical Designer at ASIC North
Industry Semiconductors
Experience
ASIC North January 2011 - Present
Freescale Semiconductor 2005 - 2009
Motorola Semiconductor 1994 - 2004
Codex 1987 - 1994
Western Design Center 1981 - 1986
Skills
Place & Route, TCL, EDA, Timing Closure, Low-power Design, Cadence Virtuoso, Floorplanning, BiCMOS, Semiconductors, VLSI, ASIC, Physical Design, Electronics, Verilog, Analog Circuit Design, Analog, IC layout, Cadence, Physical Verification, Embedded Systems, DRC, Logic Design, Debugging, Integrated Circuit..., SoC, Power Management, Integration, Perl, DFT, Linux, IC, RTL design, Primetime, Simulations, Design for Manufacturing, Mixed Signal, LVS, PCB design, CMOS, RTL coding, Electrical Engineering, SystemVerilog, Functional Verification, Unix, PLL, Static Timing Analysis, Testing, Circuit Design, Microprocessors
Education
College of Saint Benedict 1972 — 1976
BS, Nursing
Mesa Community College
Computer Science and Calculus courses
Motorola University and Cadence Design System
IC Design Courses
Western Design Center
IC Layout Design Training Program
ASIC North January 2011 - Present
Freescale Semiconductor 2005 - 2009
Motorola Semiconductor 1994 - 2004
Codex 1987 - 1994
Western Design Center 1981 - 1986
Skills
Place & Route, TCL, EDA, Timing Closure, Low-power Design, Cadence Virtuoso, Floorplanning, BiCMOS, Semiconductors, VLSI, ASIC, Physical Design, Electronics, Verilog, Analog Circuit Design, Analog, IC layout, Cadence, Physical Verification, Embedded Systems, DRC, Logic Design, Debugging, Integrated Circuit..., SoC, Power Management, Integration, Perl, DFT, Linux, IC, RTL design, Primetime, Simulations, Design for Manufacturing, Mixed Signal, LVS, PCB design, CMOS, RTL coding, Electrical Engineering, SystemVerilog, Functional Verification, Unix, PLL, Static Timing Analysis, Testing, Circuit Design, Microprocessors
Education
College of Saint Benedict 1972 — 1976
BS, Nursing
Mesa Community College
Computer Science and Calculus courses
Motorola University and Cadence Design System
IC Design Courses
Western Design Center
IC Layout Design Training Program
Tony Bonaccio Tony Bonaccio's ASIC North Experience August 2013 - Present
Job Senior Circuit Design Engineer at ASIC North
Industry Computer Hardware
Experience
ASIC North August 2013 - Present
University of Vermont January 1988 - Present
IBM Corporation 1979 - July 2013
Skills
Electrical Engineering, VLSI, Mixed Signal, Integrated Circuit..., Analog Circuit Design, Analog, Circuit Design, CMOS, Verilog, Semiconductors, C, Simulations, Linux, Unix, EDA, Debugging, Microprocessors, IC, Cadence, Testing, Failure Analysis, ASIC, Higher Education, Characterization, Engineering Management
Education
University of Vermont 1980 — 1985
MS, Electrical Engineering
University of Rochester 1975 — 1979
BS, Electrical and Electronics Engineering
ASIC North August 2013 - Present
University of Vermont January 1988 - Present
IBM Corporation 1979 - July 2013
Skills
Electrical Engineering, VLSI, Mixed Signal, Integrated Circuit..., Analog Circuit Design, Analog, Circuit Design, CMOS, Verilog, Semiconductors, C, Simulations, Linux, Unix, EDA, Debugging, Microprocessors, IC, Cadence, Testing, Failure Analysis, ASIC, Higher Education, Characterization, Engineering Management
Education
University of Vermont 1980 — 1985
MS, Electrical Engineering
University of Rochester 1975 — 1979
BS, Electrical and Electronics Engineering
Jonathan Ebbers's ASIC North Experience 2000 - 2002
Job Technical Engagement Lead at GE Healthcare
Industry Computer Hardware
Experience
GE Healthcare November 2013 - Present
New England Federal Credit Union July 2008 - Present
GE Healthcare June 2010 - November 2013
IBM January 2005 - June 2010
ASIC North 2000 - 2002
Skills
Verilog, SystemVerilog, Perl, Intersystems Cache, Vera, Revenue Cycle Management, Healthcare Information..., Functional Verification, Innovation, HL7, Hospital Revenue Cycle, Testing, Software Engineering, Interfaces, SDLC, SQL, Hardware Architecture, Software Design, Software Implementation, Computer Architecture, Debugging, C++, Embedded Systems, FPGA, Linux, Processors, Agile Methodologies, Firmware, VHDL, ARM
Education
Penn State University 2000 — 2004
Bachelor of Science (B.S.), Computer Engineering
GE Healthcare November 2013 - Present
New England Federal Credit Union July 2008 - Present
GE Healthcare June 2010 - November 2013
IBM January 2005 - June 2010
ASIC North 2000 - 2002
Skills
Verilog, SystemVerilog, Perl, Intersystems Cache, Vera, Revenue Cycle Management, Healthcare Information..., Functional Verification, Innovation, HL7, Hospital Revenue Cycle, Testing, Software Engineering, Interfaces, SDLC, SQL, Hardware Architecture, Software Design, Software Implementation, Computer Architecture, Debugging, C++, Embedded Systems, FPGA, Linux, Processors, Agile Methodologies, Firmware, VHDL, ARM
Education
Penn State University 2000 — 2004
Bachelor of Science (B.S.), Computer Engineering
Janice Guilmette's ASIC North Experience March 2015 - Present
Job Analog IC Layout/Mask Design
Industry Semiconductors
Experience
ASIC North March 2015 - Present
Allegro MicroSystems, LLC September 2013 - February 2015
IBM March 2011 - July 2013
IBM March 2008 - March 2011
Qimonda July 2005 - January 2008
Cypress Semiconductor December 2000 - June 2005
IBM 1990 - 1992
IBM 1990 - 1992
Skills
CMOS, Cadence Virtuoso, Mixed Signal, IC, Semiconductors, ASIC, Physical Design, Verilog, Integrated Circuit..., VLSI, Analog, EDA, Cadence, LVS, SoC, DRC, Analog Circuit Design, Power Management, BiCMOS, Functional Verification, TCL, Logic Design, Debugging, Microprocessors, Circuit Design, SPICE, Hardware Architecture, Layout
Education
Vermont Technical College 1988 — 1990
Associate's degree, Major in Computer Engineering Technology
Champlain College
Certificate Degree, Web Development and Management
ASIC North March 2015 - Present
Allegro MicroSystems, LLC September 2013 - February 2015
IBM March 2011 - July 2013
IBM March 2008 - March 2011
Qimonda July 2005 - January 2008
Cypress Semiconductor December 2000 - June 2005
IBM 1990 - 1992
IBM 1990 - 1992
Skills
CMOS, Cadence Virtuoso, Mixed Signal, IC, Semiconductors, ASIC, Physical Design, Verilog, Integrated Circuit..., VLSI, Analog, EDA, Cadence, LVS, SoC, DRC, Analog Circuit Design, Power Management, BiCMOS, Functional Verification, TCL, Logic Design, Debugging, Microprocessors, Circuit Design, SPICE, Hardware Architecture, Layout
Education
Vermont Technical College 1988 — 1990
Associate's degree, Major in Computer Engineering Technology
Champlain College
Certificate Degree, Web Development and Management
Mark Lilli's ASIC North Experience November 2008 - July 2012
Job Engineer at Intel Corporation
Industry Semiconductors
Experience
Intel Corporation August 2012 - Present
Asic North November 2008 - July 2012
Marvell 2006 - 2008
Intel 1997 - 2006
Skills
RTL design, Verilog, SystemVerilog, Analog Circuit Design, Semiconductors, Physical Design, Primetime, SRAM, CMOS, SoC, Low-power Design, Floorplanning, LVS, IC, Perl, TCL, Unix Shell Scripting, ASIC
Education
Penn State University 1992 — 1996
B.S., Electrical and Electronics Engineering
Intel Corporation August 2012 - Present
Asic North November 2008 - July 2012
Marvell 2006 - 2008
Intel 1997 - 2006
Skills
RTL design, Verilog, SystemVerilog, Analog Circuit Design, Semiconductors, Physical Design, Primetime, SRAM, CMOS, SoC, Low-power Design, Floorplanning, LVS, IC, Perl, TCL, Unix Shell Scripting, ASIC
Education
Penn State University 1992 — 1996
B.S., Electrical and Electronics Engineering
Rudy Farmer's ASIC North Experience February 2013 - Present
Job Senior Design Engineer at ASIC North More Projects
Industry Semiconductors
Experience
ASIC North February 2013 - Present
ASIC North May 2010 - March 2013
Sanctuary Wealth Mangement December 2009 - April 2010
AXA Advisors January 2007 - August 2009
IBM 1982 - 2007
International Business Machines 1980 - 2007
Skills
Semiconductors, ASIC, TCL, Perl, C, Unix, Verilog, Testing, C++, EDA, VLSI, Cross-functional Team..., Simulations, Program Management, IC, Integration, Project Management, Matlab, Business Development, Product Management, Debugging
Education
University of Vermont 1987 — 1988
MBA, Finance, 4.0 GPA
University of Vermont 1984 — 1986
MSEE, VLSI Design, High Honors
Lehigh University 1978 — 1982
BS, EE, High Honors
ASIC North February 2013 - Present
ASIC North May 2010 - March 2013
Sanctuary Wealth Mangement December 2009 - April 2010
AXA Advisors January 2007 - August 2009
IBM 1982 - 2007
International Business Machines 1980 - 2007
Skills
Semiconductors, ASIC, TCL, Perl, C, Unix, Verilog, Testing, C++, EDA, VLSI, Cross-functional Team..., Simulations, Program Management, IC, Integration, Project Management, Matlab, Business Development, Product Management, Debugging
Education
University of Vermont 1987 — 1988
MBA, Finance, 4.0 GPA
University of Vermont 1984 — 1986
MSEE, VLSI Design, High Honors
Lehigh University 1978 — 1982
BS, EE, High Honors
Cindy Kappeler's ASIC North Experience 2004 - 2006
Job HR Professional, Paralegal and Microelectronic technician
Industry Human Resources
Experience
IBM India November 2010 - Present
IBM India Pvt Ltd 2010 - 2013
National Paralegal Network November 2010 - December 2012
Legal Aid of North Carolina October 2009 - November 2010
Qimonda Technologies NA 2006 - 2008
ASIC North 2004 - 2006
IBM 1982 - 2003
Skills
ASIC, Cadence Virtuoso, Place & Route, Semiconductors, VLSI
Education
Kaplan University 2009 — 2010
BS, Paralegal Studies
Champlain College 1993 — 1995
AS, Electronic Engineering Technician
IBM India November 2010 - Present
IBM India Pvt Ltd 2010 - 2013
National Paralegal Network November 2010 - December 2012
Legal Aid of North Carolina October 2009 - November 2010
Qimonda Technologies NA 2006 - 2008
ASIC North 2004 - 2006
IBM 1982 - 2003
Skills
ASIC, Cadence Virtuoso, Place & Route, Semiconductors, VLSI
Education
Kaplan University 2009 — 2010
BS, Paralegal Studies
Champlain College 1993 — 1995
AS, Electronic Engineering Technician
Earl Barber's ASIC North Experience August 2010 - Present
Job Design Engineer at ASIC North
Industry Electrical/Electronic Manufacturing
Experience
ASIC North August 2010 - Present
Raytheon May 2009 - July 2010
Linear Technology April 2002 - November 2008
Teradyne January 2001 - March 2002
IBM December 1995 - January 2001
United States Marine Corps February 1984 - December 1989
Skills
ASIC, Semiconductors, Electrical Engineering, Analog, Power Management, CMOS, IC, Systems Engineering, VLSI, Verilog, Pspice, VHDL, BiCMOS, Simulations
Education
Georgia Institute of Technology 1995 — 1996
MSEE, Electrical Engineering
University of South Florida 1990 — 1995
BSEE, Electrical Engineering
ASIC North August 2010 - Present
Raytheon May 2009 - July 2010
Linear Technology April 2002 - November 2008
Teradyne January 2001 - March 2002
IBM December 1995 - January 2001
United States Marine Corps February 1984 - December 1989
Skills
ASIC, Semiconductors, Electrical Engineering, Analog, Power Management, CMOS, IC, Systems Engineering, VLSI, Verilog, Pspice, VHDL, BiCMOS, Simulations
Education
Georgia Institute of Technology 1995 — 1996
MSEE, Electrical Engineering
University of South Florida 1990 — 1995
BSEE, Electrical Engineering
Mike Laramie's ASIC North Experience May 2001 - Present
Job Senior Analog Design Engineer at ASIC North
Industry Semiconductors
Experience
ASIC North May 2001 - Present
ASIC North May 2001 - Present
Skills
Semiconductors, Verilog, TCL, Physical Design, Static Timing Analysis, Timing Closure, ASIC, Debugging, CMOS, EDA, IC, VLSI, Cadence Virtuoso, Mixed Signal, Floorplanning, FPGA, Physical Verification, Simulations, Circuit Design, Intel, Cadence, Power Management, Logic Design, Algorithms, Perl, Embedded Systems, Hardware Architecture, DFT, Integrated Circuit..., Analog, DRC, Functional Verification, Microprocessors, SystemVerilog, VHDL, SPICE, Low-power Design, PLL, Processors, RTL design, LVS, Analog Circuit Design, SoC, Logic Synthesis
Education
Clarkson University 1988 — 1992
BS, Electrical Engineering
ASIC North May 2001 - Present
ASIC North May 2001 - Present
Skills
Semiconductors, Verilog, TCL, Physical Design, Static Timing Analysis, Timing Closure, ASIC, Debugging, CMOS, EDA, IC, VLSI, Cadence Virtuoso, Mixed Signal, Floorplanning, FPGA, Physical Verification, Simulations, Circuit Design, Intel, Cadence, Power Management, Logic Design, Algorithms, Perl, Embedded Systems, Hardware Architecture, DFT, Integrated Circuit..., Analog, DRC, Functional Verification, Microprocessors, SystemVerilog, VHDL, SPICE, Low-power Design, PLL, Processors, RTL design, LVS, Analog Circuit Design, SoC, Logic Synthesis
Education
Clarkson University 1988 — 1992
BS, Electrical Engineering
Bill Danilich's ASIC North Experience October 2013 - Present
Job Verification Engineer at ASIC North
Industry Semiconductors
Experience
ASIC North October 2013 - Present
IBM 1985 - 2013
Skills
C, Verilog, Perl, VHDL, SystemVerilog, TCL, Linux, Functional Verification, ASIC, EDA, VLSI, C++, Debugging, Embedded Systems, Operating Systems, SoC, Hardware Architecture, RTL design, Static Timing Analysis, Computer Architecture, Processors, Microprocessors
Education
SUNY Binghamton 1987 — 1989
Master of Science (MS), Computer Science and Advanced Technology
Penn State University 1981 — 1985
Bachelor of Science (BS), Electrical Engineering
ASIC North October 2013 - Present
IBM 1985 - 2013
Skills
C, Verilog, Perl, VHDL, SystemVerilog, TCL, Linux, Functional Verification, ASIC, EDA, VLSI, C++, Debugging, Embedded Systems, Operating Systems, SoC, Hardware Architecture, RTL design, Static Timing Analysis, Computer Architecture, Processors, Microprocessors
Education
SUNY Binghamton 1987 — 1989
Master of Science (MS), Computer Science and Advanced Technology
Penn State University 1981 — 1985
Bachelor of Science (BS), Electrical Engineering
Eric Rumbaugh's ASIC North Experience February 2011 - April 2013
Job Senior Consultant at IBM Global Business Services
Industry Management Consulting
Experience
IBM April 2013 - Present
ASIC North February 2011 - April 2013
The Essex, Vermont's Culinary Resort & Spa July 2009 - October 2010
Skills
Microsoft Excel, Customer Service, Managerial Finance, Business Process..., Business Strategy, Business Analysis, Financial Modeling, IT Security Best..., Public Speaking, Microsoft Word, PowerPoint, Psychology, NI LabVIEW, Leadership, Event Planning
Education
University of Vermont 2010 — 2013
Master of Business Administration (MBA), Business Administration and Management, General
Grove City College 2005 — 2009
Bachelor's degree, Psychology
IBM April 2013 - Present
ASIC North February 2011 - April 2013
The Essex, Vermont's Culinary Resort & Spa July 2009 - October 2010
Skills
Microsoft Excel, Customer Service, Managerial Finance, Business Process..., Business Strategy, Business Analysis, Financial Modeling, IT Security Best..., Public Speaking, Microsoft Word, PowerPoint, Psychology, NI LabVIEW, Leadership, Event Planning
Education
University of Vermont 2010 — 2013
Master of Business Administration (MBA), Business Administration and Management, General
Grove City College 2005 — 2009
Bachelor's degree, Psychology
Douglas Kemerer's ASIC North Experience 2008 - 2009
Job Insurance and Securities Agent at The Vermont Agency
Industry Financial Services
Experience
The Vermont Agency 2009 - Present
ASIC North 2008 - 2009
IBM Corp 1968 - 2007
Education
Syracuse University 1969 — 1972
MSEE, Electrical Engineering
Carnegie Mellon University 1964 — 1968
BSEE, Solid State Electronics
The Vermont Agency 2009 - Present
ASIC North 2008 - 2009
IBM Corp 1968 - 2007
Education
Syracuse University 1969 — 1972
MSEE, Electrical Engineering
Carnegie Mellon University 1964 — 1968
BSEE, Solid State Electronics
Benoit Jarry's ASIC North Experience January 2011 - Present
Job Technical Staff at ASIC North
Industry Electrical/Electronic Manufacturing
Experience
ASIC North January 2011 - Present
Cadence Design Systems May 2004 - June 2009
Universiteit Twente August 2002 - December 2002
McGill University January 1998 - December 2001
Cadence Design Systems August 2000 - December 2000
Defense Research Establishment May 1998 - August 1998
Education
McGill University 2009 — 2009
MEE, Electrical Engineering
McGill University 2001 — 2003
Ph.D., Electrical Engineering
McGill University 1999 — 2000
M.Eng, Electrical Engineering
McGill University 1995 — 1998
B.Eng, Electrical Engineering
ASIC North January 2011 - Present
Cadence Design Systems May 2004 - June 2009
Universiteit Twente August 2002 - December 2002
McGill University January 1998 - December 2001
Cadence Design Systems August 2000 - December 2000
Defense Research Establishment May 1998 - August 1998
Education
McGill University 2009 — 2009
MEE, Electrical Engineering
McGill University 2001 — 2003
Ph.D., Electrical Engineering
McGill University 1999 — 2000
M.Eng, Electrical Engineering
McGill University 1995 — 1998
B.Eng, Electrical Engineering
Arif Alam's ASIC North Experience July 2011 - Present
Job Advisory Circuit Design Engineer at ASIC North
Industry Semiconductors
Experience
ASIC North July 2011 - Present
ON Semiconductor May 2006 - July 2011
National Semiconductor February 2001 - April 2006
Skills
Mixed Signal, Integrated Circuit..., Circuit Design, CMOS, IC, Power Management, Analog Circuit Design, Analog, Semiconductors, ASIC, Linux, Spectre, Simulations, Low-power Design, Cadence Virtuoso, Electrical Engineering, Semiconductor Industry, Spectre MDL, Synopsys XA/VCS, Hspice, Standard Cell..., Standard cell library..., SSTA, Sensitivity...
Education
Arizona State University 2002 — 2004
MSEE, Solid State Electronics, Analog/Mixed-signal IC design
Utah State University 1995 — 1997
BSEE, Micro Electronics, Control Theory, VLSI Design
ASIC North July 2011 - Present
ON Semiconductor May 2006 - July 2011
National Semiconductor February 2001 - April 2006
Skills
Mixed Signal, Integrated Circuit..., Circuit Design, CMOS, IC, Power Management, Analog Circuit Design, Analog, Semiconductors, ASIC, Linux, Spectre, Simulations, Low-power Design, Cadence Virtuoso, Electrical Engineering, Semiconductor Industry, Spectre MDL, Synopsys XA/VCS, Hspice, Standard Cell..., Standard cell library..., SSTA, Sensitivity...
Education
Arizona State University 2002 — 2004
MSEE, Solid State Electronics, Analog/Mixed-signal IC design
Utah State University 1995 — 1997
BSEE, Micro Electronics, Control Theory, VLSI Design
Ryan LaVallee, MEM's ASIC North Experience October 2014 - Present
Job Advisory Physical Design Engineer at ASIC North
Industry Electrical/Electronic Manufacturing
Experience
ASIC North October 2014 - Present
Vermont Technical College March 2011 - Present
ASIC North December 2012 - October 2014
Nanya Technology June 2007 - December 2012
Skills
Cadence Virtuoso, IC, CMOS, Semiconductors, Microsoft Office, Problem Solving, Linux, Unix, Excel, VHDL, VLSI, Physical Design, Verilog, Mixed Signal, Integrated Circuit..., Xilinx, Analog Circuit Design, Cadence, Electrical Engineering, EDA, Digital Electronics, Simulations, Logic Design
Education
Penn State University 2013 — 2014
Master of Engineering Management, Systems Engineering, 3.6
Vermont Technical College 2005 — 2008
Bachelor of Applied Science (B.A.Sc.), Electromechanical Technology/Electromechanical Engineering Technology, 3.1
University of Vermont 2003 — 2004
Community Development and Applied Economics
ASIC North October 2014 - Present
Vermont Technical College March 2011 - Present
ASIC North December 2012 - October 2014
Nanya Technology June 2007 - December 2012
Skills
Cadence Virtuoso, IC, CMOS, Semiconductors, Microsoft Office, Problem Solving, Linux, Unix, Excel, VHDL, VLSI, Physical Design, Verilog, Mixed Signal, Integrated Circuit..., Xilinx, Analog Circuit Design, Cadence, Electrical Engineering, EDA, Digital Electronics, Simulations, Logic Design
Education
Penn State University 2013 — 2014
Master of Engineering Management, Systems Engineering, 3.6
Vermont Technical College 2005 — 2008
Bachelor of Applied Science (B.A.Sc.), Electromechanical Technology/Electromechanical Engineering Technology, 3.1
University of Vermont 2003 — 2004
Community Development and Applied Economics
William Lepkowski's ASIC North Experience November 2014 - Present
Job Analog Design Engineer at ASIC North
Industry Semiconductors
Experience
ASIC North November 2014 - Present
Linear Technology May 2014 - October 2014
RF Micropower January 2009 - May 2014
Arizona State University August 2006 - December 2008
JPL (NASA's Jet Propulsion Laboratory) June 2006 - August 2006
ON Semiconductor June 2004 - August 2005
Skills
Circuit Design, Device Fabrication, Electrical Engineering, RF, Characterization, Low-power Design, PCB design, Analog, Analog Circuit Design, CMOS, Electronics, IC, PCB Design, SPICE, Semiconductors
Education
Arizona State University 2008 — 2010
Ph.D., Electrical Engineering, 3.89
Arizona State University 2006 — 2008
M.S., Electrical Engineering, 3.8
University of Arizona 2002 — 2006
B.S., Electrical Engineering, 3.63
ASIC North November 2014 - Present
Linear Technology May 2014 - October 2014
RF Micropower January 2009 - May 2014
Arizona State University August 2006 - December 2008
JPL (NASA's Jet Propulsion Laboratory) June 2006 - August 2006
ON Semiconductor June 2004 - August 2005
Skills
Circuit Design, Device Fabrication, Electrical Engineering, RF, Characterization, Low-power Design, PCB design, Analog, Analog Circuit Design, CMOS, Electronics, IC, PCB Design, SPICE, Semiconductors
Education
Arizona State University 2008 — 2010
Ph.D., Electrical Engineering, 3.89
Arizona State University 2006 — 2008
M.S., Electrical Engineering, 3.8
University of Arizona 2002 — 2006
B.S., Electrical Engineering, 3.63
Meg Charlebois's ASIC North Experience March 2014 - Present
Job ASIC Design Engineer at ASIC North
Industry Information Technology and Services
Experience
ASIC North March 2014 - Present
IBM January 2000 - July 2013
IBM 1984 - January 2000
Skills
Verilog, Semiconductors, Unix, EDA, Testing, ASIC, Integration, Linux, Software Development, Perl, TCL, Enterprise Architecture, Debugging, Embedded Systems, C++, Shell Scripting, Simulations, Hardware Architecture, System Architecture, Solution Architecture, Program Management, VHDL, Technical Leadership, Software Engineering, Functional Verification, CMOS, Microprocessors, FPGA, IC, Static Timing Analysis, SystemVerilog, Firmware, Signal Integrity, Cadence Virtuoso, RTL design, Circuit Design, ModelSim, VLSI, SoC, Computer Architecture, Logic Design, Processors, Timing Closure, Integrated Circuit..., Mixed Signal, SPICE, Cadence, Analog Circuit Design, ARM
Education
Tufts University 1980 — 1984
BSEE, Engineering
Syracuse University
Master's degree, Computer Engineering
ASIC North March 2014 - Present
IBM January 2000 - July 2013
IBM 1984 - January 2000
Skills
Verilog, Semiconductors, Unix, EDA, Testing, ASIC, Integration, Linux, Software Development, Perl, TCL, Enterprise Architecture, Debugging, Embedded Systems, C++, Shell Scripting, Simulations, Hardware Architecture, System Architecture, Solution Architecture, Program Management, VHDL, Technical Leadership, Software Engineering, Functional Verification, CMOS, Microprocessors, FPGA, IC, Static Timing Analysis, SystemVerilog, Firmware, Signal Integrity, Cadence Virtuoso, RTL design, Circuit Design, ModelSim, VLSI, SoC, Computer Architecture, Logic Design, Processors, Timing Closure, Integrated Circuit..., Mixed Signal, SPICE, Cadence, Analog Circuit Design, ARM
Education
Tufts University 1980 — 1984
BSEE, Engineering
Syracuse University
Master's degree, Computer Engineering
Jeff LaFramboise's ASIC North Experience August 2010 - Present
Job Advisory Engineer at ASIC North
Industry Semiconductors
Experience
ASIC North August 2010 - Present
IBM 1988 - 2009
IBM October 1998 - March 2008
Skills
ASIC, Verilog, IC, Semiconductors, CMOS, TCL, Programming, C++, Visual C++, VHDL, Verification, SoC, Static Timing Analysis, VLSI
Education
Walden University 2006 — 2009
Master of Science (MS), Computer Engineering
Penn State University 1980 — 1983
Bachelor of Science (BS), Electrical and Electronics Engineering
ASIC North August 2010 - Present
IBM 1988 - 2009
IBM October 1998 - March 2008
Skills
ASIC, Verilog, IC, Semiconductors, CMOS, TCL, Programming, C++, Visual C++, VHDL, Verification, SoC, Static Timing Analysis, VLSI
Education
Walden University 2006 — 2009
Master of Science (MS), Computer Engineering
Penn State University 1980 — 1983
Bachelor of Science (BS), Electrical and Electronics Engineering
Ken Short's ASIC North Experience SR Mask DesignerIBMJanuary 1985 - January 2009
Job Mask Designer at ASIC North
Industry Semiconductors
Experience
ASIC North SR Mask DesignerIBMJanuary 1985 - January 2009
IBM Global Services January 1985 - January 2009
Skills
Physical Design, CMOS, IC, Analog Design, Hercules, ASIC, LVS, DRC, Floorplanning, Physical Verification, Semiconductors, Cadence Virtuoso, PLL, I/O, Mixed Signal, Analog, VLSI, Circuit Design, Unix, Layout, Linux, Windows, Microsoft Office, Mentoring, Integration, Excel, Virtuoso, Integrated Circuit..., IC layout
Education
Pennsylvania College of Technology 1982 — 1984
Associates, Electronics Technology
ASIC North SR Mask DesignerIBMJanuary 1985 - January 2009
IBM Global Services January 1985 - January 2009
Skills
Physical Design, CMOS, IC, Analog Design, Hercules, ASIC, LVS, DRC, Floorplanning, Physical Verification, Semiconductors, Cadence Virtuoso, PLL, I/O, Mixed Signal, Analog, VLSI, Circuit Design, Unix, Layout, Linux, Windows, Microsoft Office, Mentoring, Integration, Excel, Virtuoso, Integrated Circuit..., IC layout
Education
Pennsylvania College of Technology 1982 — 1984
Associates, Electronics Technology
Daniel Stratz's ASIC North Experience June 2004 - August 2012
Job Student at University of Vermont College of Medicine
Industry Medical Practice
Experience
ASIC North June 2004 - August 2012
Skills
Semiconductors, Microsoft Office, Microsoft Excel, Matlab, Microsoft Word, Cadence Virtuoso, CMOS
Education
University of Vermont College of Medicine 2012 — 2016
University of Rochester 2007 — 2011
Bachelor of Science (BS), Biomedical/Medical Engineering
ASIC North June 2004 - August 2012
Skills
Semiconductors, Microsoft Office, Microsoft Excel, Matlab, Microsoft Word, Cadence Virtuoso, CMOS
Education
University of Vermont College of Medicine 2012 — 2016
University of Rochester 2007 — 2011
Bachelor of Science (BS), Biomedical/Medical Engineering