Atria Logic Inc.

Description

Address: 341 Cobalt Way, Sunnyvale, CA 94085 Phone: (408) 730-4100: : Place name: : Website: Category: : Hours: : : Website: http://www.atrialogic.com/ Category: Software company Suggest an editUnable to add this file. Please check that it is a valid photo. Unable to add this file. Please check that it is a valid photo. · Own this business?Add missing informationAdd business hours Unable to add this file. Please check that it is a valid photo. Questions & answers Ask a questionBe the first to ask a question

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Atria Logic Inc. Employees

Employee
Years
Job
Industry
Vijay K Vijay K San Francisco Bay Area Details
Vijay K's Atria Logic Inc. Experience August 2011 - January 2012
Job ASIC Engineer (Verification) at Micron
Industry Semiconductors
Experience
Micron Technology  September 2014 - Present
Brocade  February 2012 - August 2014
Atria Logic Inc.   August 2011 - January 2012
State University of New York  May 2010 - June 2011

Skills
SystemVerilog, Verilog, UVM, Debugging, ASIC, Functional Verification, ModelSim, C, Programming, Perl, USB, Logic Design, C++, Operating Systems, Logic Analyzer, Cadence Virtuoso, Ethernet, Assembly Language, Hardware Architecture, Linux Kernel, Linux, TCL, Xilinx ISE, Embedded Software, FPGA, Device Drivers

Education
State University of New York at Buffalo   2009 — 2011
Master of Science (M.S.), Electrical Engineering

Visvesvaraya Technological University   2004 — 2008
BE, Engineering

Chong Yao Chong Yao Milpitas, California Details
Chong Yao's Atria Logic Inc. Experience January 2013 - 2015
Job Member StaffASIC/FPGA Verification Engineer at Atria Logic
Industry Electrical/Electronic Manufacturing
Experience
Magnum Semiconductor  September 2014 - July 2015
Atria Logic Inc.   January 2013 - 2015
Cisco  January 2013 - August 2014

Skills
Python, SQL, Java, Linux Operation System, Hadoop, Amazon EC2, Apache Spark, Scala, Hive, NumPy, R, Cassandra, Scikit-learn, MySQL, JavaScript, HTML5, Twitter Bootstrap, jQuery, Django, Android, Docker, Heroku, Tachyon

Education
International Technological University   2014 — 2016
Master’s Degree, Software Engineering

University of Southern California   2010 — 2012
Master’s Degree, VLSI design

Wuhan University   2006 — 2010
Bachelor’s Degree, Electrical, Electronics and Communications Engineering

Pavan Gowda Pavan Gowda San Jose, California Details
Pavan Gowda's Atria Logic Inc. Experience February 2015 - April 2015
Job SSD Design Engineer at Micron Technology
Industry Semiconductors
Experience
Micron Technology  June 2015 - Present
Atria Logic Inc.   February 2015 - April 2015
Fastor Systems  July 2014 - January 2015
San Jose State University  August 2012 - May 2014
Accenture  March 2010 - July 2012
Snapwiz  November 2009 - March 2010
National Aerospace Laboratories  January 2009 - May 2009

Skills
Verilog, C++, FPGA, Python, SSD, ASIC, SoC, Static Timing Analysis, Perl Script, Cadence Virtuoso, Functional Verification, RTL coding, High-speed Digital..., HTML, CSS, Testing, Bash, Tcl (Expect), Jenkins, Integrated Circuit..., TCL

Education
San Jose State University   2012 — 2014
Master's degree, Digital Design

Visvesvaraya Technological University   2005 — 2009
Bachelor of Engineering (BEng), Electrical, Electronics and Communications Engineering

Deepali Ravindra Kodagali Deepali Ravindra Kodagali San Francisco Bay Area Details
Deepali Ravindra Kodagali's Atria Logic Inc. Experience June 2014 - April 2015
Job Field Application Engineer
Industry Semiconductors
Experience
MiOS, Ltd.   April 2015 - Present
Atria Logic Inc.   June 2014 - April 2015
Stony Brook University  June 2013 - December 2013
Tecnotree Corporation  March 2012 - July 2012
Paladion Networks  2010 - 2012
Accenture  July 2010 - September 2010

Skills
VLSI, Embedded Systems, Cadence Virtuoso, C, C++, Verilog, SystemC, Xilinx ISE, ModelSim, Matlab, Visual C++, Linux, Burp Suite, Microsoft Word, Microsoft Excel, PowerPoint, Teamwork, Penetration Testing, Cadence, VHDL, SystemVerilog, Analog Circuit Design, FPGA, Microcontrollers, High Level Synthesis, Xilinx Vivado Hls, PSoC, Assembly Language, Keil, Wireshark, Putty, WinHex, Microsoft Office, Public Speaking, Perl, Java, Xilinx, Computer Architecture, Integrated Circuit...

Education
Stony Brook University   2012 — 2013
Master of Science (M.S.), Electrical and Computer Engineeing

Visvesvaraya Technological University   2006 — 2010
Bachelor of Engineering (B.E.), Telecommunications Engineering

Army Public School, Bangalore   2004 — 2006
Senior Secondary School, Science

Sundar Balasubramanian Sundar Balasubramanian Irvine, California Details
Sundar Balasubramanian's Atria Logic Inc. Experience February 2014 - May 2014
Job IC Design Engineer
Industry Semiconductors
Experience
Broadcom  June 2014 - Present
Atria Logic Inc.   February 2014 - May 2014
Nanoscale Circuits and Systems Laboratory   May 2013 - December 2013

Skills
C, VLSI Design, VLSI Testing, Verilog, ModelSim, Matlab, Cadence Virtuoso, VHDL, Circuit Design, Android, Perl, Python, Pspice, SQL, Embedded Systems, C++, Assembly Language, PSoC, Xilinx ISE, Windows, Mac, linux, VLSI, FPGA, Cadence, Xilinx, SystemVerilog, Eclipse, Fengshui placer, Labyrinth Global Router, Computer Architecture, EDA, Synopsys tools, Integrated Circuit..., PSpice, Linux

Education
Stony Brook University   2012 — 2013
Master of Science (M.S.), Electrical Engineering

SSN College of Engineering   2008 — 2012
Bachelor of Engineering (B.E.), Electrical and Electronics Engineering

Vigneshkumar Appia Janardhan Vigneshkumar Appia Janardhan San Jose, California Details
Vigneshkumar Appia Janardhan's Atria Logic Inc. Experience January 2015 - Present
Job Entrylevel Electrical Engineer, Seeking Opportunities in VLSI Design/Validation areas
Industry Electrical/Electronic Manufacturing
Experience
Atria Logic Inc.   January 2015 - Present
BlackBerry  August 2013 - December 2013
Integral Coach Factory (ICF)   May 2011 - May 2011
Klemmen Engineering Corporation   December 2010 - December 2010
AREVA T&D  June 2010 - June 2010
Tuticorin Thermal Power Station (TTPS)   May 2010 - May 2010

Skills
Pspice, Matlab, C++, C, Java, Verilog, Simulations, ModelSim, Programming, Labview, Microsoft Office, Electrical Engineering, Xilinx, Electronics, Simulink, SPICE, Linux, Circuit Design, Cadence Virtuoso, VLSI, Power Electronics, VHDL, Cadence Spectre, Xilinx ISE, Cadence, Agilent ADS

Education
The University of Texas at Dallas   2012 — 2014
Master of Science (M.S.), Electrical and Electronics Engineering

SSN College of Engineering   2008 — 2012
Bachelor of Engineering (B.E.), Electrical and Electronics Engineering

Dr. Debasmita Shaw Dr. Debasmita Shaw Cupertino, California Details
Dr. Debasmita Shaw's Atria Logic Inc. Experience October 2014 - Present
Job VP Engineering Software at Atria Logic Inc.
Industry Semiconductors
Experience
Atria Logic Inc.   October 2014 - Present
Toshiba Software India Pvt. Ltd.   August 2003 - March 2014
Micronas  February 2002 - August 2003
Infineon Technologies  July 2000 - February 2002
Infineon Technologies  August 1999 - July 2000
Siemens Semiconductor  May 1998 - August 1999
Peritus  January 1998 - May 1998
Texas Instruments  February 1991 - January 1998

Skills
Multi-core Programming, Software Solutions, Product Evolution, Compiler Optimization, Designing, Stream Processing, Conditional Access, Encryption Software, Compression Algorithms, Kernel Drivers, Distributed Algorithms, Distributed Architecture, Distributed Databases, Routing Protocols, Collision Detection, Program Management with..., Software Development, Embedded Software, Embedded Systems, Mobile Devices, Product Management, SoC, Device Drivers, Firmware

Education
IIT Kharagpur   1994 — 1997
Doctor of Philosophy (PhD), Computer Engineering

Jadavpur University   1989 — 1991
Master's degree, Computer Engineering

Aditya Kulkarni Aditya Kulkarni San Francisco Bay Area Details
Aditya Kulkarni's Atria Logic Inc. Experience July 2014 - August 2014
Job Applications Engineer at Power Integrations
Industry Semiconductors
Experience
Power Integrations  October 2014 - Present
Atria Logic Inc.   July 2014 - August 2014
Broadcom  June 2013 - August 2013

Skills
Verilog, Cadence Virtuoso, VHDL, Analog Circuit Design, ASIC, Mixed-Signal IC Design, PLL, C++, ModelSim, Matlab, SystemC, Pspice, SPICE, Cadence, Xilinx ISE, Computer Architecture, Embedded Systems, VLSI, FPGA, Synopsys tools, Assembly Language, Altera Quartus, SystemVerilog, Xilinx, Cadence Spectre, TCL, RTL design, ADCs, SoC, Processors, PSpice, RTL Design

Education
State University of New York at Stony Brook   2012 — 2013
Master's Degree, Electrical and Electronics Engineering, GPA: 3.93

University of Mumbai   2008 — 2012
Bachelor of Engineering (B.E.), Electrical and Electronics Engineering

Ramya Krishna Devineni Ramya Krishna Devineni San Francisco Bay Area Details
Ramya Krishna Devineni's Atria Logic Inc. Experience March 2009 - April 2010
Job
Industry Semiconductors
Experience
Marvell Semiconductor  April 2010 - Present
Atria Logic Inc.   March 2009 - April 2010
Actel Corporation  April 2008 - March 2009
STMicroelectronics  January 2006 - June 2006
Gulf Oil Corporation  June 2004 - July 2004

Education
University of Rochester   2006 — 2007
Masters

Birla Institute of Technology and Science, Pilani   2002 — 2006
Bachelors

Sandeep Neeli Sandeep Neeli Austin, Texas Area Details
Sandeep Neeli's Atria Logic Inc. Experience September 2009 - November 2010
Job Design Verification Engineer at Microsemi
Industry Computer Hardware
Experience
Microsemi  February 2013 - Present
AMD  November 2010 - December 2012
Atria Logic Inc.   September 2009 - November 2010
Intel  September 2008 - August 2009
Auburn University  August 2007 - August 2008
Auburn University  August 2006 - August 2008

Skills
Verilog, ModelSim, VHDL, Perl, C, Matlab, Unix, Altera Quartus, Xilinx ISE, Simulink, Windows, ASIC, Cadence Virtuoso, VLSI, Computer Architecture, RTL design, SystemVerilog, TCL, FPGA, SPICE, Integrated Circuit..., Logic Design, Logic Synthesis, UVM, RTL Design, Simulations

Education
Auburn University   2006 — 2008
MSEE, Electrical and Computer Engineering

Jawaharlal Nehru Technological University   2002 — 2006
B.Tech, Electronics and Communications Engineering

sai deepa rayaprolu sai deepa rayaprolu San Francisco Bay Area Details
sai deepa rayaprolu's Atria Logic Inc. Experience March 2012 - September 2012
Job Advance Product Engineer at Altera
Industry Electrical/Electronic Manufacturing
Experience
Altera  August 2012 - Present
Atria Logic Inc.   March 2012 - September 2012
University of Toledo  August 2008 - October 2011
Infineon Technologies AG  June 2010 - September 2010
University of Toledo  August 2008 - December 2009
MeritTrac Service's Pvt Ltd.   July 2004 - December 2007
JNTU Hyderabad   August 2004 - September 2004

Education
University of Toledo   2008 — 2011
Masters in Electrical Engineering, Digital Designing and Testing, Analog Integrated Circuits (FPGAs/ ASIC)

Jawaharlal Nehru Technological University   2004 — 2008
Bachelors in Technology (Undergraduation), Electronics and Instrumentation Engineering

Kendriya Vidyalaya
CBSE, High School

Randy Roscoe Randy Roscoe San Jose, California Details
Randy Roscoe's Atria Logic Inc. Experience April 2015 - Present
Job CEO Task Force Engineering
Industry Computer Software
Experience
Atria Logic Inc.   April 2015 - Present
Task Force Engineering   February 2012 - Present
Sasken/Ingenient Technologies   2007 - February 2012
Magnum Semiconductor  2002 - 2007
Spatializer Audio Labs (now DTS)   1999 - 2002
Yamaha Systems Technology   1997 - 1999
Philips Semiconductor  1992 - 1997

Skills
Video, New Business Development, Embedded Software, Product Management, Embedded Systems, Audio, Consumer Electronics, Product Marketing, Multimedia, Sales Management, Semiconductors, Wireless, Digital Video, Start-ups, MPEG, DSP, Account Management, International Sales, VoIP, Sound, Business Development, Digital Signal..., Experienced with MS..., ARM, Product Development, SoC, IC, Device Drivers, Firmware, RTOS, Strategic Partnerships, Processors, Mobile Devices, Strategy, System Architecture, FPGA, Competitive Analysis, Electronics, Program Management, Streaming Media, Product Launch, ASIC, RF, Debugging, Hardware Architecture, H.264, Analog, Microcontrollers, Semiconductor Industry, Algorithms

Education
West Coast World Martial Arts   2008 — 2015
2nd Degree, Mixed Martial Arts

San Jose State University   1982 — 1985
BS, Physics

City College of Chicago   1980 — 1981
AA, General Studies, night school.

TAE SU KIM TAE SU KIM Irvine, California Details
TAE SU KIM's Atria Logic Inc. Experience August 2011 - September 2011
Job Engineer at Intel Corporation
Industry Computer Hardware
Experience
Intel Corporation  February 2014 - Present
Intel Corporation  July 2013 - Present
Atria Logic Inc.   August 2011 - September 2011
Samsung Semiconductor  January 1996 - September 2008

Skills
Verilog, SoC, Xilinx, IC, ASIC, Digital Circuit Design, VHDL, RTL design, Debugging, Perl, Logic Synthesis, Hardware Architecture, Computer Architecture, Simulations, FPGA, Functional Verification, Static Timing Analysis, Integrated Circuit..., Digital Signal..., ModelSim

Education
University of California, Irvine   2008 — 2014
Master's Degree, Computer Science

Kyungpook National University   1994 — 1996
MS, Electrical and Electronics Engineering

SRI HARSHA PANCHANAM SRI HARSHA PANCHANAM San Francisco Bay Area Details
SRI HARSHA PANCHANAM's Atria Logic Inc. Experience November 2011 - March 2012
Job ASIC DESIGN VERIFICATION ENGINEER at Marvell Semiconductor
Industry Electrical/Electronic Manufacturing
Experience
Marvell Semiconductor  March 2012 - Present
Atria Logic Inc.   November 2011 - March 2012
Ciena  June 2011 - October 2011
SAN JOSE STATE UNIVERSITY  August 2010 - February 2011

Skills
System Verilog, UVM, Verilog, C++, C, VMM, PERL, Assertions, SystemVerilog, Perl, SoC

Education
IEEE BOSTON   2011 — 2011
PROFESSIONAL TRAINING, SYSTEM VERILOG BASICS

UC SANTA CRUZ EXTENSION   2011 — 2011
PROFESSIONAL TRAINING, SYSTEM VERILOG FOR ADVANCED DESIGN VERIFICATION

San Jose State University   2009 — 2011
Masters, VLSI- ASIC / FPGA DESIGN AND VERIFICATION

AITS   2004 — 2008
BS, ELECTRONICS AND COMMUNICATIONS ENGINEERING

Deudutta Nagori Deudutta Nagori Tempe, Arizona Details
Deudutta Nagori's Atria Logic Inc. Experience March 2012 - March 2013
Job Experienced professional(2 years) actively seeking full time opportunity in Design Verification, RTL or Circuit Design
Industry Semiconductors
Experience
Intel Corporation  August 2015 - Present
Atria Logic Inc.   March 2012 - March 2013
Maven Silicon  April 2012 - August 2012
Tata Consultancy Services  2011 - 2012

Skills
Verilog, Red Hat Linux, Perl, Xilinx ISE, ModelSim, Questa, Make File, SVA, SystemVerilog, Open Verification..., Debugging, EDA, Linux, Analog, VHDL, ASIC, Analog Circuit Design, Logic Synthesis, Functional Verification, RTL design, UVM, VLSI, Integrated Circuit..., Xilinx, RTL coding, RTL Design

Education
Arizona State University   2013 — 2015
Master of Science (MS), Analog and mixed mode signal design, 3.7/4

KLE's college of Engineering and Technology, Belgaum   2007 — 2011
Bachelor of Engineering (BE), Electrical, Electronics and Communications Engineering, 76.06%

RLS Science