Fastrack Design

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Fastrack Design Employees

Employee
Years
Job
Industry
Donald Zulch Donald Zulch San Francisco Bay Area Details
Donald Zulch's Fastrack Design Experience January 2011 - April 2011
Job Software Engineer at Cisco
Industry Computer Software
Experience
Cisco  April 2011 - August 2011
Fastrack Design   January 2011 - April 2011
Wattminder  January 2010 - November 2010
Fastrack Design   February 2008 - March 2009
Novariant  October 2007 - February 2008
Infinisim, Inc.   April 2005 - February 2007
Ciranova, Inc.   July 2004 - November 2004
Numerical Technologies, Inc.   December 2000 - March 2003
Engineering DataXpress, Inc.   April 1996 - December 2000
Octal   1988 - 1990

Skills
TCL, Java, Linux, ANTLR, Object Oriented Design, Algorithms, Circuit Simulation, Valgrind, C++, MySQL, Subversion, Purify, Windows, Eclipse, Web Services, EDA, Electronics, Unix, Databases, Software Development

Education
University of California, Santa Cruz   1982 — 1983
B.A., Computer and Information Sciences

University of California, Santa Cruz   1978 — 1981
B.A., Mathematics

Marshall Gingold Marshall Gingold San Francisco Bay Area Details
Marshall Gingold's Fastrack Design Experience August 2006 - March 2008
Job Leveraging over 15 years of silicon proven success and experience for the next generation of ASIC Designs
Industry Semiconductors
Experience
eSilicon  April 2015 - Present
Uniquify, Inc.   March 2008 - March 2015
Fastrack Design   August 2006 - March 2008
Magma Design Automation  December 2004 - August 2006
Synopsys  2002 - 2004
Avant! Corporation  1997 - 2002
Analog Devices  1995 - 1997
Sony Semiconductor  1992 - 1995
AT&T Microelectronics Inc.   September 1987 - 1992
AT&T Microelectronics, Inc.   June 1985 - September 1987

Skills
Business Networking, Semiconductor Industry, Business Development, ASIC, Start-ups, Semiconductors, Turnkey Projects, SoC, IC, Integrated Circuit..., Verilog, FPGA, Physical Design, Microprocessors, Analog, VLSI, Low-power Design, Embedded Systems, EDA, Processors, Debugging, Product Development, Mixed Signal, Logic Design, Timing Closure, DFT, RTL design, DDR2, Static Timing Analysis, Power Analysis, Logic Synthesis, Hardware Architecture, Digital Signal..., VHDL, DRC, Floorplanning, Place & Route, Formal Verification, Compilers, BIST, Clock Tree Synthesis, PCB design, Analog Circuit Design, Primetime, Physical Verification, LVS, Power Management, DDR3 DDR2 PHY CONTROLLER

Education
University of Michigan   1980 — 1981
MS Degree, Computer Information and Control Engineering

Stony Brook University   1976 — 1980
BS Degree, Computer Science, Minor in EE, Business

Pradeep Kumar Sarihaddu Pradeep Kumar Sarihaddu San Diego, California Details
Pradeep Kumar Sarihaddu's Fastrack Design Experience October 2008 - April 2009
Job Staff Engineer at Qualcomm
Industry Electrical/Electronic Manufacturing
Experience
Qualcomm  July 2011 - Present
Rapid Bridge  November 2010 - July 2011
Fastrack Design   October 2008 - April 2009

Skills
Xilinx, TCL, Verilog, VLSI, Cadence Virtuoso, Magma, VCS, Primetime, Static Timing Analysis, Timing Closure, Physical Design, SoC, ModelSim, VHDL, RTL design, NC-Verilog, EDA, Formal Verification, Functional Verification, Perl, Floorplanning, IC, FPGA, Power Analysis, Scripting, Computer Architecture, Microprocessors, CMOS, Hardware Design, Logic Design, Low Power Design, RTL coding, Digital Electronics, Mixed Signal, Circuit Design, Clock Tree Synthesis, Physical Verification, Compilers, DRC, LVS, Digital Design, NCSim, DSP, Analog Design, Semiconductors, ASIC, Signal Integrity, Conformal low power

Education
San Jose State University   2007 — 2010
Masters, Electrical Engineering (VLSI concentration)

Jawaharlal Nehru Technological University   2002 — 2006
Bachelors, Electronics and Communications Engineering

Chris Luk Chris Luk Los Altos, California Details
Chris Luk's Fastrack Design Experience August 2011 - December 2012
Job Graduate Student
Industry Higher Education
Experience
Santa Clara University  January 2014 - Present
LukaSip Archery   April 2010 - Present
USCA (United States Collegiate Archery)   December 2012 - December 2014
Foothill College  January 2012 - December 2012
Fastrack Design   August 2011 - December 2012
UC San Diego  September 2011 - December 2011
UC San Diego  April 2011 - July 2011
Ancaster Sport Medicine   August 2010 - August 2010
City of Mountain View  January 2006 - January 2006

Skills
Scanning Probe..., Spectral Analysis, Python, C++, Java, Perl, Coaching, Spice, Nirspec, Unix, IDL, Adobe Photoshop, Adobe Premiere, Adobe Illustrator, Mathematica, GIMP, Microsoft office, Google Docs

Education
University of California, Los Angeles   2014 — 2016
Master's degree, Engineering

Santa Clara University   2012 — 2015
Master of Science (M.S.), Sustainable Energy Engineering

University of California, San Diego   2008 — 2012
Bachelor's degree, Physics

Kirti Parmar Kirti Parmar San Francisco Bay Area Details
Kirti Parmar's Fastrack Design Experience August 2006 - May 2007
Job Product & Customer Engagement Management
Industry Semiconductors
Experience
Magma Design Automation (acquired by Synopsys)   December 2007 - March 2012
Fastrack Design   August 2006 - May 2007
Pulsic, Inc.   July 2004 - December 2005
Monterey Design Systems  March 2003 - July 2004
Magma Design Automation  March 2000 - October 2002
Cadence Design Systems  March 1999 - March 2000
Cadence Design Systems  January 1997 - March 1999
Cadence Design Systems  January 1991 - December 1996
Cadence Design Systems (formerly Tangent Systems)   1987 - 1990
VR Information Systems/ Tektronix, CAESystems Division   1981 - 1987

Skills
Product Development, Product Engineering, Program Management, Strategic Alliances, Major Accounts, Customer Engagement, EDA, IC, Business Development, Physical Design, Semiconductors, ASIC, SoC, VLSI, TCL, Software Development, Field Operations, Release Management, Quality Management, Product Management, Integrated Circuit..., Cross-functional Team..., Static Timing Analysis, Floorplanning, Strategic Partnerships, Mixed Signal, Low-power Design, Verilog, Physical Verification, Analog Circuit Design, Signal Integrity, CMOS

Education
The University of Texas at Austin
M.S.E.E., Electrical Engineering

University of Louisville
B.S.E.E., Electrical Engineering

Omar Faruk Omar Faruk Chandler, Arizona Details
Omar Faruk's Fastrack Design Experience October 2009 - February 2010
Job Staff Physical Design Engineer at Microchip Technology
Industry Semiconductors
Experience
Microchip Technology  September 2012 - Present
MaxLinear  February 2010 - September 2012
Fastrack Design   October 2009 - February 2010
Cadence Design Systems  2003 - 2009
Cadence Design Systems  2001 - 2003
Tality Corporation (Cadence Subsidiary)   2000 - 2001
KBS Corporation   1999 - 2000

Skills
Static Timing Analysis, ASIC, EDA, Primetime, Physical Design, Low-power Design, Physical Verification, Formal Verification, Timing, Place & Route, Timing Closure, DRC, Floorplanning, Clock Tree Synthesis, Signal Integrity, Redhawk, ECO, Prototyping, Power Analysis, Low Power Design, Power Integrity, SoC, Debugging, Integrated Circuit...

Education
University of Missouri-Rolla   1996 — 1999
MS

Bangladesh University of Engineering and Technology   1989 — 1995
BS

Viresh Hingarh Viresh Hingarh San Francisco Bay Area Details
Viresh Hingarh's Fastrack Design Experience December 2007 - May 2008
Job Distinguished Engineer at Eximius Design
Industry Semiconductors
Experience
Eximius Design   January 2015 - Present
Self-Employed  February 2014 - December 2014
Emulex  February 2012 - February 2014
Emulex  September 2010 - May 2012
ServerEngines  July 2010 - November 2010
Synapse Design Automation   May 2008 - July 2010
Fastrack Design   December 2007 - May 2008
Fastrack Design   January 2007 - December 2007
Fastrack Design   January 2005 - January 2007
Silicon Access Networks  June 2001 - June 2002

Skills
Static Timing Analysis, Physical Design, SoC, Logic Synthesis, Floorplanning, Place & Route, Processors, Magma, ASIC, VLSI, Routing, P&R, IC, Semiconductors

Education
Santa Clara University   2002 — 2004
Masters, Electrical Engineering

California Polytechnic State University-San Luis Obispo   1997 — 2001
Bachelor of Science (B.S.), Computer Engineering

Sruthi Ranganathan Sruthi Ranganathan San Francisco Bay Area Details
Sruthi Ranganathan's Fastrack Design Experience May 2007 - February 2009
Job Senior Engineer at Qualcomm
Industry Electrical/Electronic Manufacturing
Experience
Qualcomm  June 2013 - Present
QLogic Corporatio   March 2011 - May 2013
QLogic Corporation  July 2009 - February 2011
Fastrack Design   May 2007 - February 2009

Skills
ASIC, Verilog, TCL, VLSI, SystemVerilog, Debugging, Semiconductors, Static Timing Analysis, EDA, C, Physical Design, IC, Timing Closure

Education
Case Western Reserve University   2003 — 2006
Master of Science (MS), Electrical Engineering

Sri Venkateswara University   1999 — 2003
B.E, E.C.E

Arya Raychaudhuri Arya Raychaudhuri San Francisco Bay Area Details
Arya Raychaudhuri's Fastrack Design Experience May 2010 - October 2011
Job LVS DEBUG Consultant
Industry Semiconductors
Experience
LVS DEBUG SOLUTIONS LLC   October 2011 - Present
Fastrack Design   May 2010 - October 2011
Jasper Display Corp   December 2010 - August 2011
Fastrack Design   July 2009 - April 2010
Uniquify   May 2009 - June 2009
PLX Technology  2009 - 2009
PLX Technology  2009 - 2009
Fastrack Design   December 2007 - December 2008
Ikanos Communications  2007 - 2007
AMD  2004 - 2006

Skills
Physical Design, IC, Semiconductors, LVS, TCL, CMOS, Mixed Signal, Perl, Primetime, SPICE, EDA

Education
Simon Fraser University   1991 — 1995
Ph.D., Electrical Engineering (Devices)

Jadavpur University   1976 — 1983
M.E., Electronics & Telecomm Engg

Israr Qumer Israr Qumer San Francisco Bay Area Details
Israr Qumer's Fastrack Design Experience October 2003 - September 2004
Job Unified Communications Technician II at Lockheed Martin Space Systems Company
Industry Information Technology and Services
Experience
Redapt, Inc.   2014 - 2015
Redapt, Inc.   2014 - 2015
Lockheed Martin Space Systems Company  August 2011 - July 2013
Mills Station Town-homes   May 2009 - September 2011
Rotaract District 5170   June 2009 - June 2010
Mineta Transportation Institute  June 2008 - April 2009
Microsoft  October 2006 - October 2007
FOOTHILL-DE ANZA COMMUNITY COLLEGE DISTRICT  July 2005 - October 2006
DR. MOHAMMED F. AHMED OFFICE   July 2004 - July 2005
Fastrack Design   October 2003 - September 2004

Skills
Adobe Creative Suite, Microsoft Office, Microsoft Certified..., Network Administration, Computer Network..., Wireless Networking, Outlook, Active Directory, Network Security, Cisco Routing &..., Backup & Restore, Non-profits, Community Service, Organizational..., Team Leadership, Leadership Development, Technical Leadership, Learn New Software..., Dedication to..., Linux, Red Hat Linux, Linux System..., Windows Server, Windows Vista, Windows XP Pro, Windows 2000, Windows NT, Video Conferencing, Desktop Environment, Remote Desktop, Desktop Computers, Desktop Administration, Linux Desktop, Security, Servers

Education
San Jose State University   2007 — 2008

De Anza College   2002 — 2005
AA, AA Liberal Arts – Science, Math and Engineering Emphasis

De Anza College   1999 — 2001
AA, Computer Networking Administration

Larry Gletzer Larry Gletzer San Francisco Bay Area Details
Larry Gletzer's Fastrack Design Experience April 2008 - 2009
Job President, 50LAR INC
Industry Environmental Services
Experience
50LAR INC   August 2011 - Present
PTSI  2009 - July 2011
FASTRACK DESIGN   April 2008 - 2009
ReDesign Gallery   November 2005 - October 2007
Quantum Think   2003 - 2005
Sonics, Inc.   1999 - 2001
Numerical Technologies  1997 - 1999
Compass Design Automation / VLSI / Philips Semi   1995 - 1997
Valid Logic Systems  1984 - 1991

Skills
Tactical Marketing, Sales Management, Solar, Semiconductors, Start-ups, Sales, Solar Energy, Telecommunications, Management, Marketing Strategy

Education
Golden Gate University   1986 — 1987
MBA - not completed, Finance

The Ohio State University   1976 — 1979
BS, Electrical Engineering

Grant Schaeffer Grant Schaeffer San Francisco Bay Area Details
Grant Schaeffer's Fastrack Design Experience January 2004 - August 2006
Job Sr. Account Manager at Mentor Graphics
Industry Semiconductors
Experience
Mentor Graphics  August 2006 - Present
Fastrack Design   January 2004 - August 2006

Skills
Enterprise Software, SaaS, Solution Selling, Sales Management, Ethernet, ASIC, Product Management, Semiconductors, EDA, Strategic Partnerships, FPGA, Direct Sales, Salesforce.com, Start-ups, SoC, Sales Process, Complex Sales, Account Management, Sales, Cloud Computing

Education
Pierce College   1978 — 1981