Sequence Design

Industry: Software company

Description

Headquarters: Santa Clara, CA Founded: 1995

Sequence Design List of Employees There's an exhaustive list of past and present employees! Get comprehensive information on the number of employees at Sequence Design. You can filter them based on skills, years of employment, job, education, department, and prior employment.

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23 Sequence Design employees in database. Find out everything there's to know about Sequence Design employees. We offer you a great deal of unbiased information from the internal database, personal records, and many other details that might be of interest to you.

Sequence Design Employees

Employee
Years
Job
Industry
Sergei Sokolov Sergei Sokolov Greater Boston Area Details
Sergei Sokolov's Sequence Design Experience April 1998 - June 2004
Job Bullfighter of Challenges
Industry Computer Software
Experience
Altisource Labs  April 2014 - Present
Smart Bear Software   June 2012 - January 2014
SmartBear Software  July 2010 - June 2012
Parasoft  November 2008 - July 2010
Parasoft  February 2008 - November 2008
Parasoft  July 2004 - January 2008
Sequence Design   April 1998 - June 2004
ASC  May 1994 - March 1998

Skills
Software Development, Agile Methodologies, Enterprise Software, SaaS, Cloud Computing, Product Development, Product Management, Leadership, Cross-functional Team..., Distributed Team..., Test Automation, Requirements Analysis, Pre-sales, Testing, Embedded Systems, Agile Project Management, Quality Assurance, Software Engineering, Scrum, Automation, Strategy, SOA, Software Project..., Professional Services, Web Services

Education
University of Massachusetts, Amherst   1992 — 1994
MS, Electrical and Computer Engineering

Moscow Institute of Physics and Technology (State University) (MIPT)   1984 — 1990
MS, General and Applied Physics

Jim Lochmiller Jim Lochmiller San Francisco Bay Area Details
Jim Lochmiller's Sequence Design Experience 2000 - 2009
Job Public Relations Manager, North America at TSMC
Industry Public Relations and Communications
Experience
TSMC  March 2011 - Present
lochpr   1999 - March 2011
Sequence Design   2000 - 2009
Cadence Design  1996 - 1999
AMD  1993 - 1996

Education
California State University-East Bay   1981 — 1983
BA, Journalism

University of Nebraska-Lincoln   1976 — 1978
Journalism

Rajat Sewal Rajat Sewal San Francisco Bay Area Details
Rajat Sewal's Sequence Design Experience August 2005 - February 2009
Job Sr Design Verification Engineer at GeniaRoche
Industry Semiconductors
Experience
Genia-Roche   June 2015 - Present
Qualcomm  August 2014 - May 2015
Microsoft  August 2012 - August 2014
Intel Corporation  February 2012 - August 2012
EDATechForce, LLC   April 2009 - January 2012
Sequence Design   August 2005 - February 2009
Cadence Design Systems  January 2004 - June 2005
Tera Systems  April 2003 - May 2004
Synopsys  March 2001 - March 2003
National Semiconductor  August 1998 - March 2001

Skills
Analog Circuit Design, EDA, RTL design, DFT, Primetime, DESIGN VERIFICATION, MATLAB, CMOS, TCL, UVM, Functional Verification, Verilog, IC, Logic Synthesis, ASIC, Circuit Design, I2C, Simulations, Perl, Synopsys tools, FPGA, Formal Verification, SystemVerilog, Matlab, Digital Signal..., RTL coding, Low-power Design, SoC, SystemC, VMM, Static Timing Analysis, PLL, Power Analysis

Education
San Jose State University   1996 — 1998
MSEE, Digital Signal Processing

San Francisco State University   1978 — 1983
BSEE + Grad courses in Physics (Minor), Digital and Analog Circuit Design

Baptist High School, Port Harcourt, Nigeria   1971 — 1975
High School, Science & Math

John Sliney John Sliney San Francisco Bay Area Details
John Sliney's Sequence Design Experience 1995 - 1997
Job COO at LawyersandSettlements.com
Industry Marketing and Advertising
Experience
Online Legal Media   August 2008 - Present
Triaz International   2006 - 2008
High Technology Market and Business Development Consulting   2002 - 2006
Mercado Software  2000 - 2002
Zuken-Redac   1998 - 2000
Zuken  1998 - 2000
Zuken USA   1998 - 2000
Meta-Software Corp   1997 - 1998
Frequency Technology Inc.   1995 - 1997
Sequence Design   1995 - 1997

Skills
Mergers, Business Development, Marketing, Venture Capital, Business Planning, Advertising, Strategic Partnerships, Team Leadership, Corporate Law, SaaS, Intellectual Property, Product Marketing, Product Management, Mergers & Acquisitions, Entrepreneurship, New Business Development, Marketing Strategy, Management, Start-ups

Education
University of California, Berkeley   1976 — 1982
Bachelor of Arts (B.A.)

Christopher LaPlante Christopher LaPlante Raleigh-Durham, North Carolina Area Details
Christopher LaPlante's Sequence Design Experience April 2001 - December 2001
Job Director of Emerging Technologies at Fidelity Investments
Industry Financial Services
Experience
Fidelity Investments  June 2015 - Present
Fidelity Investments  July 2013 - June 2015
Fidelity Investments  March 2009 - July 2013
Fidelity Investments  September 2008 - March 2009
Fidelity Investments  June 2005 - September 2008
Bose Corporation  February 2002 - June 2005
Sequence Design   April 2001 - December 2001
Freudenberg-NOK  June 1999 - April 2001
Wright Line  January 1997 - June 1999
Thielsch Engineering  March 1996 - November 1996

Skills
AIX, Solaris, SAN, Veritas Volume Manager, Unix, Shell Scripting, Unix Shell Scripting, High Availability, Virtualization, Linux, Storage, Cluster, Cloud Computing, Enterprise Architecture, ITIL, Servers, Operating Systems, Red Hat Linux, Solaris Zones, Sun, Ksh, Data Center, Veritas Cluster Server, Hadoop, IT Management, Technical Leadership, Big Data, Private Cloud, Cloud Computing IaaS, PaaS, IaaS, System Architecture, Financial Services, Perl, VIOS, RHEL, Veritas Storage..., Linux System..., System Administration, Scripting, Performance Tuning, Oracle RAC, Veritas, Storage Area Networks, NetApp, Architecture, HBase, Hive, Flume, Distributed Systems

Education
Western New England University   1991 — 1995
BS, Mechanical Engineering

University of Massachusetts Lowell   1989 — 1991
Mechanical Engineering

Peter Dreifus Peter Dreifus Greater Boston Area Details
Peter Dreifus's Sequence Design Experience April 1997 - August 2001
Job Chief Operating Officer at Escher Group
Industry Computer Software
Experience
Escher Group  September 2009 - Present
Escher Group  March 2007 - April 2008
Escher Group  June 2001 - March 2007
Sequence Design   April 1997 - August 2001
Avery Dennison  April 1995 - April 1997
Avery Dennison  December 1991 - April 1995
Deloitte  November 1986 - December 1991

Skills
Mergers & Acquisitions, Finance, Financial Modeling, Accounting, Negotiation, Sales, Mergers, Start-ups, Auditing, Financial Reporting, Management, Business Strategy, Venture Capital, Financial Analysis, Strategic Planning, Strategy, Executive Management, Cross-functional Team..., Due Diligence, Leadership, Debt Restructuring

Education
University of Massachusetts Boston   1980 — 1983
B.S., Management

Doug Kaufman Doug Kaufman San Francisco Bay Area Details
Doug Kaufman's Sequence Design Experience July 1995 - August 2008
Job Senior Principal Engineer at Ansys Apache
Industry Computer Software
Experience
Apache Design Solutions  February 2010 - Present
Sequence Design   July 1995 - August 2008
Frequency Technology   1995 - 2000
Synopsys  April 1992 - June 1995
Analog Design Tools   July 1983 - December 1990
Comsat General Integrated Systems (CGIS)   August 1980 - July 1983

Education
Stanford University   1980 — 1981
MSEE, Computer Software

Santa Clara University   1976 — 1980
Bachelor of Science (BS), EE

Al Lipinski Al Lipinski San Francisco Bay Area Details
Al Lipinski's Sequence Design Experience 2002 - 2005
Job VP Sales at Incentia
Industry Semiconductors
Experience
Incentia Design Systems   April 2009 - Present
EVE  2005 - 2007
Sequence Design   2002 - 2005
Meta Software  1990 - 1995
Daisy Systems  1988 - 1991
Silc   1987 - 1989

Skills
Forex Currency Trader, Photograher, ASIC, EDA, Semiconductors, Start-ups, Mergers, Venture Capital, Product Marketing, Marketing, Business Planning, Analog, Strategic Partnerships, Sales, Direct Sales, Product Management, Wireless, Mixed Signal, Management, Product Development, Semiconductor Industry, Mergers & Acquisitions, Go-to-market Strategy, IC, Sales Management, Cross-functional Team..., FPGA, New Business Development, SoC

Education
Southern Illinois University, Carbondale   1970 — 1974
BSEE, Electronics

Southern Illinois University, Carbondale   1970 — 1974
Bachelor of Science (BS), Electrical Engineering

Tatung Chow Tatung Chow San Francisco Bay Area Details
Tatung Chow's Sequence Design Experience July 2001 - November 2003
Job at ASML
Industry Computer Software
Experience
ASML  May 2011 - Present
Luminescent Technologies  August 2009 - April 2011
Cadence  July 2007 - August 2009
Apache Design Solutions  November 2003 - July 2007
sequence design   July 2001 - November 2003
Dept. of Electronic Engineering, National University of Science and Technology   August 1991 - July 2001
PlanetKnowHow, Taiwan Branch   February 2000 - June 2001
Bank of Hawaii  July 1998 - November 1999
Giftburg   September 1996 - July 1998
IBM  August 1989 - July 1991

Skills
Algorithms, Optimizations, R&D, Numerical Analysis, Software Development, Perl, Lithography, Simulations, Metrology, EDA, Optimization, TCL, Semiconductors, IC, Linux, VLSI, Python, SoC, Shell Scripting, Unix, Software Engineering, ASIC, Debugging, Optics, Matlab, C++, Engineering Management, Semiconductor Industry

Education
University of Colorado at Boulder   1984 — 1989
Ph.D., Computer Science

National Chiao Tung University
BS, Computer Engineering

James Hemeon James Hemeon San Francisco Bay Area Details
James Hemeon's Sequence Design Experience 2001 - 2002
Job SVP, WW Sales & Mktg at Innovative Logic
Industry Semiconductors
Experience
Innovative Logic   May 2015 - Present
Synapse Design Automation   May 2008 - December 2014
KeyASIC   May 2007 - April 2008
Alchip Technologies  April 2005 - March 2007
Gidel, Ltd.   2002 - 2005
Sequence Design   2001 - 2002
Monterey Design Systems  2000 - 2001
DynaChip   1999 - 2000
Synopsys  1997 - 1999
Lockheed-Sanders  1985 - 1997

Skills
Business, Semiconductors, ASIC, IC, FPGA, Start-ups, Semiconductor Industry, Business Development, SoC, Management, EDA, Wireless, Product Management, Go-to-market Strategy, Cross-functional Team..., Account Management, Digital Signal..., Mixed Signal, Leadership, Embedded Systems, Product Marketing, Consumer Electronics, Electronics, RF, Embedded Software, Analog, Sales

Education
University of Massachusetts Lowell   1984 — 1988
BSEE, Electrical Eng

NH Technical Institute
ASEE, Elec Eng

Hillol Sarkar Hillol Sarkar Lake Forest, California Details
Hillol Sarkar's Sequence Design Experience 2000 - 2001
Job President and CEO AgO Synthesis
Industry Semiconductors
Experience
AgO Synthesis Inc.   October 2008 - Present
Sequence Design   2000 - 2001
Kendin Communication   1999 - 2000
VLSI Technology  1995 - October 1997
Epson  1996 - 1997
NEC  1992 - 1994
Toshiba  March 1986 - April 1992
General Electric Company  1985 - 1986
Avnet  September 1983 - September 1985

Skills
ASIC, Product Marketing, SoC, Semiconductors, EDA, Start-ups, IC, Semiconductor Industry, Analog, Mixed Signal, Entrepreneurship, Business Planning, Strategy, Wireless, Embedded Systems, RF, Product Management, Executive Management, CMOS, Electronics, Digital Signal..., Analog Circuit Design, Verilog, LTE, Debugging, Embedded Software, VLSI, Integrated Circuit..., Simulations, Hardware Architecture, Consumer Electronics, Low-power Design, Microprocessors, Circuit Design, VHDL, RTL design, Power Management, PLL, Physical Design, Processors, Cadence Virtuoso, IP, Silicon, Biotechnology, Next Generation..., DFSS, Medical Devices, Medical Device R&D, Management, Cross-functional Team...

Education
South Dakota State University   1981 — 1983
MSEE, Electrical Engineering, 3.8

College of Engineering, Guindy   1973 — 1978
Bachelor of Engineering (BE), Electrical and Electronics Engineering, Battery Powered Car

College of Engineering, Guindy   1973 — 1978
Bachelor of Engineering (BE), Electrical and Electronics Engineering, High

Ajay Bisht Ajay Bisht San Jose, California Details
Ajay Bisht's Sequence Design Experience April 2008 - September 2009
Job Manager, Software Development at ANSYS Apache
Industry Semiconductors
Experience
ANSYS Apache  March 2015 - Present
ANSYS Apache  February 2012 - March 2015
Apache Design Solutions  September 2009 - February 2012
Sequence Design   April 2008 - September 2009
Sequence Design   April 2006 - March 2008
Sequence Design   September 2004 - April 2006
Mentor Graphics  January 2003 - September 2004

Skills
VLSI, Debugging, Low-power Design, Simulations, C++, SoC, Programming, Static Timing Analysis, Semiconductors, SystemVerilog, OOP, Functional Verification, VHDL, Algorithms, Logic Synthesis, IC, ModelSim

Education
Indian Institute of Technology, Kharagpur   2001 — 2003
Master of Technology, Computer Science & Engineering

UCSC Silicon Valley Extension   2014 — 2014
Physical Design Flow From Netlist to GDSII, VLSI Engineering

Kumaun University   1997 — 2001
Bachelor of Engineering, Computer Science & Engineering

SBM, Hari Nagar, New Delhi   1995 — 1997
AISSCE, English, Mathematics, Biology, Chemistry, Physics

Saraswati Bal Mandir, Punjabi Bagh, New Delhi   1990 — 1995
SSE

Lorne Cooper Lorne Cooper Greater Boston Area Details
Lorne Cooper's Sequence Design Experience 2000 - 2002
Job Executive Supercharging Technology Businesses
Industry Computer Software
Experience
Bulger Partners  October 2014 - Present
Walnut Ventures Llc   August 2014 - Present
h2so4 Consulting   July 2012 - Present
Massachusetts Institute of Technology  September 2006 - Present
Accurev  April 2005 - June 2012
Silicon Dimensions   January 2004 - December 2005
Progress Software  2001 - 2004
Sequence Design (Sente)   2000 - 2003
Sequence Design   2000 - 2002
Sente Inc.   1994 - 2000

Skills
Product Management, Enterprise Software, Venture Capital, Sales, Business Development, Go-to-market Strategy, Product Marketing, Software Engineering, Software Development, EDA, Demand Generation, Team Building, CEOs, Start-ups, Executive Management, Strategic Partnerships, Leadership, Management, Solution Selling, Configuration Management, Agile Methodologies, Entrepreneurship, Professional Services, Sales Enablement, Corporate Development, AccuRev, Wireless, Integration, System Architecture, Salesforce.com, Angel Investing, Business Planning, Consulting, Strategy, Business Strategy, Executive Coaching

Education
Massachusetts Institute of Technology   1975 — 1980
BS

Vinay Srinivas Vinay Srinivas San Francisco Bay Area Details
Vinay Srinivas's Sequence Design Experience 1998 - 2006
Job R&D Group Director at Synopsys
Industry Computer Software
Experience
Synopsys  June 2007 - Present
Archpro Design Automation   2006 - 2007
Sequence Design   1998 - 2006
Stanford Linear Accelerator Center (SLAC)   1995 - 1998

Education
Indian Institute of Technology, Bombay   1985 — 1989

University of Florida

Mary Ann Ho Mary Ann Ho San Francisco Bay Area Details
Mary Ann Ho's Sequence Design Experience 2006 - 2007
Job Interpreter at Language Line Services
Industry Marketing and Advertising
Experience
Language Line Services  May 2008 - Present
Sequence Design   2006 - 2007
Mentor Graphics, Inc / Inventra IP Division   1999 - 2002

Skills
Marketing Communications, Interpreting, Localization, Translation, Technical Translation, Language Services, English, Linguistics, Management, Subtitling

Education
San Jose State University   1987 — 1990

Alain Labat Alain Labat San Francisco Bay Area Details
Alain Labat's Sequence Design Experience January 1998 - May 2002
Job Managing Director at Harvest Management Partners
Industry Investment Banking
Experience
Aintu, Inc.   October 2013 - Present
ASELTA Nanographics   May 2012 - Present
FCA Fiat Chrysler Automobiles  June 2011 - Present
Harvest Management Partners, LLC   June 2010 - Present
French American School of Silicon Valley   1992 - Present
Marseille Networks  September 2006 - 2012
VaST Systems   December 2004 - May 2010
Jasper Design Automation  January 2002 - October 2008
Tera Systems  July 2002 - November 2004
Sequence Design   January 1998 - May 2002

Skills
EDA, M&A experience, Capital Raising, Executive Management, Strategic Partnerships, Corporate Development, ASIC, Angel Investing, Early Stage Companies, Venture Financing, Enterprise Software, Go-to-market Strategy, SaaS, New Venture Development, Product Launch, Business Alliances, Business Modeling, Venture Capital, Start-up Ventures, New Ventures, Virtualization, Start-ups, Product Marketing, Semiconductors, Global Business..., IC, Private Equity, Mobile Devices, Cleantech, Strategic Alliances, Wireless, Growth Capital, IPO, Divestitures, Investment Banking

Education
Thunderbird School of Global Management   1980 — 1980
MBA, Marketing, Global Business

INSEEC   1975 — 1978
Bachelor's degree, Economics and Finance

Valerie Ohm Valerie Ohm San Jose, California Details
Valerie Ohm's Sequence Design Experience January 2001 - November 2001
Job Senior Software Engineer at Tata Communications/BitGravity
Industry Semiconductors
Experience
Tata Communications  April 2015 - Present
Cadence Design Systems, Inc.   August 2002 - September 2014
Simplex  January 2002 - August 2002
Sequence Design   January 2001 - November 2001
Sente   September 1999 - January 2001
Northeastern University  June 1999 - September 1999
Cirrus Logic  1989 - 1993

Skills
C++, Software Engineering, Software Development, Algorithms, EDA, High Performance..., Software Design, Parallel Computing, TCL, ASIC, SoC, Semiconductors, Physical Design, Power Estimation, VLSI, CVS, IC, Verilog, C/C++ STL, Parsing, C, Yacc, Lex, Boost C++, GNU tools, Bug Tracking, Perforce, Debugging, Perl

Education
Cornell University   1993 — 1999
PhD, Computer Engineering

Massachusetts Institute of Technology   1989 — 1993
SB, Electrical Engineering

Phil Wetmore Phil Wetmore Woburn, Massachusetts Details
Phil Wetmore's Sequence Design Experience 1999 - 2000
Job Independent Signal Integrity Consultant
Industry Semiconductors
Experience
Independent  2009 - Present
Toshiba America Electronic Components  2002 - 2008
Cadence Design Systems  2001 - 2002
Magma Design Automation  2000 - 2001
Sequence Design   1999 - 2000
Cadence Design Systems  1996 - 1999
Chrysalis Symbolic Design  1995 - 1996
Digital Equipment Corporation  1989 - 1995
National Semiconductor  1985 - 1989

Skills
Signal Integrity, ASIC, SPICE, Simulations, EDA, IC, PCB design, Analog, Verilog, Debugging, VHDL, CMOS, Digital Signal..., Mixed Signal, Electrical Engineering, Semiconductors, Physical Design, SoC, Cadence, Formal Verification, TCL

Education
Purdue University   1979 — 1982
M.S., Physics, 6.0/6.0

Worcester Polytechnic Institute   1975 — 1979
B.S., Physics, 3.9/4.0

University of Oklahoma   1982 — 1984
MS, Meteorology

Bill Jerdee Bill Jerdee Dallas/Fort Worth Area Details
Bill Jerdee's Sequence Design Experience 2000 - 2001
Job IC Design Engineer
Industry Semiconductors
Experience
ARM  2004 - 2011
Artisan Components  2001 - 2004
Sequence Design   2000 - 2001
Sente   1999 - 2000
Summit Design  1997 - 1999
Synopsys  1995 - 1997
Cabletron Systems  1994 - 1995
DSC Communications  1993 - 1994
Convex Computer Corporation  1985 - 1993

Skills
Physical Verification, DRC, Timing Closure, EDA, Floorplanning, Power Analysis, RTL design, IP Integration

Education
Southern Methodist University
MSEE, Electrical Engineering

Oberlin College
BA, Mathematics

Washington University
BSEE, Electrical Engineering

Guy Regnier Guy Regnier Sacramento, California Area Details
Guy Regnier's Sequence Design Experience August 2000 - October 2002
Job Regional LIS Manager at Sutter Health
Industry Hospital & Health Care
Experience
Sutter Health  January 2003 - Present
Sequence Design   August 2000 - October 2002
Roche Molecular Systems Inc  December 1999 - August 2000
Santa Clara Valley Medical Center Laboratory   August 1993 - December 1999

Skills
Healthcare Information..., EHR, Epic Systems, EMR, Hospitals, Healthcare, HIPAA, HL7, Healthcare Management, CPOE, Informatics, Revenue Cycle

Education
Cal State Hayward
BS, Clinical Laboratory Science

Univeristy of Iowa
Busines, Computer Science

Taufik Arifin Taufik Arifin Santa Clara, California Details
Taufik Arifin's Sequence Design Experience 1999 - 2000
Job VP of Product and Marketing at TuringSense
Industry Computer Software
Experience
TuringSense   2015 - Present
Cadence Design Systems  November 2013 - 2015
Cadence Design Systems  April 2006 - November 2013
Cadence Design Systems  April 2002 - April 2006
Plato Design Systems   December 2000 - April 2002
Sequence Design   1999 - 2000
Cadence Design Systems  1997 - 1999
Cadence Design Systems  1992 - 1997
Automated Systems Inc.  1988 - 1992

Skills
Leadership, Management, Project Management, Scripting, Software Development, Software Project..., ASIC, Technical Support, Pre-sales, Software Quality..., Place & Route, EDA, Physical Design, Perl Script, Awk

Education
Santa Clara University   1993 — 1996
Master's Degree, Computer Engineering, MS

California State University, Fresno   1984 — 1988
Bachelor's Degree, Electrical and Electronics Engineering

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