Sierra Design Automation

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Sierra Design Automation Employees

Employee
Years
Job
Industry
Andy Inness Andy Inness Austin, Texas Area Details
Andy Inness's Sierra Design Automation Experience October 2004 - July 2007
Job
Industry Semiconductors
Experience
Mentor Graphics  June 2013 - Present
Mentor Graphics Corporation  June 2007 - Present
Sierra Design Automation   October 2004 - July 2007
Monterey Design Systems  March 2000 - October 2004
Texas Instruments  June 1993 - March 2000

Skills
Static Timing Analysis, EDA, ASIC, Place & Route, Testing, Start-ups, Physical Synthesis, TCL, SoC, Physical Design, Verilog, Scripting, IC, VLSI, Primetime, Semiconductors, Timing Closure, Integrated Circuit..., VHDL, Low-power Design, Simulations, Debugging, Clock Tree Synthesis, ARM

Education
Southern Methodist University   1994 — 1998
MS

Iowa State university   1988 — 1992
BSEE

Jon Baldry Jon Baldry San Francisco Bay Area Details
Jon Baldry's Sierra Design Automation Experience 2004 - 2006
Job Apps Engineer at Synopsys
Industry Computer Software
Experience
Synopsys  August 1996 - Present
Sierra Design Automation   2004 - 2006
TI ASIC   1993 - 1996
Plessey Semiconductors   1989 - 1991

Skills
EDA, TCL, Perl Script, Physical Design, RTL coding, HTML, PHP, CCI, CGI ..., Algorithms, ASIC, VLSI

Education
Staffordshire University   1985 — 1989
BSc, Information Technology

Kirkley High School
ologies, Beer

Rajagopal Krishnaswamy Rajagopal Krishnaswamy San Francisco Bay Area Details
Rajagopal Krishnaswamy's Sierra Design Automation Experience 2003 - 2003
Job Director, Product Marketing at Broadcom
Industry Semiconductors
Experience
Broadcom  October 2013 - Present
Broadcom  August 2012 - September 2013
Broadcom  February 2012 - August 2012
NetLogic Microsystems  October 2011 - February 2012
NetLogic Microsystems  April 2010 - October 2011
NetLogic Microsystems  June 2009 - June 2010
Netlogic Microsystems  July 2008 - June 2009
NetLogic Microsystems  December 2003 - June 2008
Sierra Design Automation   2003 - 2003

Skills
ASIC, Semiconductors, IC, Mixed Signal, CMOS, Product Management, Product Marketing, Marketing Strategy, Technical Marketing

Education
North Carolina State University   2001 — 2003
Master of Science, Electrical Engineering

Bangalore University   1996 — 2000
BE, Electronics & Communication

Randall Helzerman Randall Helzerman San Francisco Bay Area Details
Randall Helzerman's Sierra Design Automation Experience May 2003 - August 2007
Job Founder at Snark Software
Industry Computer Software
Experience
Bloomberg LP  May 2015 - Present
Snark Software   October 2009 - Present
Bloomberg LP  2015 - 2015
Synopsys  September 2008 - May 2010
Mentor Graphics  August 2007 - September 2008
Sierra Design Automation   May 2003 - August 2007
Intel Corporation  January 1997 - May 2003

Skills
EDA, C++, graph theory, Prolog, Algorithms, Data Structures, Architecture, Objective-C, Graph Theory, Linux, OOP, STL, Software Development, C, Software Engineering, Verilog, Programming, Architectures

Education
Purdue University   1990 — 1993
M.S, Electrical Engineering

University of Evansville   1985 — 1989
B.S, Electrical Engineering

Yufeng (罗宇锋) Luo Yufeng (罗宇锋) Luo San Francisco Bay Area Details
Yufeng (罗宇锋) Luo's Sierra Design Automation Experience May 2003 - June 2007
Job R&D Group Director at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems  January 2012 - Present
Mentor Graphics Corporation  June 2007 - January 2012
Sierra Design Automation   May 2003 - June 2007
Synopsys, Inc.   August 1997 - May 2003
Ross Technology, Inc.   May 1997 - August 1997
Reliant Data Systems  May 1996 - August 1996

Skills
Static Timing Analysis, EDA, Algorithms, Multithreading, Mathematical..., Mathematical Programming, Physical Synthesis, Physical Design, C/C++ STL, Software Engineering, Distributed Systems, OOP, Java, Debugging, SoC, Optimization, Object Oriented Design, C++

Education
The University of Texas at Austin   1995 — 1997
MS

Fudan University   1994 — 1995
Graduate Student (Transferred to UT-Austin)

Shanghai Jiao Tong University   1990 — 1994
BS

PradeepKumar Damera PradeepKumar Damera San Francisco Bay Area Details
PradeepKumar Damera's Sierra Design Automation Experience September 2003 - June 2007
Job US P&R Product Specialist Manager at Mentor Graphics
Industry Computer Software
Experience
Mentor Graphics  June 2007 - Present
Sierra Design Automation   September 2003 - June 2007
Cadence Design Systems  1995 - 2003

Skills
EDA, ASIC, Product Management, TCL, Perl, Debugging, Physical Design, Semiconductors, VLSI, SoC, Software Engineering, Linux, Verilog, Algorithms, Embedded Systems, Static Timing Analysis, IC

Education
The University of Texas at Arlington   1995 — 1996
M.S, Computer Science

Arizona State University   1994 — 1995
M.S, VLSI, Computer Science

Michael(Xin) Jin Michael(Xin) Jin San Francisco Bay Area Details
Michael(Xin) Jin's Sierra Design Automation Experience August 2003 - June 2007
Job EDA tool research and development
Industry Computer Software
Experience
Xilinx  September 2013 - Present
Mentor Graphics  June 2007 - September 2013
Sierra Design Automation   August 2003 - June 2007
Cadence Design Systems  January 2003 - August 2003
Celestry Design Technologies   March 1997 - January 2003

Skills
TCL, EDA, C, Perl, Static Timing Analysis, C++, Algorithms, Verilog, ASIC, Debugging, SoC, VLSI, Shell Scripting, Physical Design, Semiconductors, Computer Architecture, IC, Simulations, VHDL, Device Drivers, RTL design, FPGA, RTL Design

Education
Shanghai Jiao Tong University
Master of Science (MS), EECS

Greg Daughtry Greg Daughtry Greater Denver Area Details
Greg Daughtry's Sierra Design Automation Experience March 2004 - March 2006
Job Director of Product Marketing at Xilinx
Industry Semiconductors
Experience
Xilinx  June 2013 - Present
Qwik Register   March 2007 - 2015
Xilinx  July 2010 - June 2013
Xilinx  June 2008 - July 2010
Xilinx  January 2007 - June 2008
Avago Technologies  March 2006 - January 2007
Sierra Design Automation   March 2004 - March 2006
Monterey Design Systems  January 2002 - March 2004
Hypergrove Engineering   January 2001 - September 2001
Intel  May 1995 - June 2000

Skills
FPGA, EDA, ASIC, SoC, Semiconductors, TCL, Verilog, Go-to-market Strategy, IC, RTL design, Product Marketing, Integrated Circuit..., Hardware Architecture, Processors, Static Timing Analysis, VLSI, Physical Synthesis, Place & Route, Physical Design, Product Management, Software Development, Hardware Development, VHDL, Methodology, Agile Methodologies, Agile Project Management, Java, JavaScript, Perl, Strategic Roadmaps, Xilinx

Education
North Carolina State University   1994 — 1995
M.S., Computer Engineering

North Carolina State University   1988 — 1993
B.S., Electrical Engineering

North Carolina State University   1988 — 1993
B.S., Computer Engineering

Maurizio Damiani Maurizio Damiani San Francisco Bay Area Details
Maurizio Damiani's Sierra Design Automation Experience 2003 - 2007
Job SSE at Xilinx
Industry Computer Hardware
Experience
Xilinx  architectOasys Design Systems2010 - 2011
sierra design automation   2003 - 2007

Skills
EDA, Verilog, Algorithms, TCL, Software Engineering, Embedded Systems, FPGA, ASIC, C++, Debugging, VLSI, VHDL, RTL design, Digital Signal..., SoC

Education
Stanford University   1988 — 1992
PhD, Electrical Engineering

Pravin Madhani Pravin Madhani San Francisco Bay Area Details
Pravin Madhani's Sierra Design Automation Experience January 2003 - June 2007
Job General Manager, Place & Route at Mentor Graphics
Industry Computer Software
Experience
Mentor Graphics  June 2007 - Present
Sierra Design Automation   January 2003 - June 2007
Synopsys  November 1998 - October 2001
Everest Design Automation   May 1997 - November 1998
Silicon Graphics  November 1993 - May 1997
LSI Logic  August 1991 - November 1993

Skills
Semiconductors, EDA, ASIC, SoC, IC

Education
The University of Texas at Austin   1990 — 1991
MS, Electrical and Computer Engineering

Indian Institute of Technology, Bombay   1985 — 1989
B.Tech, EE

Israel Taller Israel Taller San Francisco Bay Area Details
Israel Taller's Sierra Design Automation Experience March 2003 - June 2007
Job Technical Leader at Cisco Systems
Industry Computer Software
Experience
Cisco Systems  May 2013 - Present
Aditazz Inc.  November 2011 - May 2013
Mentor Graphics  June 2007 - November 2011
Sierra Design Automation   March 2003 - June 2007
HierDesign   October 2001 - March 2003
Altoweb  January 2001 - September 2001
Xerox PARC  October 1999 - June 2001
Aristo Technology   October 1997 - November 1999
Altera  August 1988 - March 1993

Skills
EDA, C++, GUI, Software Development, TCL, User Interface, Object Oriented Design, Software Engineering, Python, Software Design, Java, Swing, Linux, Qt, Algorithms

Education
Technion-Machon Technologi Le' Israel