Synapse Design Automation Inc.
Industry: Company
DescriptionFounded: 2003 Subsidiaries: Tech Vulcan, Inc., Synapse Techno Design Innovations Pvt Ltd.
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Synapse Design Automation Inc. Employees
Employee
Years
Job
Industry
Dipeshkumar Chauhan Dipeshkumar Chauhan's Synapse Design Automation Inc. Experience May 2013 - Present
Job Design Verification Engineer
Industry Semiconductors
Experience
Cavium Inc January 2015 - Present
Synapse Design Automation Inc. May 2013 - Present
Intel Corporation October 2014 - December 2014
Infineon Technologies May 2013 - September 2014
QLogic April 2010 - April 2013
PerfectVIPs (Perfectus Technology Solution) April 2008 - April 2010
Texas Instruments November 2005 - March 2008
MindTree October 2005 - March 2008
Globaltech(I)PVT.LTD (VLSI-India Pvt. Ltd) March 2003 - September 2005
Skills
SystemVerilog, OVM, Verilog, Fibre Channel, Ethernet, FCoE, ONFI, SOC Verification, Perl, NCSim, ModelSim, Functional Verification, VMM, SATA, SAS, SPI 4.2, Coverage Analysis, Debugging, SPI, SoC, ASIC, VLSI, RTL design, FPGA, EDA, VHDL, Open Verification..., PCIe, Cadence, Specman, UVM, AMBA AHB, RTL coding, Mixed Signal, TCL, Static Timing Analysis, Formal Verification, Logic Design, Integrated Circuit..., Analysis, RTL Design
Education
CDAC ACTS 2002 — 2002
Post Graduation Diploma, Advance Digital Design & VLSI
Gujarat University 1998 — 2001
BE, Electrical
Govt Polytechnic College 1995 — 1998
Diploma, Electrical
Cavium Inc January 2015 - Present
Synapse Design Automation Inc. May 2013 - Present
Intel Corporation October 2014 - December 2014
Infineon Technologies May 2013 - September 2014
QLogic April 2010 - April 2013
PerfectVIPs (Perfectus Technology Solution) April 2008 - April 2010
Texas Instruments November 2005 - March 2008
MindTree October 2005 - March 2008
Globaltech(I)PVT.LTD (VLSI-India Pvt. Ltd) March 2003 - September 2005
Skills
SystemVerilog, OVM, Verilog, Fibre Channel, Ethernet, FCoE, ONFI, SOC Verification, Perl, NCSim, ModelSim, Functional Verification, VMM, SATA, SAS, SPI 4.2, Coverage Analysis, Debugging, SPI, SoC, ASIC, VLSI, RTL design, FPGA, EDA, VHDL, Open Verification..., PCIe, Cadence, Specman, UVM, AMBA AHB, RTL coding, Mixed Signal, TCL, Static Timing Analysis, Formal Verification, Logic Design, Integrated Circuit..., Analysis, RTL Design
Education
CDAC ACTS 2002 — 2002
Post Graduation Diploma, Advance Digital Design & VLSI
Gujarat University 1998 — 2001
BE, Electrical
Govt Polytechnic College 1995 — 1998
Diploma, Electrical
Govindarajan Natarajan Govindarajan Natarajan's Synapse Design Automation Inc. Experience February 2010 - March 2014
Job Senior Staff at Samsung Semiconductor Inc.,
Industry Semiconductors
Experience
Samsung Semiconductor, Inc. March 2014 - Present
Synapse Design Automation Inc. February 2010 - March 2014
Cypress Semiconductor November 2008 - 2009
Tallika Technologies April 2007 - October 2008
Texas Instruments April 2005 - March 2007
Cadence Design Systems May 2004 - 2005
Magma Design Automation July 2003 - May 2004
Rendezvous On Chip / V-Design September 1998 - July 2003
Skills
Physical Design, Timing Closure, Low Power, IP, SOC, Physical Verification, IR drop, In-Rush Current Analysis, Power EM & Signal EM, Redhawk Analysis on..., STA, VLSI, ASIC, SoC, Static Timing Analysis, Low-power Design, TCL, IC, RTL coding, Place & Route, Magma, Cadence, Clock Tree Synthesis, RTL design, Integrated Circuit..., Verilog, DFT, Hercules, Perl, Compilers, Primetime, LVS, Floorplanning, EDA, SystemVerilog, DRC, Logic Synthesis, RTL Design
Education
Anna University
BE, Electronics & Communication Engineering
Central Polytechnic
DECE, Electronics & Communication Engg
Samsung Semiconductor, Inc. March 2014 - Present
Synapse Design Automation Inc. February 2010 - March 2014
Cypress Semiconductor November 2008 - 2009
Tallika Technologies April 2007 - October 2008
Texas Instruments April 2005 - March 2007
Cadence Design Systems May 2004 - 2005
Magma Design Automation July 2003 - May 2004
Rendezvous On Chip / V-Design September 1998 - July 2003
Skills
Physical Design, Timing Closure, Low Power, IP, SOC, Physical Verification, IR drop, In-Rush Current Analysis, Power EM & Signal EM, Redhawk Analysis on..., STA, VLSI, ASIC, SoC, Static Timing Analysis, Low-power Design, TCL, IC, RTL coding, Place & Route, Magma, Cadence, Clock Tree Synthesis, RTL design, Integrated Circuit..., Verilog, DFT, Hercules, Perl, Compilers, Primetime, LVS, Floorplanning, EDA, SystemVerilog, DRC, Logic Synthesis, RTL Design
Education
Anna University
BE, Electronics & Communication Engineering
Central Polytechnic
DECE, Electronics & Communication Engg
Mike McKean Mike McKean's Synapse Design Automation Inc. Experience September 2010 - September 2015
Job Vice President Product Solutions at FHOOSH, Inc.
Industry Information Technology and Services
Experience
Synapse Design Automation Inc. September 2010 - September 2015
Synapse Design Inc. September 2010 - September 2015
Synapse Design Inc. September 2010 - September 2015
STMicroelectronics May 2005 - September 2010
Agere Systems Inc. September 2001 - May 2005
Agere Systems Inc. December 2000 - September 2001
Motorola Japan; ON Semiconductor March 1997 - December 2000
Motorola 1995 - 1997
Motorola Semiconductor Group/ Motorola Automotive Group February 1987 - March 1995
Skills
Engineering, Strategic Planning, Team Building, Product Development, Budgeting, Change Management, Customer Relations, Negotiation, Forecasting, Process Improvement, New Business Development, P&L Management, Operations Management, Budgets, Contract Negotiation, Product Marketing, Start-ups, Customer Service, ASIC, Strategy, Competitive Analysis, Leadership, Management, Business Development, Executive Management, SoC, IC, Semiconductors, Manufacturing, Wireless, Analog, EDA, Mixed Signal, Semiconductor Industry, Electronics, Cross-functional Team..., Product Management, Timing Closure, Power Management, Strategic Partnerships, Physical Design, Clock Tree Synthesis, DRC, Static Timing Analysis, Physical Verification, LVS, Floorplanning
Education
The University of Texas at Austin - The Red McCombs School of Business 1992 — 1994
MBA
Trinity University 1984 — 1988
BS.ES., Engineering Science, Communications Systems Focus
Synapse Design Automation Inc. September 2010 - September 2015
Synapse Design Inc. September 2010 - September 2015
Synapse Design Inc. September 2010 - September 2015
STMicroelectronics May 2005 - September 2010
Agere Systems Inc. September 2001 - May 2005
Agere Systems Inc. December 2000 - September 2001
Motorola Japan; ON Semiconductor March 1997 - December 2000
Motorola 1995 - 1997
Motorola Semiconductor Group/ Motorola Automotive Group February 1987 - March 1995
Skills
Engineering, Strategic Planning, Team Building, Product Development, Budgeting, Change Management, Customer Relations, Negotiation, Forecasting, Process Improvement, New Business Development, P&L Management, Operations Management, Budgets, Contract Negotiation, Product Marketing, Start-ups, Customer Service, ASIC, Strategy, Competitive Analysis, Leadership, Management, Business Development, Executive Management, SoC, IC, Semiconductors, Manufacturing, Wireless, Analog, EDA, Mixed Signal, Semiconductor Industry, Electronics, Cross-functional Team..., Product Management, Timing Closure, Power Management, Strategic Partnerships, Physical Design, Clock Tree Synthesis, DRC, Static Timing Analysis, Physical Verification, LVS, Floorplanning
Education
The University of Texas at Austin - The Red McCombs School of Business 1992 — 1994
MBA
Trinity University 1984 — 1988
BS.ES., Engineering Science, Communications Systems Focus
Sundar Raman Ramani Sundar Raman Ramani's Synapse Design Automation Inc. Experience August 2014 - Present
Job Director of Engineering, ASIC Design at Synapse Design Automation Inc.
Industry Semiconductors
Experience
Synapse Design Automation Inc. August 2014 - Present
Synapse Design Automation Inc. January 2013 - August 2014
Synapse Design Automation Inc. August 2011 - December 2012
Independant Consultant January 2008 - July 2011
QThink IC Design September 2001 - December 2007
HP/Agilent 1996 - 2001
Conics Technology, Singapore August 1991 - July 1994
BPL India Limited August 1989 - September 1991
Skills
Physical Design, VLSI, Floorplanning, Physical Verification, RTL design, IC, Verilog, Microprocessors, CMOS, DRC, RTL coding, Embedded Systems, Mixed Signal, FPGA, LVS, Semiconductors, TCL, Primetime, SystemVerilog, Power Management, Circuit Design, Timing, ASIC
Education
National University of Singapore 1995 — 1996
M.Sc, Micro Electronics
Bharathiar University 1985 — 1989
B.E, Electronics and Communication
SBKV
Synapse Design Automation Inc. August 2014 - Present
Synapse Design Automation Inc. January 2013 - August 2014
Synapse Design Automation Inc. August 2011 - December 2012
Independant Consultant January 2008 - July 2011
QThink IC Design September 2001 - December 2007
HP/Agilent 1996 - 2001
Conics Technology, Singapore August 1991 - July 1994
BPL India Limited August 1989 - September 1991
Skills
Physical Design, VLSI, Floorplanning, Physical Verification, RTL design, IC, Verilog, Microprocessors, CMOS, DRC, RTL coding, Embedded Systems, Mixed Signal, FPGA, LVS, Semiconductors, TCL, Primetime, SystemVerilog, Power Management, Circuit Design, Timing, ASIC
Education
National University of Singapore 1995 — 1996
M.Sc, Micro Electronics
Bharathiar University 1985 — 1989
B.E, Electronics and Communication
SBKV
Camilo Arriola Camilo Arriola's Synapse Design Automation Inc. Experience October 2010 - November 2011
Job Executive Assistant at Aixtron
Industry Executive Office
Experience
AIXTRON Inc. June 2015 - Present
Facebook April 2015 - May 2015
JDSU December 2014 - March 2015
GE Ventures July 2014 - October 2014
City of Menlo Park May 2014 - July 2014
eBay Inc 2013 - March 2014
Stanford University September 2012 - July 2013
The College Board November 2011 - August 2012
Synapse Design Automation Inc. October 2010 - November 2011
Sony Electronics April 2007 - September 2010
Skills
Troubleshooting, Customer Service, Project Management, Microsoft Office, Microsoft Excel, Outlook, Process Improvement, Software Documentation, Inventory Management, SAP, Team Leadership, Windows, PowerPoint, Management, Purchasing, Customer Satisfaction, Lotus Notes, Human Resources, Administrative..., Office Management, Spreadsheets, Event Planning, Office Administration, Travel Arrangements, Calendaring, SharePoint, Event Management, Databases, Logistics, System Administration, Microsoft Word, Accounts Payable, Administration, Concur, Calendars, Executive Support, Executive..., Expense Reports, C-Level Executive..., Expenses, Confidentiality, Heavy Calendaring, Office Equipment, Administrative...
Education
College of San Mateo 1998 — 2000
Sequoia High School 1992 — 1996
AIXTRON Inc. June 2015 - Present
Facebook April 2015 - May 2015
JDSU December 2014 - March 2015
GE Ventures July 2014 - October 2014
City of Menlo Park May 2014 - July 2014
eBay Inc 2013 - March 2014
Stanford University September 2012 - July 2013
The College Board November 2011 - August 2012
Synapse Design Automation Inc. October 2010 - November 2011
Sony Electronics April 2007 - September 2010
Skills
Troubleshooting, Customer Service, Project Management, Microsoft Office, Microsoft Excel, Outlook, Process Improvement, Software Documentation, Inventory Management, SAP, Team Leadership, Windows, PowerPoint, Management, Purchasing, Customer Satisfaction, Lotus Notes, Human Resources, Administrative..., Office Management, Spreadsheets, Event Planning, Office Administration, Travel Arrangements, Calendaring, SharePoint, Event Management, Databases, Logistics, System Administration, Microsoft Word, Accounts Payable, Administration, Concur, Calendars, Executive Support, Executive..., Expense Reports, C-Level Executive..., Expenses, Confidentiality, Heavy Calendaring, Office Equipment, Administrative...
Education
College of San Mateo 1998 — 2000
Sequoia High School 1992 — 1996
Jyotsna Balleda Jyotsna Balleda's Synapse Design Automation Inc. Experience August 2012 - September 2013
Job Senior Hardware Engineer
Industry Semiconductors
Experience
Imagination Technologies September 2013 - Present
Synapse Design Automation Inc. August 2012 - September 2013
Western Digital August 2012 - September 2013
Synapse Design Automation Inc. August 2010 - September 2013
Synapse Design Automation Inc. July 2011 - July 2012
Synapse Design Automation August 2010 - July 2011
QThink September 2006 - August 2010
Qthink IC Design October 2007 - June 2010
Qthink IC Design September 2006 - October 2007
zazu networks April 2005 - July 2006
Skills
USB, Perl, C++, TCP/IP, Programming, WLAN, OCP, AHB, System Verification, OVM, Vera, System Verilog, PSL/Assertion based..., Verification, Open Verification..., SystemVerilog, Functional Verification, SoC, Verilog, AMBA AHB, Specman, Embedded Systems, Formal Verification, Debugging, ASIC
Education
Indian Institute of Technology, Madras 1998 — 2000
M.S(research), Computer Science
Andhra University 1993 — 1997
BTech, Computer Science and Engineering
bhpv, vizag
high school
Imagination Technologies September 2013 - Present
Synapse Design Automation Inc. August 2012 - September 2013
Western Digital August 2012 - September 2013
Synapse Design Automation Inc. August 2010 - September 2013
Synapse Design Automation Inc. July 2011 - July 2012
Synapse Design Automation August 2010 - July 2011
QThink September 2006 - August 2010
Qthink IC Design October 2007 - June 2010
Qthink IC Design September 2006 - October 2007
zazu networks April 2005 - July 2006
Skills
USB, Perl, C++, TCP/IP, Programming, WLAN, OCP, AHB, System Verification, OVM, Vera, System Verilog, PSL/Assertion based..., Verification, Open Verification..., SystemVerilog, Functional Verification, SoC, Verilog, AMBA AHB, Specman, Embedded Systems, Formal Verification, Debugging, ASIC
Education
Indian Institute of Technology, Madras 1998 — 2000
M.S(research), Computer Science
Andhra University 1993 — 1997
BTech, Computer Science and Engineering
bhpv, vizag
high school
omprakash rengaraj omprakash rengaraj's Synapse Design Automation Inc. Experience July 2010 - September 2013
Job Sr. DFT engineer at NVIDIA
Industry Semiconductors
Experience
NVIDIA September 2013 - Present
Synapse Design Automation Inc. July 2010 - September 2013
Samsung Austin R&D Center March 2013 - July 2013
Texas Instruments October 2011 - December 2012
STMicroelectronics June 2010 - September 2011
STMicroelectronics June 2009 - July 2010
MindTree Ltd. August 2005 - July 2010
Texas Instruments June 2007 - December 2008
Purple vision Tech August 2005 - November 2007
Cypress Semiconductor January 2007 - May 2007
Skills
DFT, Scan, ATPG, Memory BIST, IEEE 1149.1, IEEE 1500, DFT Compiler, EDT, Tetramax, TestKompress, Mentor Graphics, Synopsys tools, Unix, Perl, JTAG, Boundary Scan, BIST
Education
Madurai Kamaraj University 1996 — 1999
Bachleor in Engineer, Electronics and Communication, First Class
State Board of Technical Education And Training, Madras 1994 — 1996
DIPLOMA, Electronics and Communications Engineering, First Class With HONOURS
NVIDIA September 2013 - Present
Synapse Design Automation Inc. July 2010 - September 2013
Samsung Austin R&D Center March 2013 - July 2013
Texas Instruments October 2011 - December 2012
STMicroelectronics June 2010 - September 2011
STMicroelectronics June 2009 - July 2010
MindTree Ltd. August 2005 - July 2010
Texas Instruments June 2007 - December 2008
Purple vision Tech August 2005 - November 2007
Cypress Semiconductor January 2007 - May 2007
Skills
DFT, Scan, ATPG, Memory BIST, IEEE 1149.1, IEEE 1500, DFT Compiler, EDT, Tetramax, TestKompress, Mentor Graphics, Synopsys tools, Unix, Perl, JTAG, Boundary Scan, BIST
Education
Madurai Kamaraj University 1996 — 1999
Bachleor in Engineer, Electronics and Communication, First Class
State Board of Technical Education And Training, Madras 1994 — 1996
DIPLOMA, Electronics and Communications Engineering, First Class With HONOURS
Guy Wadsworth Guy Wadsworth's Synapse Design Automation Inc. Experience November 2011 - Present
Job Sr Design Engineer, Synapse Design Automation
Industry Semiconductors
Experience
Synapse Design Automation Inc. November 2011 - Present
Avnet Electronics Marketing November 2000 - November 2011
LANart Corporation December 1995 - September 2000
Avnet Technology Solutions May 1985 - November 1995
Skills
RTL design, synthesis, Layout, SoC subsystem design, Simulation, VHDL, Verilog, SoC, ASIC, ARM, ModelSim, Logic Synthesis, VLSI, EDA, Static Timing Analysis, Simulations, IC, FPGA, TCL, Timing Closure, Embedded Systems, Semiconductors
Education
Onondaga Central School
HS Regents, Math, Science
Syracuse University
BS, Computer Engineering
Synapse Design Automation Inc. November 2011 - Present
Avnet Electronics Marketing November 2000 - November 2011
LANart Corporation December 1995 - September 2000
Avnet Technology Solutions May 1985 - November 1995
Skills
RTL design, synthesis, Layout, SoC subsystem design, Simulation, VHDL, Verilog, SoC, ASIC, ARM, ModelSim, Logic Synthesis, VLSI, EDA, Static Timing Analysis, Simulations, IC, FPGA, TCL, Timing Closure, Embedded Systems, Semiconductors
Education
Onondaga Central School
HS Regents, Math, Science
Syracuse University
BS, Computer Engineering
Marco Brambilla Marco Brambilla's Synapse Design Automation Inc. Experience August 2013 - Present
Job Director of Engineering at Synapse Design Automation Inc.
Industry Semiconductors
Experience
Synapse Design Automation Inc. August 2013 - Present
Synapse Design Automation Inc. April 2011 - August 2013
STMicroelectronics August 2004 - March 2011
STMicroelectronics March 2000 - June 2004
misarc 1998 - 2000
Skills
DFT, VHDL, Specifications, ASIC, SoC, IC, Verilog, Semiconductors, RTL design, Integrated Circuit..., EDA, Static Timing Analysis, Team Leadership, Embedded Systems, Social Skills, English, French, Computer Architecture, Debugging, PCIe, TCL, ARM, Embedded Software, Perl, Functional Verification, Digital Signal..., Processors, VLSI, Low-power Design, Logic Synthesis, Project Management, Mixed Signal, Timing Closure, SystemVerilog, Physical Design, Formal Verification, CMOS, Hardware Architecture, Microprocessors, USB, RTL Design
Education
Università degli Studi di Pavia 1990 — 1997
Laurea, Electrical Engineering - Telecommunications
ITIS G Cardano 1985 — 1990
Diploma Scuola Superiore, Computer Science
Very French Grenoble
Still Learning..., French as a second language
Synapse Design Automation Inc. August 2013 - Present
Synapse Design Automation Inc. April 2011 - August 2013
STMicroelectronics August 2004 - March 2011
STMicroelectronics March 2000 - June 2004
misarc 1998 - 2000
Skills
DFT, VHDL, Specifications, ASIC, SoC, IC, Verilog, Semiconductors, RTL design, Integrated Circuit..., EDA, Static Timing Analysis, Team Leadership, Embedded Systems, Social Skills, English, French, Computer Architecture, Debugging, PCIe, TCL, ARM, Embedded Software, Perl, Functional Verification, Digital Signal..., Processors, VLSI, Low-power Design, Logic Synthesis, Project Management, Mixed Signal, Timing Closure, SystemVerilog, Physical Design, Formal Verification, CMOS, Hardware Architecture, Microprocessors, USB, RTL Design
Education
Università degli Studi di Pavia 1990 — 1997
Laurea, Electrical Engineering - Telecommunications
ITIS G Cardano 1985 — 1990
Diploma Scuola Superiore, Computer Science
Very French Grenoble
Still Learning..., French as a second language
Jaweed Mohammed Jaweed Mohammed's Synapse Design Automation Inc. Experience July 2011 - September 2013
Job Physical Design at ClariPhy Communications
Industry Computer Hardware
Experience
ClariPhy Communications September 2013 - Present
Synapse Design Automation Inc. July 2011 - September 2013
PLX Technology January 2007 - August 2011
Oki Semiconductor America April 2003 - January 2007
Cadence Design Systems September 2000 - March 2003
Skills
ASIC, Physical Design, Static Timing Analysis, Low-power Design, Logic Synthesis, IC, Integrated Circuit..., Signal Integrity, Cadence, Place & Route, Design for Manufacturing, Cross-functional Team..., Verilog, VLSI, SoC, EDA, Timing Closure, TCL, Semiconductors, Primetime
Education
University of Florida 1998 — 2000
MS, Electrical & Computer Engineering
Osmania University 1994 — 1998
BE, Electronics & communication
ClariPhy Communications September 2013 - Present
Synapse Design Automation Inc. July 2011 - September 2013
PLX Technology January 2007 - August 2011
Oki Semiconductor America April 2003 - January 2007
Cadence Design Systems September 2000 - March 2003
Skills
ASIC, Physical Design, Static Timing Analysis, Low-power Design, Logic Synthesis, IC, Integrated Circuit..., Signal Integrity, Cadence, Place & Route, Design for Manufacturing, Cross-functional Team..., Verilog, VLSI, SoC, EDA, Timing Closure, TCL, Semiconductors, Primetime
Education
University of Florida 1998 — 2000
MS, Electrical & Computer Engineering
Osmania University 1994 — 1998
BE, Electronics & communication
Vijay Peruri Vijay Peruri's Synapse Design Automation Inc. Experience June 2011 - May 2013
Job Senior Physical Design Engineer
Industry Semiconductors
Experience
Synapse Design Inc. February 2015 - Present
Cadence Design Systems March 2014 - November 2014
Cadence Design Systems May 2013 - March 2014
Synapse Design Automation Inc. June 2011 - May 2013
Atrenta Inc January 2011 - June 2011
Magma Design Automation September 2005 - May 2010
ProDesign Electronic GmbH March 2005 - April 2005
Vikas Global Solutions September 2001 - November 2002
Skills
EDA, SoC, ASIC, Verilog, TCL, Semiconductors, IC, Physical Design, VLSI, Static Timing Analysis, Circuit Design, Primetime, Logic Synthesis, Timing Closure, Leadership, Debugging, Integrated Circuit..., Low-power Design
Education
University of California, Santa Cruz 2010 — 2010
Advanced VLSI Engineering Certification, Electrical and Computer Engineering
Southern Illinois University, Carbondale 2003 — 2004
Masters, Electrical and Computer Engineering
Bangalore University 1997 — 2001
Bachelors of Engineering, Electronics and Communication
Synapse Design Inc. February 2015 - Present
Cadence Design Systems March 2014 - November 2014
Cadence Design Systems May 2013 - March 2014
Synapse Design Automation Inc. June 2011 - May 2013
Atrenta Inc January 2011 - June 2011
Magma Design Automation September 2005 - May 2010
ProDesign Electronic GmbH March 2005 - April 2005
Vikas Global Solutions September 2001 - November 2002
Skills
EDA, SoC, ASIC, Verilog, TCL, Semiconductors, IC, Physical Design, VLSI, Static Timing Analysis, Circuit Design, Primetime, Logic Synthesis, Timing Closure, Leadership, Debugging, Integrated Circuit..., Low-power Design
Education
University of California, Santa Cruz 2010 — 2010
Advanced VLSI Engineering Certification, Electrical and Computer Engineering
Southern Illinois University, Carbondale 2003 — 2004
Masters, Electrical and Computer Engineering
Bangalore University 1997 — 2001
Bachelors of Engineering, Electronics and Communication
Ruben Reyes Ruben Reyes's Synapse Design Automation Inc. Experience June 2011 - July 2011
Job Technical Marketing Engineer at PNY Technologies
Industry Semiconductors
Experience
PNY Technologies October 2014 - Present
AMD April 2013 - June 2014
AMD September 2011 - April 2013
Synapse Design Automation Inc. June 2011 - July 2011
ChipStart March 2011 - April 2011
Ruben Reyes February 2011 - March 2011
Trivium Tech Force Corporation February 2010 - January 2011
Global Trivium Corporation March 2009 - February 2010
Ruben Reyes July 2008 - March 2009
QThink October 2004 - July 2008
Skills
MAGMA Talus, Cadence SOC Encounter, Synopsys ICC, TCL, Primetime, Astro, Hercules, Virtuoso Layout Editor, LVS, Parasitic Extraction, Physical Verification, Floorplanning, Physical Design, DRC, Timing Closure, Static Timing Analysis, Route, Clock Tree Synthesis, Calibre DRC/LVS, Star-RCXT, IC Compiler, SOC Encounter, Apache RedHawk, Olympus-SOC, Formality, Design Compiler, Physical Compiler, SoC, Signal Integrity, IC, Compilers, ASIC, ModelSim, CMOS, Cadence, EDA, Cadence Virtuoso, Logic Synthesis, Virtuoso, Verilog, VLSI, Place & Route, Routing, Magma, RTL design
Education
New York University - Polytechnic School of Engineering 1991 — 1994
MSEE, Control Systems
Pratt Institute 1989 — 1991
BSEE with Honors, Electrical Engineering
PNY Technologies October 2014 - Present
AMD April 2013 - June 2014
AMD September 2011 - April 2013
Synapse Design Automation Inc. June 2011 - July 2011
ChipStart March 2011 - April 2011
Ruben Reyes February 2011 - March 2011
Trivium Tech Force Corporation February 2010 - January 2011
Global Trivium Corporation March 2009 - February 2010
Ruben Reyes July 2008 - March 2009
QThink October 2004 - July 2008
Skills
MAGMA Talus, Cadence SOC Encounter, Synopsys ICC, TCL, Primetime, Astro, Hercules, Virtuoso Layout Editor, LVS, Parasitic Extraction, Physical Verification, Floorplanning, Physical Design, DRC, Timing Closure, Static Timing Analysis, Route, Clock Tree Synthesis, Calibre DRC/LVS, Star-RCXT, IC Compiler, SOC Encounter, Apache RedHawk, Olympus-SOC, Formality, Design Compiler, Physical Compiler, SoC, Signal Integrity, IC, Compilers, ASIC, ModelSim, CMOS, Cadence, EDA, Cadence Virtuoso, Logic Synthesis, Virtuoso, Verilog, VLSI, Place & Route, Routing, Magma, RTL design
Education
New York University - Polytechnic School of Engineering 1991 — 1994
MSEE, Control Systems
Pratt Institute 1989 — 1991
BSEE with Honors, Electrical Engineering
Dave Norvall Dave Norvall's Synapse Design Automation Inc. Experience May 2013 - October 2013
Job Senior Mixed Signal Verification at Synapse Design Automation Inc.
Industry Consumer Electronics
Experience
Synapse Design Automation Inc. May 2013 - October 2013
Arrow CLS September 2011 - October 2012
NXP Semiconductors June 2010 - October 2011
Digican March 2009 - February 2010
Intelleflex Corp March 2009 - April 2009
Alien Technology March 2003 - February 2009
Micron Technology Corp January 1998 - March 2003
Skills
Mixed Signal, CMOS, IC, Analog, Analog Circuit Design, ASIC, Semiconductors, SoC, EDA, Low-power Design, Integrated Circuit..., FPGA, Digital Signal..., Physical Design, Firmware
Education
City University (GB)
BSc, Electronic engineering
Mount Albert Grammar Auckland NZ
Bachelor of Science (BSc), EE
Synapse Design Automation Inc. May 2013 - October 2013
Arrow CLS September 2011 - October 2012
NXP Semiconductors June 2010 - October 2011
Digican March 2009 - February 2010
Intelleflex Corp March 2009 - April 2009
Alien Technology March 2003 - February 2009
Micron Technology Corp January 1998 - March 2003
Skills
Mixed Signal, CMOS, IC, Analog, Analog Circuit Design, ASIC, Semiconductors, SoC, EDA, Low-power Design, Integrated Circuit..., FPGA, Digital Signal..., Physical Design, Firmware
Education
City University (GB)
BSc, Electronic engineering
Mount Albert Grammar Auckland NZ
Bachelor of Science (BSc), EE
Vikesh Thakrar Vikesh Thakrar's Synapse Design Automation Inc. Experience October 2013 - June 2015
Job Sr. DV Engineer
Industry Electrical/Electronic Manufacturing
Experience
Synapse Design Automation Inc. October 2013 - June 2015
eInfochips June 2012 - September 2013
eInfochips August 2011 - May 2012
eInfochips February 2010 - July 2011
eInfochips June 2007 - January 2010
Nirma University , Institute of Technology February 2003 - May 2007
Indian Space Research Organisation January 2002 - January 2003
Skills
Verilog, ASIC, SystemVerilog, VHDL, UVM, Debugging, Functional Verification, Xilinx, Design Verification..., SoC, Project Planning, EDA, Open Verification..., ASIC Verification, SystemC, OVM, DDR3
Education
Bhavnagar University 1998 — 2001
BE, Electronics & Communication
AVPTI
Synapse Design Automation Inc. October 2013 - June 2015
eInfochips June 2012 - September 2013
eInfochips August 2011 - May 2012
eInfochips February 2010 - July 2011
eInfochips June 2007 - January 2010
Nirma University , Institute of Technology February 2003 - May 2007
Indian Space Research Organisation January 2002 - January 2003
Skills
Verilog, ASIC, SystemVerilog, VHDL, UVM, Debugging, Functional Verification, Xilinx, Design Verification..., SoC, Project Planning, EDA, Open Verification..., ASIC Verification, SystemC, OVM, DDR3
Education
Bhavnagar University 1998 — 2001
BE, Electronics & Communication
AVPTI
Clifford Yeung Clifford Yeung's Synapse Design Automation Inc. Experience November 2010 - Present
Job Technical Consultant, Project Lead at Synapse Design Automation Inc.
Industry Consumer Electronics
Experience
Synapse Design Automation Inc. November 2010 - Present
Nethra Imaging March 2009 - June 2010
Aptina Imaging April 2008 - January 2009
Micron Technology July 2003 - March 2008
Turin Networks 2000 - 2003
Motorola Hong Kong 1997 - 1999
McData 1992 - 1997
Skills
ASIC, RTOS, Verilog, SoC, Embedded Systems, Semiconductors, Microcontrollers, C, Simulations, SystemVerilog, FPGA, Embedded Software, VHDL, Hardware Architecture, Digital Signal..., Debugging, ARM, C++, Sensors, VLSI, Firmware, Integrated Circuit..., Xilinx
Education
Carleton University
MEng, Electronics Engineering
University of Reading
BSc, Electronics Engineering
Synapse Design Automation Inc. November 2010 - Present
Nethra Imaging March 2009 - June 2010
Aptina Imaging April 2008 - January 2009
Micron Technology July 2003 - March 2008
Turin Networks 2000 - 2003
Motorola Hong Kong 1997 - 1999
McData 1992 - 1997
Skills
ASIC, RTOS, Verilog, SoC, Embedded Systems, Semiconductors, Microcontrollers, C, Simulations, SystemVerilog, FPGA, Embedded Software, VHDL, Hardware Architecture, Digital Signal..., Debugging, ARM, C++, Sensors, VLSI, Firmware, Integrated Circuit..., Xilinx
Education
Carleton University
MEng, Electronics Engineering
University of Reading
BSc, Electronics Engineering
Ravi Chandra Kandati Ravi Chandra Kandati's Synapse Design Automation Inc. Experience June 2013 - August 2014
Job Physical Design Engineer at Cirrus Logic
Industry Semiconductors
Experience
Cirrus Logic June 2015 - Present
Synapse Design Inc. December 2014 - March 2015
Synapse Design Automation Inc. June 2013 - August 2014
Synapse Design Automation Inc. September 2012 - May 2013
Synapse Design Automation Inc. June 2012 - August 2012
Synapse Techno Design Innovations Pvt Ltd March 2011 - June 2012
Wipro Technologies February 2009 - March 2011
Wipro Technologies January 2008 - January 2009
Wipro Technologies July 2005 - January 2008
Skills
Physical Design, Static Timing Analysis, Timing Closure, Primetime, SoC, VLSI, ASIC, TCL, DRC, Clock Tree Synthesis
Education
Sri Venkateswara University 2001 — 2005
B.Tech, Electronics and communication
vikas intermediate college 1999 — 2001
Intermediate, M.P.C
Vidya bhavan 1997 — 1999
Cirrus Logic June 2015 - Present
Synapse Design Inc. December 2014 - March 2015
Synapse Design Automation Inc. June 2013 - August 2014
Synapse Design Automation Inc. September 2012 - May 2013
Synapse Design Automation Inc. June 2012 - August 2012
Synapse Techno Design Innovations Pvt Ltd March 2011 - June 2012
Wipro Technologies February 2009 - March 2011
Wipro Technologies January 2008 - January 2009
Wipro Technologies July 2005 - January 2008
Skills
Physical Design, Static Timing Analysis, Timing Closure, Primetime, SoC, VLSI, ASIC, TCL, DRC, Clock Tree Synthesis
Education
Sri Venkateswara University 2001 — 2005
B.Tech, Electronics and communication
vikas intermediate college 1999 — 2001
Intermediate, M.P.C
Vidya bhavan 1997 — 1999
Jim Pacini Jim Pacini's Synapse Design Automation Inc. Experience April 2010 - July 2010
Job SSD Engineer at Seagate
Industry Electrical/Electronic Manufacturing
Experience
Seagate Technology March 2013 - Present
LSI Logic August 2010 - March 2013
Synapse Design Automation Inc. April 2010 - July 2010
Seagate Technology April 1996 - March 2009
Conner Peripherals April 1986 - February 1996
Intelligent Storage February 1985 - January 1986
Storage Technology March 1980 - December 1984
StorageTek 1980 - 1984
National Cash Register November 1978 - March 1980
Skills
Automation, Firmware, ASIC, Laboratory, Quality Assurance
Education
University of Colorado Boulder 1993 — 1993
Certificate, C programming
Electronics Institute 1976 — 1978
Associate Degree, Electronics and Computer Technology
Seagate Technology March 2013 - Present
LSI Logic August 2010 - March 2013
Synapse Design Automation Inc. April 2010 - July 2010
Seagate Technology April 1996 - March 2009
Conner Peripherals April 1986 - February 1996
Intelligent Storage February 1985 - January 1986
Storage Technology March 1980 - December 1984
StorageTek 1980 - 1984
National Cash Register November 1978 - March 1980
Skills
Automation, Firmware, ASIC, Laboratory, Quality Assurance
Education
University of Colorado Boulder 1993 — 1993
Certificate, C programming
Electronics Institute 1976 — 1978
Associate Degree, Electronics and Computer Technology
Joe Stech's Synapse Design Automation Inc. Experience July 2013 - February 2014
Job Senior Data Scientist at Oracle
Industry Computer Software
Experience
Oracle June 2015 - Present
Micron Technology February 2014 - June 2015
Synapse Design Automation Inc. July 2013 - February 2014
Trimble Navigation June 2010 - July 2013
Palmer Lab, CU Boulder July 2008 - December 2008
UROP Grant: CU High Energy Physics September 2006 - January 2007
Skills
Embedded Systems, Debugging, C++, C, Embedded Linux, Embedded Software, Linux, Java, Python, Software Engineering, Firmware, JavaScript, Eclipse, Software Development, Testing, Lua, Bash, jQuery, VirtualBox, Software Design Patterns, User Interface Design, Numerical Analysis, Git
Education
University of Colorado at Boulder 2011 — 2012
Graduate Certificate, Software Engineering, 4.0
University of Colorado at Colorado Springs 2009 — 2010
Computer Science
University of Colorado at Boulder 2004 — 2008
BA, Biochemistry
Oracle June 2015 - Present
Micron Technology February 2014 - June 2015
Synapse Design Automation Inc. July 2013 - February 2014
Trimble Navigation June 2010 - July 2013
Palmer Lab, CU Boulder July 2008 - December 2008
UROP Grant: CU High Energy Physics September 2006 - January 2007
Skills
Embedded Systems, Debugging, C++, C, Embedded Linux, Embedded Software, Linux, Java, Python, Software Engineering, Firmware, JavaScript, Eclipse, Software Development, Testing, Lua, Bash, jQuery, VirtualBox, Software Design Patterns, User Interface Design, Numerical Analysis, Git
Education
University of Colorado at Boulder 2011 — 2012
Graduate Certificate, Software Engineering, 4.0
University of Colorado at Colorado Springs 2009 — 2010
Computer Science
University of Colorado at Boulder 2004 — 2008
BA, Biochemistry
Krishna kumar Hanchate Krishna kumar Hanchate's Synapse Design Automation Inc. Experience July 2010 - May 2013
Job Sr. Staff Physical Design Engg at PLX Technology (now Avago Technologies)
Industry Semiconductors
Experience
PLX Technology (now Avago Technologies) May 2013 - Present
Synapse Design Automation Inc. July 2010 - May 2013
Freescale Semiconductor April 2006 - July 2010
Intel January 2004 - March 2006
Synopsys July 2000 - January 2004
Skills
Static Timing Analysis, Floorplanning, Physical Design, Physical Verification, Timing Closure, ASIC, SoC, VLSI, Routing, Clock Tree Synthesis, EDA, DRC, Primetime, LVS, Energy Planning, Low-power Design, TCL, Verilog, Logic Synthesis, Timing, Semiconductors, RTL design, Digital Signal..., ARM, Mixed Signal, CMOS, IC, Microprocessors, SystemVerilog
Education
Sri Venkateswara University 1996 — 2000
B.Tech, Electronics & Communication Engineering
PLX Technology (now Avago Technologies) May 2013 - Present
Synapse Design Automation Inc. July 2010 - May 2013
Freescale Semiconductor April 2006 - July 2010
Intel January 2004 - March 2006
Synopsys July 2000 - January 2004
Skills
Static Timing Analysis, Floorplanning, Physical Design, Physical Verification, Timing Closure, ASIC, SoC, VLSI, Routing, Clock Tree Synthesis, EDA, DRC, Primetime, LVS, Energy Planning, Low-power Design, TCL, Verilog, Logic Synthesis, Timing, Semiconductors, RTL design, Digital Signal..., ARM, Mixed Signal, CMOS, IC, Microprocessors, SystemVerilog
Education
Sri Venkateswara University 1996 — 2000
B.Tech, Electronics & Communication Engineering
Abhishek Solanki Abhishek Solanki's Synapse Design Automation Inc. Experience January 2011 - June 2013
Job Sr. Physical Design Engineer at Qualcomm
Industry Semiconductors
Experience
Qualcomm June 2013 - Present
Synapse Design Automation Inc. January 2011 - June 2013
Intel Technology August 2008 - January 2011
Skills
Physical Design, Timing Closure, VLSI, ASIC, Static Timing Analysis
Education
Indian Institute of Technology, Kharagpur 2006 — 2008
M.Tech., Microelectronics & VLSI Design
S.G.S.I.T.S. Indore 2002 — 2006
B.E., Electronics & Telecommunication
Qualcomm June 2013 - Present
Synapse Design Automation Inc. January 2011 - June 2013
Intel Technology August 2008 - January 2011
Skills
Physical Design, Timing Closure, VLSI, ASIC, Static Timing Analysis
Education
Indian Institute of Technology, Kharagpur 2006 — 2008
M.Tech., Microelectronics & VLSI Design
S.G.S.I.T.S. Indore 2002 — 2006
B.E., Electronics & Telecommunication
Hemendra Talesara Hemendra Talesara's Synapse Design Automation Inc. Experience July 2012 - Present
Job Director of Verification at Synapse Design Automation Inc.
Industry Semiconductors
Experience
Synapse Design Automation Inc. July 2012 - Present
XtremeEDA 2010 - 2012
CoWare 2008 - 2010
Spansion, LLC 2006 - 2008
Synopsys, Inc 1998 - 2006
IBM 1994 - 1998
Digital Equipment Corp. 1988 - 1994
MCC 1984 - 1988
Skills
ASIC, EDA, SoC, Processors, Microprocessors, SystemC, Functional Verification, UVM, Project Management, Professional Services, Semiconductors, Verilog, SystemVerilog, Program Management, Embedded Systems, TCL, Perl, Open Verification..., Embedded Software, Simulations, Computer Architecture, IC, VLSI, Integrated Circuit..., Static Timing Analysis, FPGA, Debugging, ModelSim, RTL design, System Architecture, ARM, Hardware Architecture, DFT, USB, Digital Signal..., Mixed Signal, CMOS, Formal Verification, Timing Closure, VMM, NCSim
Education
The University of Texas at Austin 1982 — 1985
M.S.E, Electrical and Computer Engineering
Bengal Engineering and Science University, Shibpur 1976 — 1981
B.E., Electronics and Telecommunications Engineering
Project Management Institute
PMP, Project Management Certification
Synapse Design Automation Inc. July 2012 - Present
XtremeEDA 2010 - 2012
CoWare 2008 - 2010
Spansion, LLC 2006 - 2008
Synopsys, Inc 1998 - 2006
IBM 1994 - 1998
Digital Equipment Corp. 1988 - 1994
MCC 1984 - 1988
Skills
ASIC, EDA, SoC, Processors, Microprocessors, SystemC, Functional Verification, UVM, Project Management, Professional Services, Semiconductors, Verilog, SystemVerilog, Program Management, Embedded Systems, TCL, Perl, Open Verification..., Embedded Software, Simulations, Computer Architecture, IC, VLSI, Integrated Circuit..., Static Timing Analysis, FPGA, Debugging, ModelSim, RTL design, System Architecture, ARM, Hardware Architecture, DFT, USB, Digital Signal..., Mixed Signal, CMOS, Formal Verification, Timing Closure, VMM, NCSim
Education
The University of Texas at Austin 1982 — 1985
M.S.E, Electrical and Computer Engineering
Bengal Engineering and Science University, Shibpur 1976 — 1981
B.E., Electronics and Telecommunications Engineering
Project Management Institute
PMP, Project Management Certification
Puneet Malhotra Puneet Malhotra's Synapse Design Automation Inc. Experience May 2011 - November 2012
Job Lead Engineer at Smartplay, Inc.
Industry Semiconductors
Experience
SmartPlay inc. July 2015 - Present
SmartPlay Technologies December 2012 - July 2015
Synapse Design Automation Inc. May 2011 - November 2012
NetLogic Microsystems( Now part of Broadcom India Pvt Ltd) May 2005 - April 2011
Skills
Physical Design, Static Timing Analysis, VLSI, Timing Closure, Floorplanning, Physical Verification, DRC, LVS, ASIC, SoC, Primetime, Timing
Education
Sandeepani 2005 — 2005
post graduate diploma, VLSI
Kurukshetra University 2000 — 2004
Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering
SmartPlay inc. July 2015 - Present
SmartPlay Technologies December 2012 - July 2015
Synapse Design Automation Inc. May 2011 - November 2012
NetLogic Microsystems( Now part of Broadcom India Pvt Ltd) May 2005 - April 2011
Skills
Physical Design, Static Timing Analysis, VLSI, Timing Closure, Floorplanning, Physical Verification, DRC, LVS, ASIC, SoC, Primetime, Timing
Education
Sandeepani 2005 — 2005
post graduate diploma, VLSI
Kurukshetra University 2000 — 2004
Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering
Manoj Sharma Manoj Sharma's Synapse Design Automation Inc. Experience July 2010 - January 2012
Job Staff Engineer at Qualcomm
Industry Semiconductors
Experience
Qualcomm September 2013 - Present
IDT February 2012 - August 2013
Synapse Design Automation Inc. July 2010 - January 2012
KPIT Cummins Infosystems Limited July 2009 - July 2010
Chip Design (Pvt) Ltd December 2005 - June 2009
Bhabha Atomic Research Centre August 2002 - November 2005
Skills
Open Verification..., SystemVerilog, UVM, ASIC, Verilog, SoC, Functional Verification, VLSI, NCSim, RTL design, RTL coding, AMBA AHB, Formal Verification, Debugging, Semiconductors, FPGA, IC, Embedded Systems, EDA, C, VHDL, Perl, Simulations, Integrated Circuit...
Education
University of Rajasthan 1998 — 2002
BE
Qualcomm September 2013 - Present
IDT February 2012 - August 2013
Synapse Design Automation Inc. July 2010 - January 2012
KPIT Cummins Infosystems Limited July 2009 - July 2010
Chip Design (Pvt) Ltd December 2005 - June 2009
Bhabha Atomic Research Centre August 2002 - November 2005
Skills
Open Verification..., SystemVerilog, UVM, ASIC, Verilog, SoC, Functional Verification, VLSI, NCSim, RTL design, RTL coding, AMBA AHB, Formal Verification, Debugging, Semiconductors, FPGA, IC, Embedded Systems, EDA, C, VHDL, Perl, Simulations, Integrated Circuit...
Education
University of Rajasthan 1998 — 2002
BE
Chen (Chris) Xu Chen (Chris) Xu's Synapse Design Automation Inc. Experience December 2011 - September 2013
Job Physical Design Engineer at Apple
Industry Information Technology and Services
Experience
Apple September 2013 - Present
Synapse Design Automation Inc. December 2011 - September 2013
GLOBALFOUNDRIES September 2011 - November 2011
IBM April 2008 - September 2011
Skills
ASIC, Static Timing Analysis, SoC, TCL, Verilog, Physical Design, Timing Closure, VLSI, IC, EDA, FPGA, Logic Design, RTL design, VHDL, Perl, Semiconductors, CMOS, Cadence, Cadence Virtuoso, Debugging
Education
Shanghai Jiao Tong University 2005 — 2008
Master, Mathematics
Shanghai Jiao Tong University 2001 — 2005
Bachelor, Electronic Engineering
Apple September 2013 - Present
Synapse Design Automation Inc. December 2011 - September 2013
GLOBALFOUNDRIES September 2011 - November 2011
IBM April 2008 - September 2011
Skills
ASIC, Static Timing Analysis, SoC, TCL, Verilog, Physical Design, Timing Closure, VLSI, IC, EDA, FPGA, Logic Design, RTL design, VHDL, Perl, Semiconductors, CMOS, Cadence, Cadence Virtuoso, Debugging
Education
Shanghai Jiao Tong University 2005 — 2008
Master, Mathematics
Shanghai Jiao Tong University 2001 — 2005
Bachelor, Electronic Engineering
Widad Basha Widad Basha's Synapse Design Automation Inc. Experience April 2012 - September 2013
Job SSD/NVMe Test Design Engineer at Seagate Technology
Industry Education Management
Experience
Seagate Technology September 2013 - Present
Seagate Technology 2013 - 2015
Seagate Technology 2013 - 2015
Synapse Design Automation Inc. April 2012 - September 2013
Saint Vrain Valley School District January 2009 - April 2012
Math Monkey April 2008 - January 2009
Seagate Technology LLC 2003 - 2007
Chip Express 2000 - 2002
Skills
Competitive Analysis, Software Distribution, Debugging, Embedded Systems, Project Management, Technical Writing, FPGA, Perl, EDA, Firmware, Unix, Product Management
Education
Pratt Institute 1987 — 1990
BS, Electrical Engineering
Seagate Technology September 2013 - Present
Seagate Technology 2013 - 2015
Seagate Technology 2013 - 2015
Synapse Design Automation Inc. April 2012 - September 2013
Saint Vrain Valley School District January 2009 - April 2012
Math Monkey April 2008 - January 2009
Seagate Technology LLC 2003 - 2007
Chip Express 2000 - 2002
Skills
Competitive Analysis, Software Distribution, Debugging, Embedded Systems, Project Management, Technical Writing, FPGA, Perl, EDA, Firmware, Unix, Product Management
Education
Pratt Institute 1987 — 1990
BS, Electrical Engineering
M.Balram Naik Rathod M.Balram Naik Rathod's Synapse Design Automation Inc. Experience June 2010 - November 2012
Job Staff Engineer Asic Development at WD, a Western Digital company
Industry Semiconductors
Experience
WD, a Western Digital company December 2012 - Present
Synapse Design Automation Inc. June 2010 - November 2012
Masamb Electronics Systems October 2009 - June 2010
Ichip Technologies pvt.ltd September 2008 - June 2009
StellarIP Solustions Pvt.Ltd. 2006 - 2008
Skills
ASIC Design Verification, AHB, Debugging, I2C, Scripting, SystemVerilog, Verilog, ModelSim, SoC, ASIC, Functional Verification, VCS, Formal Verification, Perl, Open Verification..., PCI-X, AMBA AHB, ATPG, AXI, VHDL, Specman, Veritas Cluster Server, ClearCase, SPI, RTL design
Education
University of Hyderabad 2004 — 2006
M.Tech, I.C.Technology
Jawaharlal Nehru Technological University 1999 — 2003
B.Tech, ECE
WD, a Western Digital company December 2012 - Present
Synapse Design Automation Inc. June 2010 - November 2012
Masamb Electronics Systems October 2009 - June 2010
Ichip Technologies pvt.ltd September 2008 - June 2009
StellarIP Solustions Pvt.Ltd. 2006 - 2008
Skills
ASIC Design Verification, AHB, Debugging, I2C, Scripting, SystemVerilog, Verilog, ModelSim, SoC, ASIC, Functional Verification, VCS, Formal Verification, Perl, Open Verification..., PCI-X, AMBA AHB, ATPG, AXI, VHDL, Specman, Veritas Cluster Server, ClearCase, SPI, RTL design
Education
University of Hyderabad 2004 — 2006
M.Tech, I.C.Technology
Jawaharlal Nehru Technological University 1999 — 2003
B.Tech, ECE
Vince Calandra's Synapse Design Automation Inc. Experience May 2014 - January 2015
Job NA Sales Executive, IoT Major Accounts at Wind River, Intel Corporation
Industry Computer Software
Experience
Intel Corporation, Wind River Systems February 2015 - Present
Synapse Design Automation Inc. May 2014 - January 2015
Berkeley Design Automation, Mentor Graphics June 2013 - February 2014
eSilicon January 2012 - May 2013
eSilicon Corp. September 2000 - April 2012
Cadence Design Systems 1996 - 1999
Zycad Corporation 1989 - 1998
Grumman Aerospace 1986 - 1988
Skills
Semiconductors, IC, ASIC, Business Development, EDA, Semiconductor Industry, SoC, Product Marketing, Sales Process, Product Management, Product Development, Sales Operations, Management, Start-ups, Cross-functional Team..., Strategic Partnerships, Selling, Sales Management, Sales, New Business Development, Electronics, Leadership, Embedded Systems, Mixed Signal, Analog, Go-to-market Strategy, Processors, International Sales, Negotiation, Digital Signal..., Wireless, Competitive Analysis, IP, Integration, RF, Solution Selling, Simulation, DSP, RTL design, Contract Negotiations, Business Planning, Business Strategy, Sales Support, Marketing Strategy, Electrical Engineering, Sales Process..., Major Account..., C-Level Presentations, Internet of Things, Embedded Software
Education
Polytechnic University 1982 — 1986
BS, EE
NYIT 1986 — 1988
MSCS, Computer Science
Intel Corporation, Wind River Systems February 2015 - Present
Synapse Design Automation Inc. May 2014 - January 2015
Berkeley Design Automation, Mentor Graphics June 2013 - February 2014
eSilicon January 2012 - May 2013
eSilicon Corp. September 2000 - April 2012
Cadence Design Systems 1996 - 1999
Zycad Corporation 1989 - 1998
Grumman Aerospace 1986 - 1988
Skills
Semiconductors, IC, ASIC, Business Development, EDA, Semiconductor Industry, SoC, Product Marketing, Sales Process, Product Management, Product Development, Sales Operations, Management, Start-ups, Cross-functional Team..., Strategic Partnerships, Selling, Sales Management, Sales, New Business Development, Electronics, Leadership, Embedded Systems, Mixed Signal, Analog, Go-to-market Strategy, Processors, International Sales, Negotiation, Digital Signal..., Wireless, Competitive Analysis, IP, Integration, RF, Solution Selling, Simulation, DSP, RTL design, Contract Negotiations, Business Planning, Business Strategy, Sales Support, Marketing Strategy, Electrical Engineering, Sales Process..., Major Account..., C-Level Presentations, Internet of Things, Embedded Software
Education
Polytechnic University 1982 — 1986
BS, EE
NYIT 1986 — 1988
MSCS, Computer Science
Burt Wagner's Synapse Design Automation Inc. Experience 2010 - Present
Job Senior Firmware Engineering Consultant, Owner and President of Deadline Specialists, Inc.
Industry Computer Hardware
Experience
Synapse Design Automation Inc. 2010 - Present
Deadline Specialists, Inc. October 1989 - Present
Tangible Cryptography 2013 - 2013
Tangible Cryptography 2013 - 2013
CableLabs 2009 - 2010
Digeo 2004 - 2006
Xaffire 2000 - 2005
Visteon 1999 - 2005
Agere 2004 - 2004
Cornice 2004 - 2004
Skills
Firmware, SCSI, Embedded Systems, Software Development, Hardware, Digital Signal..., ATA, Debugging, Microprocessors, Device Drivers, Perl, Testing, Analog, Embedded Software, C, Verilog, Hard Drives, System Architecture, Linux, ARM, MPEG2, USB, MPEG-4, Integrated Circuit..., Software Engineering, Processors, Set Top Box, SoC, RTOS
Education
University of Colorado Boulder 1980 — 1985
BS, Electrical Engineering and Computer Science
Synapse Design Automation Inc. 2010 - Present
Deadline Specialists, Inc. October 1989 - Present
Tangible Cryptography 2013 - 2013
Tangible Cryptography 2013 - 2013
CableLabs 2009 - 2010
Digeo 2004 - 2006
Xaffire 2000 - 2005
Visteon 1999 - 2005
Agere 2004 - 2004
Cornice 2004 - 2004
Skills
Firmware, SCSI, Embedded Systems, Software Development, Hardware, Digital Signal..., ATA, Debugging, Microprocessors, Device Drivers, Perl, Testing, Analog, Embedded Software, C, Verilog, Hard Drives, System Architecture, Linux, ARM, MPEG2, USB, MPEG-4, Integrated Circuit..., Software Engineering, Processors, Set Top Box, SoC, RTOS
Education
University of Colorado Boulder 1980 — 1985
BS, Electrical Engineering and Computer Science
Hoyt Hedgecock's Synapse Design Automation Inc. Experience March 2010 - October 2011
Job Firmware Engineer at Synapse Design Automation Inc.
Industry Computer Hardware
Experience
Synapse Design Automation March 2013 - June 2015
Raytheon October 2011 - March 2013
Synapse Design Automation Inc. March 2010 - October 2011
Western Digital October 2007 - December 2008
Seagate Technology July 2006 - October 2007
Maxtor January 1993 - June 2006
McDonnell Douglas August 1979 - July 1992
Skills
Firmware, Debugging, ARM, SCSI, PCB design, Logic Analyzer, C, Microprocessors, Digital Signal..., Embedded Systems, Testing, C++, Analog, Failure Analysis, Electronics, Semiconductors, Engineering Management, Hardware, Device Drivers, FPGA, ASIC, Hardware Architecture, RTOS, Embedded Software, Python, SoC, Verilog, Microcontrollers, TCL, USB
Education
Southern Illinois University, Edwardsville
BS, Electrical Engineering
Synapse Design Automation March 2013 - June 2015
Raytheon October 2011 - March 2013
Synapse Design Automation Inc. March 2010 - October 2011
Western Digital October 2007 - December 2008
Seagate Technology July 2006 - October 2007
Maxtor January 1993 - June 2006
McDonnell Douglas August 1979 - July 1992
Skills
Firmware, Debugging, ARM, SCSI, PCB design, Logic Analyzer, C, Microprocessors, Digital Signal..., Embedded Systems, Testing, C++, Analog, Failure Analysis, Electronics, Semiconductors, Engineering Management, Hardware, Device Drivers, FPGA, ASIC, Hardware Architecture, RTOS, Embedded Software, Python, SoC, Verilog, Microcontrollers, TCL, USB
Education
Southern Illinois University, Edwardsville
BS, Electrical Engineering
Pritesh Vyawahare's Synapse Design Automation Inc. Experience February 2014 - July 2014
Job Staff Engineer at Qualcomm
Industry Information Technology and Services
Experience
Qualcomm July 2014 - Present
Synapse Design Automation Inc. February 2014 - July 2014
Synapse Design Automation Inc. July 2013 - December 2013
Synapse Design Automation Inc July 2012 - June 2013
Synapse Design Automation Inc. February 2011 - July 2012
Wipro Technologies February 2009 - February 2011
Wipro Technologies January 2008 - January 2009
Wipro Technologies July 2005 - January 2008
Skills
Physical Design, Timing Closure, Primetime, Static Timing Analysis, TCL, Clock Tree Synthesis, ASIC, SoC, Microcontrollers, Power Analysis, Magma, Floorplanning, LVS, Physical Verification, DRC, Timing, Route, ICC, Cadence Encounter, Apache Redhawk, Atoptech
Education
National Institute of Technology Karnataka 2001 — 2005
B.E, Electronics & Communication
Qualcomm July 2014 - Present
Synapse Design Automation Inc. February 2014 - July 2014
Synapse Design Automation Inc. July 2013 - December 2013
Synapse Design Automation Inc July 2012 - June 2013
Synapse Design Automation Inc. February 2011 - July 2012
Wipro Technologies February 2009 - February 2011
Wipro Technologies January 2008 - January 2009
Wipro Technologies July 2005 - January 2008
Skills
Physical Design, Timing Closure, Primetime, Static Timing Analysis, TCL, Clock Tree Synthesis, ASIC, SoC, Microcontrollers, Power Analysis, Magma, Floorplanning, LVS, Physical Verification, DRC, Timing, Route, ICC, Cadence Encounter, Apache Redhawk, Atoptech
Education
National Institute of Technology Karnataka 2001 — 2005
B.E, Electronics & Communication
Rajan Palani's Synapse Design Automation Inc. Experience August 2010 - January 2012
Job Staff Chipset Program Manager at Qualcomm
Industry Telecommunications
Experience
Qualcomm May 2014 - Present
Qualcomm 2012 - Present
Synapse Design Automation Inc. August 2010 - January 2012
Nokia February 2007 - June 2010
Texas Instruments 2003 - 2007
Insight Electronics 2000 - 2003
Insight Electronics 2000 - 2003
Skills
Clock Tree Synthesis, ASIC, Physical Design, Semiconductors, Wireless
Education
New Jersey Institute of Technology 1998 — 2000
University of Madras 1994 — 1998
B.E, Electronics & Communication
Qualcomm May 2014 - Present
Qualcomm 2012 - Present
Synapse Design Automation Inc. August 2010 - January 2012
Nokia February 2007 - June 2010
Texas Instruments 2003 - 2007
Insight Electronics 2000 - 2003
Insight Electronics 2000 - 2003
Skills
Clock Tree Synthesis, ASIC, Physical Design, Semiconductors, Wireless
Education
New Jersey Institute of Technology 1998 — 2000
University of Madras 1994 — 1998
B.E, Electronics & Communication
B Sunil Kumar's Synapse Design Automation Inc. Experience January 2013 - January 2014
Job Leading Design and Verification Engineer at MIPS (part of Imagination Technologies)
Industry Semiconductors
Experience
MIPS (part of Imagination Technologies) January 2014 - Present
Synapse Design Automation Inc. January 2013 - January 2014
Synapse Design Automation Inc. June 2012 - January 2013
Renesas Mobile Corporation December 2010 - May 2012
Nokia India pvt ltd January 2007 - December 2010
STMicroelectronics NOIDA August 2002 - December 2006
Skills
C, SystemVerilog, Verilog, VHDL, Digital Design, RTL verification, Gate Level Simulation, Silicon Debug, Functional Verification, Assertions, OVM, UVM, AMBA, OCP, ARM, ASIC, SoC, Questa, VCS, NCSim, Verdi, Debugging
Education
National Institute of Technology Karnataka 1998 — 2002
Bachelor of Engineering, Electronics and Communications
VD College, Jeypore, Orissa 1995 — 1997
UC, Science
UKP High School, Jeypore, Orissa 1985 — 1995
10, General
MIPS (part of Imagination Technologies) January 2014 - Present
Synapse Design Automation Inc. January 2013 - January 2014
Synapse Design Automation Inc. June 2012 - January 2013
Renesas Mobile Corporation December 2010 - May 2012
Nokia India pvt ltd January 2007 - December 2010
STMicroelectronics NOIDA August 2002 - December 2006
Skills
C, SystemVerilog, Verilog, VHDL, Digital Design, RTL verification, Gate Level Simulation, Silicon Debug, Functional Verification, Assertions, OVM, UVM, AMBA, OCP, ARM, ASIC, SoC, Questa, VCS, NCSim, Verdi, Debugging
Education
National Institute of Technology Karnataka 1998 — 2002
Bachelor of Engineering, Electronics and Communications
VD College, Jeypore, Orissa 1995 — 1997
UC, Science
UKP High School, Jeypore, Orissa 1985 — 1995
10, General
Corey Gee's Synapse Design Automation Inc. Experience June 2010 - July 2012
Job Computer Hardware Professional
Industry Semiconductors
Experience
Cypress Semiconductor August 2012 - Present
Synapse Design Automation Inc. June 2010 - July 2012
C2 Microsystems February 2008 - December 2008
LSI Logic April 2006 - November 2006
Intel April 2001 - April 2006
VxTel, Inc. December 1999 - April 2001
C-Cube Microsystems February 1995 - December 1999
Education
Stanford University 1990 — 1992
University of California, Santa Cruz
Cypress Semiconductor August 2012 - Present
Synapse Design Automation Inc. June 2010 - July 2012
C2 Microsystems February 2008 - December 2008
LSI Logic April 2006 - November 2006
Intel April 2001 - April 2006
VxTel, Inc. December 1999 - April 2001
C-Cube Microsystems February 1995 - December 1999
Education
Stanford University 1990 — 1992
University of California, Santa Cruz
Bill Shramko's Synapse Design Automation Inc. Experience April 2012 - January 2013
Job ASIC DFT Engineer at Micron Technology
Industry Semiconductors
Experience
Micron Technology February 2013 - Present
Synapse Design Automation Inc. April 2012 - January 2013
IBM March 2008 - December 2011
Unisys 1983 - 2007
Education
Lehigh University 1979 — 1983
BS, Electrical Engineering
Micron Technology February 2013 - Present
Synapse Design Automation Inc. April 2012 - January 2013
IBM March 2008 - December 2011
Unisys 1983 - 2007
Education
Lehigh University 1979 — 1983
BS, Electrical Engineering
Joel Pat Hanna's Synapse Design Automation Inc. Experience 2009 - 2010
Job Semiconductors Professional
Industry Semiconductors
Experience
Syndiant, Inc March 2013 - July 2013
Qualcomm January 2012 - February 2013
Ambature LLC November 2010 - November 2011
Synapse Design Automation Inc. 2009 - 2010
LSI, Inc. November 2007 - December 2007
Aeroflex, Inc. January 2007 - March 2007
Displaytech, Inc. November 2006 - December 2006
Intel Cellular & Handheld Group, December 2005 - August 2006
MathStar August 2005 - November 2005
Freescale Semiconductor March 2005 - August 2005
Skills
FPGA, PCB design, Microprocessors, IP design, ASIC, Circuit Design, Analog Design, Analog, Spectre, Verilog, CMOS, ModelSim, IC, Xilinx, USB, SoC, Semiconductors, VLSI, RTL design, EDA, Digital Design, Simulation, Compilers, DSP, Microcontrollers, Static Timing Analysis, Primetime, Timing Closure, Physical Design, DFT, Perl, PCIe, Mixed Signal, Debugging, NCSim, Logic Design, LVS, Cadence Virtuoso, Embedded Systems, Integrated Circuit..., Signal Integrity, Low-power Design, RF, Analog Circuit Design
Education
Keller Graduate School of Management of DeVry University 2005 — 2009
Graduate Certification, •Masters of Project Management
California State University-Fullerton 1977 — 1978
Elec. Engineering
California State University-Sacramento 1971 — 1975
BSEE, Electronic Engineering
Texas A&M University 1965 — 1966
Engineering
Syndiant, Inc March 2013 - July 2013
Qualcomm January 2012 - February 2013
Ambature LLC November 2010 - November 2011
Synapse Design Automation Inc. 2009 - 2010
LSI, Inc. November 2007 - December 2007
Aeroflex, Inc. January 2007 - March 2007
Displaytech, Inc. November 2006 - December 2006
Intel Cellular & Handheld Group, December 2005 - August 2006
MathStar August 2005 - November 2005
Freescale Semiconductor March 2005 - August 2005
Skills
FPGA, PCB design, Microprocessors, IP design, ASIC, Circuit Design, Analog Design, Analog, Spectre, Verilog, CMOS, ModelSim, IC, Xilinx, USB, SoC, Semiconductors, VLSI, RTL design, EDA, Digital Design, Simulation, Compilers, DSP, Microcontrollers, Static Timing Analysis, Primetime, Timing Closure, Physical Design, DFT, Perl, PCIe, Mixed Signal, Debugging, NCSim, Logic Design, LVS, Cadence Virtuoso, Embedded Systems, Integrated Circuit..., Signal Integrity, Low-power Design, RF, Analog Circuit Design
Education
Keller Graduate School of Management of DeVry University 2005 — 2009
Graduate Certification, •Masters of Project Management
California State University-Fullerton 1977 — 1978
Elec. Engineering
California State University-Sacramento 1971 — 1975
BSEE, Electronic Engineering
Texas A&M University 1965 — 1966
Engineering
Riya Varghese's Synapse Design Automation Inc. Experience July 2014 - Present
Job Senior Physical Design Engineer at Synapse Design Automation Inc
Industry Semiconductors
Experience
Synapse Design Automation Inc July 2014 - Present
Synapse Design Automation Inc. August 2011 - June 2014
KarMic December 2005 - December 2009
C-logic 2005 - 2005
Skills
LVS, ASIC, Physical Design, Integrated Circuit..., USB, DRC, VLSI, Physical Verification, CMOS, Cadence Virtuoso, Floorplanning, Verilog, EDA, Low-power Design, TCL
Education
Avinashilingam Institute for Home Science and Higher Education for Women 2001 — 2005
BE, Engineering
Synapse Design Automation Inc July 2014 - Present
Synapse Design Automation Inc. August 2011 - June 2014
KarMic December 2005 - December 2009
C-logic 2005 - 2005
Skills
LVS, ASIC, Physical Design, Integrated Circuit..., USB, DRC, VLSI, Physical Verification, CMOS, Cadence Virtuoso, Floorplanning, Verilog, EDA, Low-power Design, TCL
Education
Avinashilingam Institute for Home Science and Higher Education for Women 2001 — 2005
BE, Engineering
Jigneshkumar Patel's Synapse Design Automation Inc. Experience February 2014 - Present
Job Sr. Design Verification Engineer at Synapse Design Automation Inc.
Industry Semiconductors
Experience
Synapse Design Automation Inc. February 2014 - Present
Synapse Design Automation Inc. April 2013 - January 2014
IBM August 2011 - March 2013
eInfochips April 2011 - August 2011
NXP Semiconductors April 2011 - August 2011
einfochips October 2007 - March 2011
ST-Ericsson, Singapore September 2010 - December 2010
M/S VAMENDU June 2006 - October 2007
Skills
SystemVerilog, Open Verification..., VHDL, Microcontrollers, C, Microchip, SoC, ASIC, Debugging, Simulations, Embedded Systems, VMM, Perl, Functional Verification, RTL design, Computer Architecture, Verilog, VLSI, ModelSim, Xilinx, RTL coding, Static Timing Analysis, TCL, FPGA, NCSim, Timing Closure, Physical Design, Veritas Cluster Server, Digital Signal...
Education
Sardar Patel University 2003 — 2006
B.E, Electronics & Communication
Government Polytechanic, Gandhinagar 2000 — 2003
Diploma, Electronics & Communication
Synapse Design Automation Inc. February 2014 - Present
Synapse Design Automation Inc. April 2013 - January 2014
IBM August 2011 - March 2013
eInfochips April 2011 - August 2011
NXP Semiconductors April 2011 - August 2011
einfochips October 2007 - March 2011
ST-Ericsson, Singapore September 2010 - December 2010
M/S VAMENDU June 2006 - October 2007
Skills
SystemVerilog, Open Verification..., VHDL, Microcontrollers, C, Microchip, SoC, ASIC, Debugging, Simulations, Embedded Systems, VMM, Perl, Functional Verification, RTL design, Computer Architecture, Verilog, VLSI, ModelSim, Xilinx, RTL coding, Static Timing Analysis, TCL, FPGA, NCSim, Timing Closure, Physical Design, Veritas Cluster Server, Digital Signal...
Education
Sardar Patel University 2003 — 2006
B.E, Electronics & Communication
Government Polytechanic, Gandhinagar 2000 — 2003
Diploma, Electronics & Communication
Gera Kazakov's Synapse Design Automation Inc. Experience November 2011 - June 2013
Job Software Engineer
Industry Computer Software
Experience
Cardinal Peak August 2014 - October 2014
SGI August 2013 - April 2014
Synapse Design Automation Inc. November 2011 - June 2013
SGI May 2010 - June 2011
Rebit Inc. February 2010 - May 2010
COPAN Systems May 2005 - December 2009
Crosswalk, Inc. January 2005 - May 2005
Set Software Services May 2004 - December 2004
COPAN Systems March 2003 - May 2004
Set Engineering, Inc. October 1995 - December 2002
Skills
Storage, C, Device Drivers, Linux Kernel, Windows Driver..., SCSI, RAID, SAN, iSCSI, Fibre Channel, TCP/IP, Linux, Windows, Embedded Systems, Software Development, Software Engineering, C++, Boost C++, Qt, Microcontrollers, Microchip, Hardware, System Architecture, Firmware
Education
Perm State Technical University (PSTU) 1978 — 1983
MS, Computer Systems Engineering
Cardinal Peak August 2014 - October 2014
SGI August 2013 - April 2014
Synapse Design Automation Inc. November 2011 - June 2013
SGI May 2010 - June 2011
Rebit Inc. February 2010 - May 2010
COPAN Systems May 2005 - December 2009
Crosswalk, Inc. January 2005 - May 2005
Set Software Services May 2004 - December 2004
COPAN Systems March 2003 - May 2004
Set Engineering, Inc. October 1995 - December 2002
Skills
Storage, C, Device Drivers, Linux Kernel, Windows Driver..., SCSI, RAID, SAN, iSCSI, Fibre Channel, TCP/IP, Linux, Windows, Embedded Systems, Software Development, Software Engineering, C++, Boost C++, Qt, Microcontrollers, Microchip, Hardware, System Architecture, Firmware
Education
Perm State Technical University (PSTU) 1978 — 1983
MS, Computer Systems Engineering
Angela Xiao's Synapse Design Automation Inc. Experience September 2014 - Present
Job Technical Lead at Synapse Design Automation Inc.
Industry Semiconductors
Experience
Synapse Design Automation Inc. September 2014 - Present
Synapse Design Automation Inc. December 2013 - August 2014
Synapse Design Automation Inc. January 2012 - December 2013
IBM July 2008 - December 2011
Alchip Technologies July 2005 - May 2008
Skills
ASIC, VLSI, SoC, EDA, Backend Development, C, Perl, Tcl-Tk, Linux, VHDL, Verilog, Layout Verification, Caliber, Magma, Synopsis, IBM in-house tools, Cadence
Education
Fudan University 2001 — 2005
Electrical Engineering, Microelectronics
Synapse Design Automation Inc. September 2014 - Present
Synapse Design Automation Inc. December 2013 - August 2014
Synapse Design Automation Inc. January 2012 - December 2013
IBM July 2008 - December 2011
Alchip Technologies July 2005 - May 2008
Skills
ASIC, VLSI, SoC, EDA, Backend Development, C, Perl, Tcl-Tk, Linux, VHDL, Verilog, Layout Verification, Caliber, Magma, Synopsis, IBM in-house tools, Cadence
Education
Fudan University 2001 — 2005
Electrical Engineering, Microelectronics
Irene Jing Liu's Synapse Design Automation Inc. Experience November 2010 - March 2011
Job ASIC Design Engineer at Entropic Communications
Industry Semiconductors
Experience
Entropic Communications September 2014 - Present
Broadcom April 2011 - September 2014
Synapse Design Automation Inc. November 2010 - March 2011
ST-Ericsson August 2008 - November 2010
NXP Semiconductors February 2006 - August 2008
ST Microelectronics December 2003 - February 2006
Skills
DFT, IC, PLL, ASIC, Integrated Circuit..., Low-power Design, VHDL, FPGA, Static Timing Analysis, Verilog, SoC, TCL, Logic Synthesis, USB, NCSim, Perl, Synopsys tools
Education
Queen's University 2001 — 2003
M.S.c.(Eng) of Electrical Engineering
Entropic Communications September 2014 - Present
Broadcom April 2011 - September 2014
Synapse Design Automation Inc. November 2010 - March 2011
ST-Ericsson August 2008 - November 2010
NXP Semiconductors February 2006 - August 2008
ST Microelectronics December 2003 - February 2006
Skills
DFT, IC, PLL, ASIC, Integrated Circuit..., Low-power Design, VHDL, FPGA, Static Timing Analysis, Verilog, SoC, TCL, Logic Synthesis, USB, NCSim, Perl, Synopsys tools
Education
Queen's University 2001 — 2003
M.S.c.(Eng) of Electrical Engineering
Shaam Rangiah's Synapse Design Automation Inc. Experience February 2007 - September 2009
Job Principal physical design engineer at Microchip Technology
Industry Semiconductors
Experience
Microchip Technology September 2014 - Present
Broadcom September 2009 - September 2014
Synapse Design Automation Inc. February 2007 - September 2009
Wipro Technologies February 2004 - February 2007
Skills
Verilog, ASIC, FPGA, IC, SoC, RTL design, Debugging, VLSI, Semiconductors, Embedded Systems
Education
Oklahoma State University 2000 — 2003
MS, Electrical and Computer Science Engineering
University of Madras 1996 — 2000
Bachelor's degree, Electrical, Electronics and Communications Engineering
Microchip Technology September 2014 - Present
Broadcom September 2009 - September 2014
Synapse Design Automation Inc. February 2007 - September 2009
Wipro Technologies February 2004 - February 2007
Skills
Verilog, ASIC, FPGA, IC, SoC, RTL design, Debugging, VLSI, Semiconductors, Embedded Systems
Education
Oklahoma State University 2000 — 2003
MS, Electrical and Computer Science Engineering
University of Madras 1996 — 2000
Bachelor's degree, Electrical, Electronics and Communications Engineering
Priscilla Tu's Synapse Design Automation Inc. Experience 2011 - Present
Job Back End Lead Full Chip design at Synapse Design Automation Inc.
Industry Computer Hardware
Experience
Synapse Design Automation Inc. 2011 - Present
Pericom Semiconductor September 2008 - 2009
ARM IP August 2002 - July 2008
Silicon Access Network 2000 - 2002
VLSI January 1996 - January 2001
Philips Semiconductors 1999 - 2001
LSI August 1989 - December 1995
National Semiconductor June 1988 - August 1989
Skills
Physical Design, DRC, LVS, Analog, Microprocessors, ASIC, CMOS, SoC, IC, VLSI, EDA, Mixed Signal, Semiconductors, Verilog, Static Timing Analysis, TCL, Debugging, Perl, Primetime, Cadence Virtuoso, Timing Closure, Physical Verification
Education
University of California, Berkeley
BS, EECS-Electrical Engineering & Computer Science
Synapse Design Automation Inc. 2011 - Present
Pericom Semiconductor September 2008 - 2009
ARM IP August 2002 - July 2008
Silicon Access Network 2000 - 2002
VLSI January 1996 - January 2001
Philips Semiconductors 1999 - 2001
LSI August 1989 - December 1995
National Semiconductor June 1988 - August 1989
Skills
Physical Design, DRC, LVS, Analog, Microprocessors, ASIC, CMOS, SoC, IC, VLSI, EDA, Mixed Signal, Semiconductors, Verilog, Static Timing Analysis, TCL, Debugging, Perl, Primetime, Cadence Virtuoso, Timing Closure, Physical Verification
Education
University of California, Berkeley
BS, EECS-Electrical Engineering & Computer Science
Anand G L's Synapse Design Automation Inc. Experience 2010 - Present
Job Physical Design Engineer
Industry Semiconductors
Experience
Synapse Design Automation Inc. 2010 - Present
Wipro Technologies 2008 - July 2010
Wipro Technologies 2006 - 2008
Clogic 2005 - 2006
Skills
Physical Design, Timing Closure, Static Timing Analysis, Floorplanning, DRC, LVS, Physical Verification
Education
Manipal Institute of Technology 2002 — 2004
M.Tech, DEAC
ISRO project
Synapse Design Automation Inc. 2010 - Present
Wipro Technologies 2008 - July 2010
Wipro Technologies 2006 - 2008
Clogic 2005 - 2006
Skills
Physical Design, Timing Closure, Static Timing Analysis, Floorplanning, DRC, LVS, Physical Verification
Education
Manipal Institute of Technology 2002 — 2004
M.Tech, DEAC
ISRO project
Kedareswar Rao's Synapse Design Automation Inc. Experience August 2012 - June 2013
Job Customer Engineer Qualcomm Atheros
Industry Semiconductors
Experience
Qualcomm January 2014 - Present
Marvell Semiconductor June 2013 - January 2014
Synapse Design Automation Inc. August 2012 - June 2013
Marvell Semiconductor January 2011 - August 2012
Motorola March 2006 - January 2011
Skills
Embedded Systems, Bluetooth, Debugging, Firmware, RTOS, Testing, Embedded Software, Device Drivers, Android, Test Planning, Software Quality..., Perl, Wireless, Linux
Education
BITS Pilani 2009 — 2011
Master of Science (MS), Software Systems
Acharya Nagarjuna University 2001 — 2005
Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering
Qualcomm January 2014 - Present
Marvell Semiconductor June 2013 - January 2014
Synapse Design Automation Inc. August 2012 - June 2013
Marvell Semiconductor January 2011 - August 2012
Motorola March 2006 - January 2011
Skills
Embedded Systems, Bluetooth, Debugging, Firmware, RTOS, Testing, Embedded Software, Device Drivers, Android, Test Planning, Software Quality..., Perl, Wireless, Linux
Education
BITS Pilani 2009 — 2011
Master of Science (MS), Software Systems
Acharya Nagarjuna University 2001 — 2005
Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering
John Panagiotopoulos's Synapse Design Automation Inc. Experience September 2014 - May 2015
Job Director of Sales at Synapse Design Automation Inc.
Industry Semiconductors
Experience
Synapse Design Automation Inc. September 2014 - May 2015
eSilicon May 2013 - August 2014
Kawasaki Microelectronics October 2011 - April 2013
Kawasaki Microelectronics March 2001 - September 2011
Samsung Electronics America January 1996 - March 2000
IBM January 1992 - January 1996
IBM January 1981 - January 1992
Skills
Semiconductors, SoC, IC, EDA, ASIC, Product Marketing, Analog, Mixed Signal, Wireless, Semiconductor Industry, FPGA, Consumer Electronics, Product Management, Go-to-market Strategy, Analog Circuit Design, Integrated Circuit...
Education
University of Bridgeport 1976 — 1981
BS, Electrical Engineering
Synapse Design Automation Inc. September 2014 - May 2015
eSilicon May 2013 - August 2014
Kawasaki Microelectronics October 2011 - April 2013
Kawasaki Microelectronics March 2001 - September 2011
Samsung Electronics America January 1996 - March 2000
IBM January 1992 - January 1996
IBM January 1981 - January 1992
Skills
Semiconductors, SoC, IC, EDA, ASIC, Product Marketing, Analog, Mixed Signal, Wireless, Semiconductor Industry, FPGA, Consumer Electronics, Product Management, Go-to-market Strategy, Analog Circuit Design, Integrated Circuit...
Education
University of Bridgeport 1976 — 1981
BS, Electrical Engineering
Ke Wu's Synapse Design Automation Inc. Experience July 2013 - August 2013
Job Sr. Staff engineer at AMD Technologies, Inc.
Industry Electrical/Electronic Manufacturing
Experience
AMD Technologies, Inc. September 2013 - Present
Synapse Design Automation Inc. July 2013 - August 2013
Vanguard analog Inc. February 2012 - May 2013
Unitech technoloyies Inc. January 2009 - December 2011
Lattice Semiconductor March 2008 - December 2009
Exar Corporation 2006 - 2008
Pericom Semiconductor December 1996 - November 2006
Skills
Analog Circuit Design, Analog Design, Mixed Signal, Circuit Design, CMOS, Cadence Virtuoso, Spectre, Simulation, PLL, Signal Integrity, VCO, SERDES, Perl, PCIe, Verilog-A, pipeline adc design, ADC/DAC, AMS modeling, Ocean script, matlab, ADEXL
Education
Southeast University 1992 — 1995
M.S., Radio Electrical Engineering
AMD Technologies, Inc. September 2013 - Present
Synapse Design Automation Inc. July 2013 - August 2013
Vanguard analog Inc. February 2012 - May 2013
Unitech technoloyies Inc. January 2009 - December 2011
Lattice Semiconductor March 2008 - December 2009
Exar Corporation 2006 - 2008
Pericom Semiconductor December 1996 - November 2006
Skills
Analog Circuit Design, Analog Design, Mixed Signal, Circuit Design, CMOS, Cadence Virtuoso, Spectre, Simulation, PLL, Signal Integrity, VCO, SERDES, Perl, PCIe, Verilog-A, pipeline adc design, ADC/DAC, AMS modeling, Ocean script, matlab, ADEXL
Education
Southeast University 1992 — 1995
M.S., Radio Electrical Engineering
Milan Vognarek's Synapse Design Automation Inc. Experience June 2010 - Present
Job Electrical Engineer at Synapse Design
Industry Design
Experience
Synapse Design Automation Inc. June 2010 - Present
Skills
Debugging, Firmware, C++ Language, Python, Embedded Systems, Microcontrollers, Storage, Semiconductors
Education
California State University-Northridge 1984 — 1987
Bachelor of Science (BS), Electrical and Electronics Engineering
Synapse Design Automation Inc. June 2010 - Present
Skills
Debugging, Firmware, C++ Language, Python, Embedded Systems, Microcontrollers, Storage, Semiconductors
Education
California State University-Northridge 1984 — 1987
Bachelor of Science (BS), Electrical and Electronics Engineering
Tao (刘涛)'s Synapse Design Automation Inc. Experience February 2012 - October 2013
Job Verification Manager at Qualcomm
Industry Semiconductors
Experience
Qualcomm June 2015 - Present
Qualcomm April 2014 - Present
Synapse Design Automation November 2013 - April 2014
Synapse Design Automation Inc. February 2012 - October 2013
MediaTek December 2007 - February 2012
Nufront July 2007 - December 2007
VIA Technologies, Inc. July 2006 - July 2007
Skills
ASIC, EDA, Management, Training, CRM, Product Promotion, SoC, IC, VMM, Formal Verification, UVM, RTL design, Semiconductors, VLSI, Integrated Circuit...
Education
Tsinghua University 2003 — 2006
Master, EE
University of Electronic Science and Technology 1999 — 2003
Bachelor, Communication
Qualcomm June 2015 - Present
Qualcomm April 2014 - Present
Synapse Design Automation November 2013 - April 2014
Synapse Design Automation Inc. February 2012 - October 2013
MediaTek December 2007 - February 2012
Nufront July 2007 - December 2007
VIA Technologies, Inc. July 2006 - July 2007
Skills
ASIC, EDA, Management, Training, CRM, Product Promotion, SoC, IC, VMM, Formal Verification, UVM, RTL design, Semiconductors, VLSI, Integrated Circuit...
Education
Tsinghua University 2003 — 2006
Master, EE
University of Electronic Science and Technology 1999 — 2003
Bachelor, Communication
Dr. Sivan Nagireddi's Synapse Design Automation Inc. Experience January 2014 - Present
Job Distinguished Architect, Wireless Systems (IoT/M2M/LTE/GPS ...)
Industry Telecommunications
Experience
Synapse Design Automation Inc. January 2014 - Present
Broadcom April 2012 - December 2013
Ikanos Communications January 2008 - February 2012
Analog Devices January 2001 - December 2007
Chiplogic Inc. January 2000 - December 2000
Encore Software Limited June 1999 - December 1999
Research Center Imarat November 1986 - May 1999
Education
Osmania University 1994 — 1999
Ph.D, Signal Processing under ECE Department, A
Osmania University 1987 — 1990
Master of Engineering, Electronics and Communications Engineering
Synapse Design Automation Inc. January 2014 - Present
Broadcom April 2012 - December 2013
Ikanos Communications January 2008 - February 2012
Analog Devices January 2001 - December 2007
Chiplogic Inc. January 2000 - December 2000
Encore Software Limited June 1999 - December 1999
Research Center Imarat November 1986 - May 1999
Education
Osmania University 1994 — 1999
Ph.D, Signal Processing under ECE Department, A
Osmania University 1987 — 1990
Master of Engineering, Electronics and Communications Engineering
Anne Yue's Synapse Design Automation Inc. Experience April 2012 - Present
Job Sr. STA Engineer at Synapse Design Inc.
Industry Semiconductors
Experience
Synapse Design Automation Inc. April 2012 - Present
LSI Corporation November 2003 - January 2012
Agilent Technologies March 2000 - March 2003
NeoMagic July 1999 - March 2000
Toshiba America Electronic Components, Inc. June 1998 - July 1999
Skills
STA timing closure, SOC..., ASIC, Technical Publication, SoC, Static Timing Analysis, Timing Closure, Primetime, EDA, Formal Verification, DC Synthesis, RTL design
Education
San Jose State University 1996 — 1998
Master, Electrical Engineering
Tsinghua University 1990 — 1993
Master, Nuclear engineering
Tsinghua University 1985 — 1990
BS, Mechanical engineering
Synapse Design Automation Inc. April 2012 - Present
LSI Corporation November 2003 - January 2012
Agilent Technologies March 2000 - March 2003
NeoMagic July 1999 - March 2000
Toshiba America Electronic Components, Inc. June 1998 - July 1999
Skills
STA timing closure, SOC..., ASIC, Technical Publication, SoC, Static Timing Analysis, Timing Closure, Primetime, EDA, Formal Verification, DC Synthesis, RTL design
Education
San Jose State University 1996 — 1998
Master, Electrical Engineering
Tsinghua University 1990 — 1993
Master, Nuclear engineering
Tsinghua University 1985 — 1990
BS, Mechanical engineering
Naresh Maddipati's Synapse Design Automation Inc. Experience May 2012 - Present
Job Physical Design Engineer at Synapse Design Automation Inc.
Industry Semiconductors
Experience
Synapse Design Automation Inc. May 2012 - Present
Tecra Systems June 2010 - March 2012
HCL Technologies January 2007 - March 2010
Skills
Physical Design, Static Timing Analysis, Perl, Timing Closure, Primetime, SoC, Floorplanning, ASIC, Debugging, VLSI, Verilog, RTL Design
Education
Sathyabama Institute of Science and Technology 2004 — 2006
Master of Technology (M.Tech.), VLSI
Jawaharlal Nehru Technological University 1999 — 2003
Bachelor of Technology (B.Tech.), ECE
Synapse Design Automation Inc. May 2012 - Present
Tecra Systems June 2010 - March 2012
HCL Technologies January 2007 - March 2010
Skills
Physical Design, Static Timing Analysis, Perl, Timing Closure, Primetime, SoC, Floorplanning, ASIC, Debugging, VLSI, Verilog, RTL Design
Education
Sathyabama Institute of Science and Technology 2004 — 2006
Master of Technology (M.Tech.), VLSI
Jawaharlal Nehru Technological University 1999 — 2003
Bachelor of Technology (B.Tech.), ECE
Jerry Lo's Synapse Design Automation Inc. Experience January 2014 - Present
Job Senior Design Engineer at Synapse Design Automation Inc.
Industry Computer Hardware
Experience
Synapse Design Automation Inc. January 2014 - Present
WD, a Western Digital company April 2009 - Present
SiliconSystems, Inc. December 2008 - April 2009
Owlink Technologies, Inc May 2008 - November 2008
Skills
Firmware, SSD, Debugging, C, C++, Embedded Systems, SATA, PATA, ARM, 8051 Microcontroller, Flash Memory, NAND, Badminton, Hybrid Drive, ATA, SoC, Embedded Software
Education
University of California, Irvine 2003 — 2008
Information and Computer Science
Synapse Design Automation Inc. January 2014 - Present
WD, a Western Digital company April 2009 - Present
SiliconSystems, Inc. December 2008 - April 2009
Owlink Technologies, Inc May 2008 - November 2008
Skills
Firmware, SSD, Debugging, C, C++, Embedded Systems, SATA, PATA, ARM, 8051 Microcontroller, Flash Memory, NAND, Badminton, Hybrid Drive, ATA, SoC, Embedded Software
Education
University of California, Irvine 2003 — 2008
Information and Computer Science
Deloitte
PwC
Ernst & Young
Walgreens
Procter & Gamble
KPMG
PricewaterhouseCoopers
EY