Tabula Company
Industry: Information
DescriptionA table is an arrangement of data in rows and columns, or possibly in a more complex structure. Tables are widely used in communication, research, and data analysis. Tables appear in print media, handwritten notes, computer software, architectural ornamentation, traffic signs, and many other places.
Tabula List of Employees There's an exhaustive list of past and present employees! Get comprehensive information on the number of employees at Tabula. You can filter them based on skills, years of employment, job, education, department, and prior employment.
Tabula Salaries. You can even request information on how much does Tabula pay if you want to. Learn about salaries, pros and cons of working for Tabula directly from the past employees.
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85 Tabula employees in database. Find out everything there's to know about Tabula employees. We offer you a great deal of unbiased information from the internal database, personal records, and many other details that might be of interest to you.
Tabula Employees
Employee
Years
Job
Industry
Laura Downs Laura Downs's Tabula Experience February 2005 - March 2015
Job Software Engineer
Industry Computer Software
Experience
Magic Leap April 2015 - Present
Tabula February 2005 - March 2015
Leica Geosystems HDS May 2003 - February 2005
UC Berkeley September 1993 - May 2003
Skills
Algorithms, Programming, Software Engineering, Software Architecture, Computer Graphics, C++, EDA, FPGA, Perl, SoC, Semiconductors, Debugging, ASIC, Linear Algebra, Numerical Analysis, Simulations, Embedded Systems, C, Verilog, Software Design, Software Development, Computational Geometry, Optimization
Education
University of California, Berkeley
PhD
University of California, Berkeley
B.A.
Magic Leap April 2015 - Present
Tabula February 2005 - March 2015
Leica Geosystems HDS May 2003 - February 2005
UC Berkeley September 1993 - May 2003
Skills
Algorithms, Programming, Software Engineering, Software Architecture, Computer Graphics, C++, EDA, FPGA, Perl, SoC, Semiconductors, Debugging, ASIC, Linear Algebra, Numerical Analysis, Simulations, Embedded Systems, C, Verilog, Software Design, Software Development, Computational Geometry, Optimization
Education
University of California, Berkeley
PhD
University of California, Berkeley
B.A.
Christian Plante Christian Plante's Tabula Experience September 2011 - December 2013
Job Sr. Product Line Manager StrataXGS at Broadcom
Industry Semiconductors
Experience
Broadcom January 2014 - Present
Tabula September 2011 - December 2013
PLX Technology February 2011 - September 2011
Actel 2008 - 2010
Cswitch 2007 - 2008
Altera 2006 - 2007
Altera 2001 - 2006
S3 Graphics 2000 - 2001
Christian Plante - Consultant 1997 - 1999
Anillusion Technologies, Inc. 1995 - 1997
Skills
Sales Operations, International Marketing, Marketing Automation, Field Marketing, Semiconductors, Pricing Strategy, Market Research, Product Marketing, Marketing Strategy, Sales Management, FPGA, Product Launch, Simulations, Analog, IC, Strategy, Start-ups, Integrated Marketing, Program Management, Marketing, Wireless, Mobile Devices
Education
Queen's University 1999 — 2000
MBA, Marketing
Université Laval 1990 — 1994
B.Sc., Electrical Engineering
Broadcom January 2014 - Present
Tabula September 2011 - December 2013
PLX Technology February 2011 - September 2011
Actel 2008 - 2010
Cswitch 2007 - 2008
Altera 2006 - 2007
Altera 2001 - 2006
S3 Graphics 2000 - 2001
Christian Plante - Consultant 1997 - 1999
Anillusion Technologies, Inc. 1995 - 1997
Skills
Sales Operations, International Marketing, Marketing Automation, Field Marketing, Semiconductors, Pricing Strategy, Market Research, Product Marketing, Marketing Strategy, Sales Management, FPGA, Product Launch, Simulations, Analog, IC, Strategy, Start-ups, Integrated Marketing, Program Management, Marketing, Wireless, Mobile Devices
Education
Queen's University 1999 — 2000
MBA, Marketing
Université Laval 1990 — 1994
B.Sc., Electrical Engineering
Rakesh Hemnani Rakesh Hemnani's Tabula Experience April 2014 - February 2015
Job Sr. Solutions Engineer at Mellanox Technologies
Industry Semiconductors
Experience
Mellanox Technologies March 2015 - Present
Tabula April 2014 - February 2015
Tabula July 2011 - March 2014
Achronix Semiconductor November 2007 - July 2011
Altera Corp. June 2005 - November 2007
Skills
Digital Design, Layer2/3 Networking-..., TCP/IP, Network Security, Wireshark, Iperf, DDR3, PCIe, SERDES, Perl, TCL, FPGA, Verilog
Education
San Jose State University 2002 — 2004
MSEE, Electrical Engineering
Mumbai University 1997 — 2001
BE, Electronics Engineering
Mellanox Technologies March 2015 - Present
Tabula April 2014 - February 2015
Tabula July 2011 - March 2014
Achronix Semiconductor November 2007 - July 2011
Altera Corp. June 2005 - November 2007
Skills
Digital Design, Layer2/3 Networking-..., TCP/IP, Network Security, Wireshark, Iperf, DDR3, PCIe, SERDES, Perl, TCL, FPGA, Verilog
Education
San Jose State University 2002 — 2004
MSEE, Electrical Engineering
Mumbai University 1997 — 2001
BE, Electronics Engineering
Vikas Chandra Vikas Chandra's Tabula Experience July 2004 - October 2006
Job Senior Principal Engineer, ARM Research
Industry Semiconductors
Experience
ARM 2007 - Present
Stanford University September 2011 - September 2014
Tabula July 2004 - October 2006
Strategic CAD Labs, Intel corporation March 2004 - July 2004
IBM Austin Research Lab July 2002 - December 2002
Central R&D, STMicroelectronics January 1998 - July 2000
Skills
Processors, Technical Leadership, Semiconductors, Microprocessors, VLSI, FPGA, Circuit Design, SoC, Low-power Design, SRAM, EDA, Verilog, RTL design, ASIC, Integrated Circuit..., High Performance..., Hardware Architecture, Algorithms, Python, Data Structures, CMOS, Silicon, IC, RTL Design
Education
Carnegie Mellon University 2000 — 2004
Ph.D., Electrical and Computer Engineering
Carnegie Mellon University 2000 — 2002
MS, Electrical and Computer Engineering
Birla Institute of Technology and Science, Pilani 1994 — 1998
B.E. (Hons.), Instrumentation Engineering
ARM 2007 - Present
Stanford University September 2011 - September 2014
Tabula July 2004 - October 2006
Strategic CAD Labs, Intel corporation March 2004 - July 2004
IBM Austin Research Lab July 2002 - December 2002
Central R&D, STMicroelectronics January 1998 - July 2000
Skills
Processors, Technical Leadership, Semiconductors, Microprocessors, VLSI, FPGA, Circuit Design, SoC, Low-power Design, SRAM, EDA, Verilog, RTL design, ASIC, Integrated Circuit..., High Performance..., Hardware Architecture, Algorithms, Python, Data Structures, CMOS, Silicon, IC, RTL Design
Education
Carnegie Mellon University 2000 — 2004
Ph.D., Electrical and Computer Engineering
Carnegie Mellon University 2000 — 2002
MS, Electrical and Computer Engineering
Birla Institute of Technology and Science, Pilani 1994 — 1998
B.E. (Hons.), Instrumentation Engineering
Kris Kozminski Kris Kozminski's Tabula Experience February 2008 - February 2015
Job Architect at Mentor Graphics
Industry Computer Software
Experience
Mentor Graphics March 2015 - Present
Tabula February 2008 - February 2015
Cadence Design Systems September 2004 - January 2008
National Semiconductor Corp. November 1995 - September 2004
Astarix, Inc April 1993 - October 1995
Relative Software, Inc September 1988 - October 1995
Microelectronics Center of North Carolina September 1988 - March 1993
Skills
C++, Debugging, Algorithms, Software Development, TCL, EDA, Unix, Shell Scripting, Perforce, OOP, ASIC, Software Engineering, Python, SoC, IC, VLSI, Verilog
Education
University of Rochester 1981 — 1985
Ph.D., Electrical Engineering
Politechnika Warszawska 1973 — 1978
M.S., Electronic Engineering (with honors), Electrical and Electronics Engineering
Mentor Graphics March 2015 - Present
Tabula February 2008 - February 2015
Cadence Design Systems September 2004 - January 2008
National Semiconductor Corp. November 1995 - September 2004
Astarix, Inc April 1993 - October 1995
Relative Software, Inc September 1988 - October 1995
Microelectronics Center of North Carolina September 1988 - March 1993
Skills
C++, Debugging, Algorithms, Software Development, TCL, EDA, Unix, Shell Scripting, Perforce, OOP, ASIC, Software Engineering, Python, SoC, IC, VLSI, Verilog
Education
University of Rochester 1981 — 1985
Ph.D., Electrical Engineering
Politechnika Warszawska 1973 — 1978
M.S., Electronic Engineering (with honors), Electrical and Electronics Engineering
Fayez Saliba Fayez Saliba's Tabula Experience 2011 - Present
Job Sr. Staff Engineer at Tabula
Industry Computer Software
Experience
Tabula 2011 - Present
Takumi Technology 2004 - 2009
Institute of Industrial Science, The University of Tokyo 2002 - 2004
Skills
Semiconductors, Software Engineering, Perl, Python, C++, EDA, Algorithms, IC, Simulations, Start-ups, Testing, Software Development, Architectures, Electronics, Linux, Business Development, VHDL, Matlab, ModelSim, FPGA, Place & Route, Architecture
Education
東京大学 / The University of Tokyo 2002 — 2004
ME, Electronics Engineering
The University of Tokyo, International Center 2002 — 2002
Certificate, Japanese language, Japanese Culture and Affairs
Saint Joseph University 1995 — 2000
BE, Electrical Engineering, Telecommunications
Tabula 2011 - Present
Takumi Technology 2004 - 2009
Institute of Industrial Science, The University of Tokyo 2002 - 2004
Skills
Semiconductors, Software Engineering, Perl, Python, C++, EDA, Algorithms, IC, Simulations, Start-ups, Testing, Software Development, Architectures, Electronics, Linux, Business Development, VHDL, Matlab, ModelSim, FPGA, Place & Route, Architecture
Education
東京大学 / The University of Tokyo 2002 — 2004
ME, Electronics Engineering
The University of Tokyo, International Center 2002 — 2002
Certificate, Japanese language, Japanese Culture and Affairs
Saint Joseph University 1995 — 2000
BE, Electrical Engineering, Telecommunications
Vamsi Nalluri Vamsi Nalluri's Tabula Experience July 2012 - March 2015
Job Staff Engineer at Tabula
Industry Semiconductors
Experience
Altera March 2015 - Present
Tabula July 2012 - March 2015
Tabula October 2008 - July 2012
Xilinx July 2005 - September 2008
Skills
Verilog, FPGA, Perl, TCL, VHDL, Xilinx, ASIC, SystemVerilog, C++, EDA, SoC, Semiconductors, RTL design, Debugging, Static Timing Analysis, IC, RTL, VLSI, I2C, Mixed Signal, IP, Simulations, Integrated Circuit..., Functional Verification, ModelSim, NCSim, Validation, Hardware Bring-up, Verification..., RTL Design
Education
Indian Institute of Technology, Madras 2001 — 2005
BTech, Electrical Engineering
Special Coaching Center 1998 — 2001
Atomic Energy Central School 1994 — 1998
Bhavans Sri Ramakrishna Vidyalaya 1986 — 1994
Altera March 2015 - Present
Tabula July 2012 - March 2015
Tabula October 2008 - July 2012
Xilinx July 2005 - September 2008
Skills
Verilog, FPGA, Perl, TCL, VHDL, Xilinx, ASIC, SystemVerilog, C++, EDA, SoC, Semiconductors, RTL design, Debugging, Static Timing Analysis, IC, RTL, VLSI, I2C, Mixed Signal, IP, Simulations, Integrated Circuit..., Functional Verification, ModelSim, NCSim, Validation, Hardware Bring-up, Verification..., RTL Design
Education
Indian Institute of Technology, Madras 2001 — 2005
BTech, Electrical Engineering
Special Coaching Center 1998 — 2001
Atomic Energy Central School 1994 — 1998
Bhavans Sri Ramakrishna Vidyalaya 1986 — 1994
Bryan Catanzaro Bryan Catanzaro's Tabula Experience May 2006 - August 2006
Job
Industry Computer Software
Experience
Baidu, Inc. June 2014 - Present
NVIDIA May 2011 - June 2014
University of California, Berkeley 2005 - May 2011
NVIDIA May 2009 - August 2009
NVIDIA May 2008 - August 2008
Intel May 2007 - August 2007
Tabula May 2006 - August 2006
Tabula May 2005 - August 2005
Intel May 2003 - August 2003
Intel May 2002 - August 2002
Skills
Computer Architecture, Verilog, Algorithms, CUDA, FPGA, Parallel Computing, Parallel Programming, EDA, High Performance..., VHDL, Embedded Systems, C++, C, OpenMP, Matlab, Processors, Simulations, Compilers, Pattern Recognition, LaTeX, Signal Processing, Machine Learning, Computer Science, Computer Vision, Programming, Perl, Python
Education
UC Berkeley 2005 — 2011
PhD, Electrical Engineering and Computer Sciences
Brigham Young University 2004 — 2005
MS, Electrical Engineering
Brigham Young University 1997 — 2003
BS, Computer Engineering and Russian
Baidu, Inc. June 2014 - Present
NVIDIA May 2011 - June 2014
University of California, Berkeley 2005 - May 2011
NVIDIA May 2009 - August 2009
NVIDIA May 2008 - August 2008
Intel May 2007 - August 2007
Tabula May 2006 - August 2006
Tabula May 2005 - August 2005
Intel May 2003 - August 2003
Intel May 2002 - August 2002
Skills
Computer Architecture, Verilog, Algorithms, CUDA, FPGA, Parallel Computing, Parallel Programming, EDA, High Performance..., VHDL, Embedded Systems, C++, C, OpenMP, Matlab, Processors, Simulations, Compilers, Pattern Recognition, LaTeX, Signal Processing, Machine Learning, Computer Science, Computer Vision, Programming, Perl, Python
Education
UC Berkeley 2005 — 2011
PhD, Electrical Engineering and Computer Sciences
Brigham Young University 2004 — 2005
MS, Electrical Engineering
Brigham Young University 1997 — 2003
BS, Computer Engineering and Russian
Landon Allen Landon Allen's Tabula Experience August 2011 - December 2011
Job Senior Technical Recruiter at Intuit
Industry Computer Software
Experience
Intuit October 2013 - Present
Hightail - formerly YouSendIt August 2013 - October 2013
Nokia September 2012 - December 2012
Cisco Systems May 2012 - September 2012
Binder and Associates March 2009 - July 2012
Tabula August 2011 - December 2011
ArcSight August 2009 - June 2011
Yahoo! April 2007 - August 2009
EMET Services 2005 - 2008
Airespace June 2004 - March 2005
Skills
Technical Recruiting, Applicant Tracking..., Talent Acquisition, Internet Recruiting, Sourcing, Recruiting, Talent Management, Hiring, Entrepreneurship, Cold Calling, College Recruiting, Leadership, Management, Social Networking, Contract Recruitment, Temporary Placement, Benefits Negotiation, Screening, Onboarding, Competitive Analysis, Mobile Devices, Vendor Management, Salesforce.com, Search, Human Resources, Executive Search, Networking, Employer Branding, Screening Resumes, CRM, Interviews, HRIS, Workforce Planning, Staffing Services, Consulting, Start-ups, Personnel Management, Employee Relations, SDLC, IT Recruitment, Training, Information Technology, Resource Management, Performance Management
Education
Foothill College 1988 — 1990
AA, Drama & Music Theatre
Intuit October 2013 - Present
Hightail - formerly YouSendIt August 2013 - October 2013
Nokia September 2012 - December 2012
Cisco Systems May 2012 - September 2012
Binder and Associates March 2009 - July 2012
Tabula August 2011 - December 2011
ArcSight August 2009 - June 2011
Yahoo! April 2007 - August 2009
EMET Services 2005 - 2008
Airespace June 2004 - March 2005
Skills
Technical Recruiting, Applicant Tracking..., Talent Acquisition, Internet Recruiting, Sourcing, Recruiting, Talent Management, Hiring, Entrepreneurship, Cold Calling, College Recruiting, Leadership, Management, Social Networking, Contract Recruitment, Temporary Placement, Benefits Negotiation, Screening, Onboarding, Competitive Analysis, Mobile Devices, Vendor Management, Salesforce.com, Search, Human Resources, Executive Search, Networking, Employer Branding, Screening Resumes, CRM, Interviews, HRIS, Workforce Planning, Staffing Services, Consulting, Start-ups, Personnel Management, Employee Relations, SDLC, IT Recruitment, Training, Information Technology, Resource Management, Performance Management
Education
Foothill College 1988 — 1990
AA, Drama & Music Theatre
Steven Grubb Steven Grubb's Tabula Experience August 2011 - February 2013
Job Senior Consultant at EncoreSemi
Industry Electrical/Electronic Manufacturing
Experience
EncoreSemi April 2015 - Present
Foveonics Imaging Technologies April 2014 - December 2014
Synapse February 2014 - March 2014
NVIDIA March 2013 - September 2013
Tabula August 2011 - February 2013
LSI Corporation August 2010 - July 2011
Global Foundries August 2009 - August 2010
Fujitsu Labs America November 2008 - July 2009
Qualcomm September 2007 - October 2008
Micron Technology October 1996 - July 2007
Skills
Cadence Virtuoso 4.5.1, Cadence Virtuoso, Mixed Signal, DRC, ASIC, Semiconductors, LVS, PLL, Analog, IC, CMOS, Raising our Family, House building and..., Rock Climbing, Coin Collecting, Hercules, SERDES, Low-power Design, SRAM, Cadence, RF, DAC, IC layout, Physical Verification
Education
San Jose State University 1972 — 1973
N/A, Sociology
Foothill College 1968 — 1970
AA, Social- Psychology
Chester F. Awalt of course 1964 — 1967
High School Diploma, General Education
Benjamin Bubb
EncoreSemi April 2015 - Present
Foveonics Imaging Technologies April 2014 - December 2014
Synapse February 2014 - March 2014
NVIDIA March 2013 - September 2013
Tabula August 2011 - February 2013
LSI Corporation August 2010 - July 2011
Global Foundries August 2009 - August 2010
Fujitsu Labs America November 2008 - July 2009
Qualcomm September 2007 - October 2008
Micron Technology October 1996 - July 2007
Skills
Cadence Virtuoso 4.5.1, Cadence Virtuoso, Mixed Signal, DRC, ASIC, Semiconductors, LVS, PLL, Analog, IC, CMOS, Raising our Family, House building and..., Rock Climbing, Coin Collecting, Hercules, SERDES, Low-power Design, SRAM, Cadence, RF, DAC, IC layout, Physical Verification
Education
San Jose State University 1972 — 1973
N/A, Sociology
Foothill College 1968 — 1970
AA, Social- Psychology
Chester F. Awalt of course 1964 — 1967
High School Diploma, General Education
Benjamin Bubb
Kaveh Shakeri Kaveh Shakeri's Tabula Experience April 2013 - Present
Job Sr Staff Design Engineer at Tabula
Industry Semiconductors
Experience
Tabula April 2013 - Present
Cypress Semiconductor July 2011 - March 2013
Cypress Semiconductor March 2008 - August 2011
Cypress Semiconductor January 2005 - March 2008
Georgia Institute of Technology January 2000 - January 2005
Skills
CMOS, Semiconductors, ASIC, Process Integration, IC, VLSI, Mixed Signal, Device Characterization, Analog Circuit Design, SPICE, Cadence Virtuoso, Monte Carlo Simulation, MOSFET, Hardware Design, High-speed Digital..., Circuit Layout, Device Modeling, Simulations, SoC, SRAM, Verilog, FPGA, Digital Circuit Design, EDA, Circuit Design, Embedded Systems, Debugging, Integrated Circuit..., Semiconductor Industry, Electronics, Failure Analysis, Silicon, C, Electrical Engineering, Perl, TCL, RTL Design, R&D
Education
Georgia Institute of Technology 2000 — 2005
Doctor of Philosophy (PhD), Micro Electronics and Computer Engineering
Sharif University of Technology 1995 — 1997
Master of Science (M.S.), Electrical Engineering
Amirkabir University of Technology - Tehran Polytechnic 1990 — 1995
Bachelor's degree, Electrical Engineering
Tabula April 2013 - Present
Cypress Semiconductor July 2011 - March 2013
Cypress Semiconductor March 2008 - August 2011
Cypress Semiconductor January 2005 - March 2008
Georgia Institute of Technology January 2000 - January 2005
Skills
CMOS, Semiconductors, ASIC, Process Integration, IC, VLSI, Mixed Signal, Device Characterization, Analog Circuit Design, SPICE, Cadence Virtuoso, Monte Carlo Simulation, MOSFET, Hardware Design, High-speed Digital..., Circuit Layout, Device Modeling, Simulations, SoC, SRAM, Verilog, FPGA, Digital Circuit Design, EDA, Circuit Design, Embedded Systems, Debugging, Integrated Circuit..., Semiconductor Industry, Electronics, Failure Analysis, Silicon, C, Electrical Engineering, Perl, TCL, RTL Design, R&D
Education
Georgia Institute of Technology 2000 — 2005
Doctor of Philosophy (PhD), Micro Electronics and Computer Engineering
Sharif University of Technology 1995 — 1997
Master of Science (M.S.), Electrical Engineering
Amirkabir University of Technology - Tehran Polytechnic 1990 — 1995
Bachelor's degree, Electrical Engineering
Paul Drake Paul Drake's Tabula Experience November 2009 - Present
Job Corporate Controller at Tabula
Industry Semiconductors
Experience
Tabula November 2009 - Present
SiRF Technology September 2000 - November 2009
ESS Technology February 1999 - September 2000
S3 Inc. February 1998 - February 1999
Adaptec 1995 - 1998
Skills
Semiconductors, IPO, Revenue Recognition, Finance, Mergers, SEC filings, IC, Sarbanes-Oxley Act, Financial Modeling, US GAAP, General Ledger, Financial Reporting, Forecasting
Education
Santa Clara University 1992 — 1995
Economics, Finance, Accounting, Economics
Tabula November 2009 - Present
SiRF Technology September 2000 - November 2009
ESS Technology February 1999 - September 2000
S3 Inc. February 1998 - February 1999
Adaptec 1995 - 1998
Skills
Semiconductors, IPO, Revenue Recognition, Finance, Mergers, SEC filings, IC, Sarbanes-Oxley Act, Financial Modeling, US GAAP, General Ledger, Financial Reporting, Forecasting
Education
Santa Clara University 1992 — 1995
Economics, Finance, Accounting, Economics
David Parlour David Parlour's Tabula Experience August 2008 - March 2015
Job Principal Engineer at GainSpan
Industry Semiconductors
Experience
GainSpan April 2015 - Present
Tabula August 2008 - March 2015
Xilinx Inc 1990 - 2008
Self-employed 1986 - 1990
Silicon Systems Inc 1981 - 1986
Skills
FPGA, Semiconductors, Digital Signal..., Verilog, EDA, Integrated Circuit..., Algorithms, RTL Design, Circuit Design, Analog, IC, Hardware Architecture, SoC, Digital Signal..., Embedded Systems, Computer Architecture, VHDL, Simulink, ASIC, Simulations, Xilinx
Education
Caltech 1980 — 1981
MSEE, Electrical Engineering
Carleton University 1976 — 1980
B.Eng, Electrical Engineering
GainSpan April 2015 - Present
Tabula August 2008 - March 2015
Xilinx Inc 1990 - 2008
Self-employed 1986 - 1990
Silicon Systems Inc 1981 - 1986
Skills
FPGA, Semiconductors, Digital Signal..., Verilog, EDA, Integrated Circuit..., Algorithms, RTL Design, Circuit Design, Analog, IC, Hardware Architecture, SoC, Digital Signal..., Embedded Systems, Computer Architecture, VHDL, Simulink, ASIC, Simulations, Xilinx
Education
Caltech 1980 — 1981
MSEE, Electrical Engineering
Carleton University 1976 — 1980
B.Eng, Electrical Engineering
Bao Liu Bao Liu's Tabula Experience 2008 - 2008
Job Assistant Professor at UT San Antonio
Industry Computer Hardware
Experience
UT San Antonio August 2008 - Present
Tabula 2008 - 2008
UC San Diego 2005 - 2008
BlazeDFM 2005 - 2005
Cadence Design Systems 2004 - 2004
Incential Software, Inc. 2002 - 2004
China IC Design Center 1996 - 1998
Skills
IC, Circuit Design, ASIC, Verilog, Computer Architecture, EDA, Xilinx, FPGA, Static Timing Analysis, VLSI, VHDL, Hardware Design, Simulation, Algorithms, Analog Design, CMOS, ModelSim, Physical Design, CAD, Lithography, Assembly, C++, C, Electronics, RTL design, Design Methodology, Analog Circuit Design, Simulations, SPICE
Education
University of California, San Diego 1998 — 2002
Doctor of Philosophy (Ph.D.), Computer Science
Fudan University 1989 — 1996
Master of Science (M.S.) and B.S., Electrical and Electronics Engineering
UT San Antonio August 2008 - Present
Tabula 2008 - 2008
UC San Diego 2005 - 2008
BlazeDFM 2005 - 2005
Cadence Design Systems 2004 - 2004
Incential Software, Inc. 2002 - 2004
China IC Design Center 1996 - 1998
Skills
IC, Circuit Design, ASIC, Verilog, Computer Architecture, EDA, Xilinx, FPGA, Static Timing Analysis, VLSI, VHDL, Hardware Design, Simulation, Algorithms, Analog Design, CMOS, ModelSim, Physical Design, CAD, Lithography, Assembly, C++, C, Electronics, RTL design, Design Methodology, Analog Circuit Design, Simulations, SPICE
Education
University of California, San Diego 1998 — 2002
Doctor of Philosophy (Ph.D.), Computer Science
Fudan University 1989 — 1996
Master of Science (M.S.) and B.S., Electrical and Electronics Engineering
Anshi Liang Anshi Liang's Tabula Experience May 2008 - October 2011
Job Engineer at Apple
Industry Semiconductors
Experience
Apple July 2014 - Present
LSI October 2011 - May 2014
Tabula May 2008 - October 2011
Sitime November 2006 - May 2008
Intel February 2005 - September 2006
Skills
PLL, SERDES, Verilog-A, Circuit Design, Amplifiers, Sensors, Mixed Signal, Analog, IC, CMOS, Silicon, Analog Circuit Design, Matlab, Semiconductors, ASIC
Education
University of California, Berkeley 2001 — 2004
MS, IC design in Electrical Engineering
Stony Brook University 1998 — 2001
BE with summa cum laude, Computer Engineering
Tsinghua University 1996 — 1997
Engineering Mechanics
Apple July 2014 - Present
LSI October 2011 - May 2014
Tabula May 2008 - October 2011
Sitime November 2006 - May 2008
Intel February 2005 - September 2006
Skills
PLL, SERDES, Verilog-A, Circuit Design, Amplifiers, Sensors, Mixed Signal, Analog, IC, CMOS, Silicon, Analog Circuit Design, Matlab, Semiconductors, ASIC
Education
University of California, Berkeley 2001 — 2004
MS, IC design in Electrical Engineering
Stony Brook University 1998 — 2001
BE with summa cum laude, Computer Engineering
Tsinghua University 1996 — 1997
Engineering Mechanics
Conal Elliott Conal Elliott's Tabula Experience January 2012 - March 2015
Job Consultant
Industry Computer Software
Experience
LambdaPix 2005 - Present
IFIP Working Group 2.8 1999 - Present
Tabula January 2012 - March 2015
Tabula September 2011 - December 2011
Awakening Compassion 2004 - 2011
Tsuru Capital LLC August 2010 - August 2010
#haskell IRC 2005 - 2009
Anygma 2008 - 2008
Microsoft Research August 1994 - September 2002
Sun Microsystems September 1990 - August 1994
Skills
Algorithms, Haskell, Functional Programming, Software Development, Software Engineering, Programming, Programming Languages, Clarity, C++, Computer Science, Java, C, Git, Compilers
Education
Carnegie Mellon University 1983 — 1990
PhD, Computer Science
U.C. Santa Barbara, College of Creative Studies 1978 — 1982
BA, Math
University of California, Santa Barbara
LambdaPix 2005 - Present
IFIP Working Group 2.8 1999 - Present
Tabula January 2012 - March 2015
Tabula September 2011 - December 2011
Awakening Compassion 2004 - 2011
Tsuru Capital LLC August 2010 - August 2010
#haskell IRC 2005 - 2009
Anygma 2008 - 2008
Microsoft Research August 1994 - September 2002
Sun Microsystems September 1990 - August 1994
Skills
Algorithms, Haskell, Functional Programming, Software Development, Software Engineering, Programming, Programming Languages, Clarity, C++, Computer Science, Java, C, Git, Compilers
Education
Carnegie Mellon University 1983 — 1990
PhD, Computer Science
U.C. Santa Barbara, College of Creative Studies 1978 — 1982
BA, Math
University of California, Santa Barbara
Norm Zhou Norm Zhou's Tabula Experience August 2011 - March 2015
Job Senior Software Engineer
Industry Semiconductors
Experience
LinkedIn March 2015 - Present
Tabula August 2011 - March 2015
Ambarella Inc. March 2007 - August 2011
HYSTA (Hua Yuan Science and Technology Association) March 2008 - December 2009
University of California at Berkeley September 2004 - December 2006
UC Berkeley 2001 - 2006
BWRC, Infineon August 2002 - August 2004
University of California at Berkeley January 1999 - May 2003
University of California at Berkeley May 2001 - August 2002
ST Microelectronics May 2000 - August 2000
Skills
Architecture, System Architecture, Algorithms, SoC, FPGA, ASIC, Software Design, Debugging, EDA, Firmware, Programming, Testing, Embedded Software, Functional Verification, Embedded Systems, Verilog, C++, Java, Python, Perl, TCL, C, Semiconductors, Software Engineering, Computer Science, VLSI, Simulations, Computer Architecture, Linux, Digital Signal..., Xilinx, Software Development, Matlab, Image Processing, Optimization, Hardware Architecture
Education
University of California, Berkeley 2001 — 2006
MS, Computer Architecture
University of California, Berkeley 1997 — 2001
BS, Electrical Engineering & Computer Science
Clements Highschool
LinkedIn March 2015 - Present
Tabula August 2011 - March 2015
Ambarella Inc. March 2007 - August 2011
HYSTA (Hua Yuan Science and Technology Association) March 2008 - December 2009
University of California at Berkeley September 2004 - December 2006
UC Berkeley 2001 - 2006
BWRC, Infineon August 2002 - August 2004
University of California at Berkeley January 1999 - May 2003
University of California at Berkeley May 2001 - August 2002
ST Microelectronics May 2000 - August 2000
Skills
Architecture, System Architecture, Algorithms, SoC, FPGA, ASIC, Software Design, Debugging, EDA, Firmware, Programming, Testing, Embedded Software, Functional Verification, Embedded Systems, Verilog, C++, Java, Python, Perl, TCL, C, Semiconductors, Software Engineering, Computer Science, VLSI, Simulations, Computer Architecture, Linux, Digital Signal..., Xilinx, Software Development, Matlab, Image Processing, Optimization, Hardware Architecture
Education
University of California, Berkeley 2001 — 2006
MS, Computer Architecture
University of California, Berkeley 1997 — 2001
BS, Electrical Engineering & Computer Science
Clements Highschool
LK (Lakshmikant) Bhupathi LK (Lakshmikant) Bhupathi's Tabula Experience June 2014 - March 2015
Job Director, Marketing at Aquantia
Industry Computer Hardware
Experience
Aquantia March 2015 - Present
NBASE-T Alliance August 2015 - Present
Tabula June 2014 - March 2015
Marvell January 2007 - June 2014
Marvell November 2002 - January 2007
Marvell June 2001 - October 2002
Fujitsu 1998 - 2001
Dallas Semiconductor 1996 - 1998
Skills
Product Marketing, Ethernet, SoC, ARM, Marketing Strategy, Embedded Processors, Storage and Networking, ASIC, Embedded Systems, Competitive Analysis, Networking, Processors, Go-to-market Strategy, Semiconductor Industry, IC, Semiconductors, Mixed Signal, Consumer Electronics, Product Management, P&L Management, Virtualization
Education
University of California, Berkeley, Haas School of Business 2000 — 2002
MBA, Business Administration
Iowa State University 1994 — 1996
MS, Computer Engineering
Indian Institute of Technology, Madras 1990 — 1994
B.Tech, Electrical Engineering
Aquantia March 2015 - Present
NBASE-T Alliance August 2015 - Present
Tabula June 2014 - March 2015
Marvell January 2007 - June 2014
Marvell November 2002 - January 2007
Marvell June 2001 - October 2002
Fujitsu 1998 - 2001
Dallas Semiconductor 1996 - 1998
Skills
Product Marketing, Ethernet, SoC, ARM, Marketing Strategy, Embedded Processors, Storage and Networking, ASIC, Embedded Systems, Competitive Analysis, Networking, Processors, Go-to-market Strategy, Semiconductor Industry, IC, Semiconductors, Mixed Signal, Consumer Electronics, Product Management, P&L Management, Virtualization
Education
University of California, Berkeley, Haas School of Business 2000 — 2002
MBA, Business Administration
Iowa State University 1994 — 1996
MS, Computer Engineering
Indian Institute of Technology, Madras 1990 — 1994
B.Tech, Electrical Engineering
Lisa Short Lisa Short's Tabula Experience October 2008 - October 2009
Job Technical Consultant at Taos
Industry Computer Software
Experience
Taos October 2014 - Present
A-T Solutions January 2012 - September 2014
Adecco March 2011 - December 2011
Meeting Sciences October 2009 - November 2010
Tabula October 2008 - October 2009
Blue Bear Marketing 2003 - 2008
Xilinx 1995 - 1997
NeoCad 1990 - 1995
Cadnetix 1987 - 1990
Sperry Flight Systems 1985 - 1987
Skills
Software Development, Object Oriented Design, Linux, Software Engineering, .NET, OOP, MySQL, C#, SaaS, C, XML, Mobile Applications, Web Services, Visual Studio, Databases, JavaScript, Microsoft SQL Server, jQuery, Bootstrap, Knockout, ServiceStack
Education
California State Polytechnic University-Pomona 1980 — 1985
BS, Computer Science
Taos October 2014 - Present
A-T Solutions January 2012 - September 2014
Adecco March 2011 - December 2011
Meeting Sciences October 2009 - November 2010
Tabula October 2008 - October 2009
Blue Bear Marketing 2003 - 2008
Xilinx 1995 - 1997
NeoCad 1990 - 1995
Cadnetix 1987 - 1990
Sperry Flight Systems 1985 - 1987
Skills
Software Development, Object Oriented Design, Linux, Software Engineering, .NET, OOP, MySQL, C#, SaaS, C, XML, Mobile Applications, Web Services, Visual Studio, Databases, JavaScript, Microsoft SQL Server, jQuery, Bootstrap, Knockout, ServiceStack
Education
California State Polytechnic University-Pomona 1980 — 1985
BS, Computer Science
Arjuna Ekanayake Arjuna Ekanayake's Tabula Experience 2009 - 2014
Job Principal Hardware Engineer at Oracle
Industry Semiconductors
Experience
Oracle January 2014 - Present
Tabula 2009 - 2014
Cadence Design Systems 2002 - 2009
Clearwater Networks 2000 - 2002
Actel Corporation 1997 - 2000
Skills
SoC, Integrated Circuit..., Perl, EDA, ASIC, FPGA, Verilog, Physical Design, Digital Signal..., TCL, Debugging, Simulations, Algorithms, Semiconductors, IC, VLSI
Education
Stanford University
MSEE, Electrical Engineering
University of Rochester
BSEE, Electrical Engineering
Oracle January 2014 - Present
Tabula 2009 - 2014
Cadence Design Systems 2002 - 2009
Clearwater Networks 2000 - 2002
Actel Corporation 1997 - 2000
Skills
SoC, Integrated Circuit..., Perl, EDA, ASIC, FPGA, Verilog, Physical Design, Digital Signal..., TCL, Debugging, Simulations, Algorithms, Semiconductors, IC, VLSI
Education
Stanford University
MSEE, Electrical Engineering
University of Rochester
BSEE, Electrical Engineering
Bill Deegan Bill Deegan's Tabula Experience March 2012 - July 2012
Job
Industry Computer Software
Experience
Confidential Client June 2014 - Present
Bad Dog Consulting December 2000 - Present
SimplySmart Asset Management, Inc. June 2010 - Present
Mentor Graphics February 2014 - March 2015
Oasys Design Systems November 2008 - December 2013
Tabula March 2012 - July 2012
Tabula June 2009 - January 2011
EFI November 2007 - March 2009
Blaze-DFM November 2005 - August 2008
Overtime Fitness 2008 - 2008
Skills
GNU Make, Perl, Python, Sun Grid Engine, C, C++, Apache, Bugzilla, BuildBot, SCons, NSIS, Shell Scripting, Linux, Perforce, Testing, Software Project..., Java, Oracle Grid, Software Development, Build Automation, Buildbot, Debugging, Unix, Software Engineering, Subversion, Management
Education
Rochester Institute of Technology 1986 — 1990
BS, Computer Engineering
Huntington High School 1982 — 1986
Confidential Client June 2014 - Present
Bad Dog Consulting December 2000 - Present
SimplySmart Asset Management, Inc. June 2010 - Present
Mentor Graphics February 2014 - March 2015
Oasys Design Systems November 2008 - December 2013
Tabula March 2012 - July 2012
Tabula June 2009 - January 2011
EFI November 2007 - March 2009
Blaze-DFM November 2005 - August 2008
Overtime Fitness 2008 - 2008
Skills
GNU Make, Perl, Python, Sun Grid Engine, C, C++, Apache, Bugzilla, BuildBot, SCons, NSIS, Shell Scripting, Linux, Perforce, Testing, Software Project..., Java, Oracle Grid, Software Development, Build Automation, Buildbot, Debugging, Unix, Software Engineering, Subversion, Management
Education
Rochester Institute of Technology 1986 — 1990
BS, Computer Engineering
Huntington High School 1982 — 1986
Marc Miller Marc Miller's Tabula Experience October 2005 - February 2015
Job VP Worldwide Sales & Marketing at Titan IC Systems
Industry Computer & Network Security
Experience
Titan IC Systems March 2015 - Present
Tabula October 2005 - February 2015
Velogix 2003 - 2005
Altera 2000 - 2003
LSI Logic 1994 - 2000
Digital Equipment Corporation 1986 - 1994
Skills
Product Planning, Marketing, Strategic Planning, Business Development, Mixed Signal, ASIC, Semiconductor Industry, Processors, Semiconductors, Start-ups, VLSI, EDA, Wireless, Go-to-market Strategy, IC, SoC, Strategic Partnerships, Embedded Systems, Product Management, FPGA
Education
NJIT 1974 — 1977
BSEE
Bloomfield Hills High School
Titan IC Systems March 2015 - Present
Tabula October 2005 - February 2015
Velogix 2003 - 2005
Altera 2000 - 2003
LSI Logic 1994 - 2000
Digital Equipment Corporation 1986 - 1994
Skills
Product Planning, Marketing, Strategic Planning, Business Development, Mixed Signal, ASIC, Semiconductor Industry, Processors, Semiconductors, Start-ups, VLSI, EDA, Wireless, Go-to-market Strategy, IC, SoC, Strategic Partnerships, Embedded Systems, Product Management, FPGA
Education
NJIT 1974 — 1977
BSEE
Bloomfield Hills High School
Ken Pyacek Ken Pyacek's Tabula Experience May 2007 - October 2007
Job Senior Layout Designer
Industry Electrical/Electronic Manufacturing
Experience
Qualcomm 2011 - Present
startN July 2008 - December 2008
Rambus March 2008 - May 2008
Tabula May 2007 - October 2007
Netlogic January 2007 - April 2007
NextSierra, Corp. May 2005 - September 2005
Intel 2003 - 2004
MIPS Technologies 1998 - 2003
Cadabra 1997 - 1998
Oak Technology May 1996 - September 1997
Skills
SERDES, IC, CMOS, Semiconductors, Mixed Signal, LVS, FPGA, Integrated Circuit..., Hercules, ASIC, Analog, Cadence, Intel, Physical Design, Physical Verification, DRC, PLL, Floorplanning, Processors, VLSI, Cadence Virtuoso
Education
ArtCenter College of Design
Qualcomm 2011 - Present
startN July 2008 - December 2008
Rambus March 2008 - May 2008
Tabula May 2007 - October 2007
Netlogic January 2007 - April 2007
NextSierra, Corp. May 2005 - September 2005
Intel 2003 - 2004
MIPS Technologies 1998 - 2003
Cadabra 1997 - 1998
Oak Technology May 1996 - September 1997
Skills
SERDES, IC, CMOS, Semiconductors, Mixed Signal, LVS, FPGA, Integrated Circuit..., Hercules, ASIC, Analog, Cadence, Intel, Physical Design, Physical Verification, DRC, PLL, Floorplanning, Processors, VLSI, Cadence Virtuoso
Education
ArtCenter College of Design
Allan Carroll Allan Carroll's Tabula Experience April 2005 - September 2005
Job CTO and Founder at Hangtime Inc
Industry Computer Software
Experience
Hangtime Inc. May 2011 - Present
Time Inc. May 2015 - July 2015
Piick May 2010 - May 2011
FamilyLink.com October 2007 - April 2010
Microsoft Research June 2007 - September 2007
Tabula April 2005 - September 2005
Skills
Architecture, Python, C++, Linux, Amazon Web Services..., Start-ups, Node.js, Architectures, Agile Methodologies, Scalability, Distributed Systems, Mobile Applications, Software Engineering, JavaScript, Java, Software Development
Education
University of Washington 2006 — 2008
M.S., Computer Engineering
Brigham Young University 1999 — 2006
B.S., Computer Engineering
Hangtime Inc. May 2011 - Present
Time Inc. May 2015 - July 2015
Piick May 2010 - May 2011
FamilyLink.com October 2007 - April 2010
Microsoft Research June 2007 - September 2007
Tabula April 2005 - September 2005
Skills
Architecture, Python, C++, Linux, Amazon Web Services..., Start-ups, Node.js, Architectures, Agile Methodologies, Scalability, Distributed Systems, Mobile Applications, Software Engineering, JavaScript, Java, Software Development
Education
University of Washington 2006 — 2008
M.S., Computer Engineering
Brigham Young University 1999 — 2006
B.S., Computer Engineering
Bill Latino Bill Latino's Tabula Experience January 2010 - January 2015
Job Executive Sales for Small Technology Co
Industry Semiconductors
Experience
LeddarTech April 2015 - Present
indie Semiconductor January 2011 - Present
Octasic November 2013 - Present
Techlink Sales January 2013 - Present
Tabula January 2010 - January 2015
Octasic 2010 - 2013
Affinity Alliance LLC November 2007 - August 2012
Altera Corporation October 2005 - November 2007
Xilinx Inc. July 2004 - October 2005
Xilinx Inc. October 2002 - July 2004
Skills
FPGA, Start-ups, New Business Development, Semiconductors, Go-to-market Strategy, ASIC, Technology Development, Consumer Electronics, IC, EDA, Wireless, Product Launch, CRM, Team Building, Sales Process, Product Management, Business Development, Semiconductor Industry, Management, Strategy, Account Management, Manufacturing, Sales Management, Networking, Sourcing, Contract Negotiation, Product Marketing, Engineering Management, Electronics, Cross-functional Team..., Embedded Systems, Marketing, Product Lifecycle..., Mobile Devices, Sales, Verilog, Strategic Partnerships, SoC, Leadership, Product Development, Business Alliances, Analog, Channel Partners, RF, International Sales
Education
Wharton School, University of Pennsylvania 2004 — 2004
Negotiations & Mergers
Drexel University 1979 — 1984
BSEE, Electrical Engineering
Archmere
LeddarTech April 2015 - Present
indie Semiconductor January 2011 - Present
Octasic November 2013 - Present
Techlink Sales January 2013 - Present
Tabula January 2010 - January 2015
Octasic 2010 - 2013
Affinity Alliance LLC November 2007 - August 2012
Altera Corporation October 2005 - November 2007
Xilinx Inc. July 2004 - October 2005
Xilinx Inc. October 2002 - July 2004
Skills
FPGA, Start-ups, New Business Development, Semiconductors, Go-to-market Strategy, ASIC, Technology Development, Consumer Electronics, IC, EDA, Wireless, Product Launch, CRM, Team Building, Sales Process, Product Management, Business Development, Semiconductor Industry, Management, Strategy, Account Management, Manufacturing, Sales Management, Networking, Sourcing, Contract Negotiation, Product Marketing, Engineering Management, Electronics, Cross-functional Team..., Embedded Systems, Marketing, Product Lifecycle..., Mobile Devices, Sales, Verilog, Strategic Partnerships, SoC, Leadership, Product Development, Business Alliances, Analog, Channel Partners, RF, International Sales
Education
Wharton School, University of Pennsylvania 2004 — 2004
Negotiations & Mergers
Drexel University 1979 — 1984
BSEE, Electrical Engineering
Archmere
Paola Maciocia Paola Maciocia's Tabula Experience August 2008 - February 2015
Job Sr Layour Designer at Altera
Industry Semiconductors
Experience
Altera March 2015 - Present
Tabula August 2008 - February 2015
SanDisk January 2008 - August 2008
ZeroG Wireless (Acquired by Microchip Technology) 2006 - 2007
Intel May 1996 - October 2006
Intel 1996 - 2006
Skills
Hercules, LVS, Floorplanning, Physical Verification, Cadence Virtuoso, IC, Virtuoso Layout Editor, Layout, DFM, FPGA, Microprocessors
Education
Mesa Community College 1994 — 1996
Associate of Science (A.S.), Mask designer
IPSOA Business School, Milan Italy 1990 — 1991
Master in Business Communication
University Federico II, Naples Italy 1985 — 1989
BA, Linguistic
Altera March 2015 - Present
Tabula August 2008 - February 2015
SanDisk January 2008 - August 2008
ZeroG Wireless (Acquired by Microchip Technology) 2006 - 2007
Intel May 1996 - October 2006
Intel 1996 - 2006
Skills
Hercules, LVS, Floorplanning, Physical Verification, Cadence Virtuoso, IC, Virtuoso Layout Editor, Layout, DFM, FPGA, Microprocessors
Education
Mesa Community College 1994 — 1996
Associate of Science (A.S.), Mask designer
IPSOA Business School, Milan Italy 1990 — 1991
Master in Business Communication
University Federico II, Naples Italy 1985 — 1989
BA, Linguistic
Roger A Merino Roger A Merino's Tabula Experience July 2011 - October 2013
Job Sales Manager Communications and Data Center at Xilinx
Industry Semiconductors
Experience
Xilinx April 2015 - Present
Xilinx October 2013 - March 2015
Tabula July 2011 - October 2013
Xilinx March 2004 - November 2010
Xilinx January 2001 - March 2004
Xilinx June 1999 - January 2001
Cisco Systems May 1997 - May 1999
Logic Innovations March 1995 - May 1997
TRW: Avionics & Systems Division May 1993 - March 1995
Skills
FPGA, Xilinx
Education
University of California, Los Angeles
BSEE, Engineering
West Coast University
MSEE, Engineering
Xilinx April 2015 - Present
Xilinx October 2013 - March 2015
Tabula July 2011 - October 2013
Xilinx March 2004 - November 2010
Xilinx January 2001 - March 2004
Xilinx June 1999 - January 2001
Cisco Systems May 1997 - May 1999
Logic Innovations March 1995 - May 1997
TRW: Avionics & Systems Division May 1993 - March 1995
Skills
FPGA, Xilinx
Education
University of California, Los Angeles
BSEE, Engineering
West Coast University
MSEE, Engineering
Isaac Fehrenbach Isaac Fehrenbach's Tabula Experience July 2005 - October 2007
Job CoFounder & President @Compile
Industry Information Technology and Services
Experience
Compile 2012 - Present
Greylock November 2007 - August 2011
Tabula July 2005 - October 2007
Greylock September 2003 - September 2005
Altera 1999 - 2002
Cypress 1997 - 1999
Skills
Start-ups, Product Marketing, Entrepreneurship, Strategic Partnerships, Go-to-market Strategy, Product Management, Venture Capital, SaaS, Strategy, Business Strategy, Business Development, Marketing, Leadership, Lead Generation, Demand Generation, Sales, New Business Development, Corporate Development, Sales Development, Mobile Devices, Research, Financial Modeling
Education
Stanford University Graduate School of Business 2001 — 2003
MBA, Business
University of Michigan 1993 — 1997
BSEE, Electrical Engineering
Compile 2012 - Present
Greylock November 2007 - August 2011
Tabula July 2005 - October 2007
Greylock September 2003 - September 2005
Altera 1999 - 2002
Cypress 1997 - 1999
Skills
Start-ups, Product Marketing, Entrepreneurship, Strategic Partnerships, Go-to-market Strategy, Product Management, Venture Capital, SaaS, Strategy, Business Strategy, Business Development, Marketing, Leadership, Lead Generation, Demand Generation, Sales, New Business Development, Corporate Development, Sales Development, Mobile Devices, Research, Financial Modeling
Education
Stanford University Graduate School of Business 2001 — 2003
MBA, Business
University of Michigan 1993 — 1997
BSEE, Electrical Engineering
Jennifer Mayer-Portillo's Tabula Experience June 2008 - March 2015
Job Executive Assistant
Industry Executive Office
Experience
Tabula June 2008 - March 2015
SiRF Technology December 2006 - May 2008
Matrix Semiconductor September 2003 - February 2006
Xilinx 1996 - 2000
Skills
Travel Arrangements, Calendars, Start-ups, Microsoft Excel, Microsoft Office, Event Planning, Project Management, Office Management, Semiconductors, Administrative..., Office Administration, Time Management, Event Management, Management, Outlook, Social Media
Education
San Jose State University
BA, Art (Education Emphasis) - Cum Laude
Tabula June 2008 - March 2015
SiRF Technology December 2006 - May 2008
Matrix Semiconductor September 2003 - February 2006
Xilinx 1996 - 2000
Skills
Travel Arrangements, Calendars, Start-ups, Microsoft Excel, Microsoft Office, Event Planning, Project Management, Office Management, Semiconductors, Administrative..., Office Administration, Time Management, Event Management, Management, Outlook, Social Media
Education
San Jose State University
BA, Art (Education Emphasis) - Cum Laude
Ivan Hom Ivan Hom's Tabula Experience 2009 - 2013
Job Data Scientist/Software Engineer at Stealth Mode Startup Company
Industry Computer Software
Experience
Stealth Mode Startup Company 2014 - Present
Altera 2013 - 2014
Tabula 2009 - 2013
Transmeta 2005 - 2009
Synopsys 2003 - 2005
Fujitsu 2002 - 2003
Skills
C/C++, Python, Perl, Java, Scala, R, Apache Spark, Linux, hadoop, ASIC, Verilog, EDA, VLSI, Agile Methodologies, Scrum, A/B Testing, MPI, SQL, Git, Github, Scientific Computing
Education
University of Southern California
Ph.D., Electrical Engineering
Stealth Mode Startup Company 2014 - Present
Altera 2013 - 2014
Tabula 2009 - 2013
Transmeta 2005 - 2009
Synopsys 2003 - 2005
Fujitsu 2002 - 2003
Skills
C/C++, Python, Perl, Java, Scala, R, Apache Spark, Linux, hadoop, ASIC, Verilog, EDA, VLSI, Agile Methodologies, Scrum, A/B Testing, MPI, SQL, Git, Github, Scientific Computing
Education
University of Southern California
Ph.D., Electrical Engineering
Renuka Adnani, PHR SHRM-CP Renuka Adnani, PHR SHRM-CP's Tabula Experience August 2011 - June 2012
Job Manager Human Resources at Tavant Technologies
Industry Human Resources
Experience
Tavant Technologies July 2014 - Present
Tavant Technologies August 2012 - June 2014
Melita August 2011 - June 2012
Tabula August 2011 - June 2012
KLA-Tencor November 2010 - July 2011
Superior Group November 2010 - July 2011
Clean Tech Institute July 2010 - November 2010
Shellsoft Inc July 2006 - September 2008
Indoco Remedies Ltd 2001 - 2003
Skills
Recruiting, Employee Benefits, Payroll, Immigration Law, Talent Acquisition, Employee Relations, Applicant Tracking..., HRIS, Onboarding, Human Resources, Benefits Administration, Internet Recruiting, Interviews, Sourcing, Temporary Placement, Training, Screening, New Hire Orientations, Deferred Compensation, Management, Performance Management, Employee Engagement, Employer Branding, Executive Search, College Recruiting, Employment Law, Job Descriptions, Hiring, Workforce Planning, Contract Recruitment, Benefits Negotiation, Resume Writing, Talent Management, Performance Appraisal, Personnel Management, HR Policies, Coaching, HR Consulting, Leadership, Compensation, Time Management, Organizational..., Full-life Cycle..., Succession Planning
Education
University of California, Santa Cruz 2008 — 2010
Certificate Program in Human Resource Management, Human Resources
University of Mumbai 1997 — 2000
BCOM, Management Studies
J C M M School 1984 — 1994
Bachelor of Commerce (B.Com.), Human Resources Management/Personnel Administration, General
Tavant Technologies July 2014 - Present
Tavant Technologies August 2012 - June 2014
Melita August 2011 - June 2012
Tabula August 2011 - June 2012
KLA-Tencor November 2010 - July 2011
Superior Group November 2010 - July 2011
Clean Tech Institute July 2010 - November 2010
Shellsoft Inc July 2006 - September 2008
Indoco Remedies Ltd 2001 - 2003
Skills
Recruiting, Employee Benefits, Payroll, Immigration Law, Talent Acquisition, Employee Relations, Applicant Tracking..., HRIS, Onboarding, Human Resources, Benefits Administration, Internet Recruiting, Interviews, Sourcing, Temporary Placement, Training, Screening, New Hire Orientations, Deferred Compensation, Management, Performance Management, Employee Engagement, Employer Branding, Executive Search, College Recruiting, Employment Law, Job Descriptions, Hiring, Workforce Planning, Contract Recruitment, Benefits Negotiation, Resume Writing, Talent Management, Performance Appraisal, Personnel Management, HR Policies, Coaching, HR Consulting, Leadership, Compensation, Time Management, Organizational..., Full-life Cycle..., Succession Planning
Education
University of California, Santa Cruz 2008 — 2010
Certificate Program in Human Resource Management, Human Resources
University of Mumbai 1997 — 2000
BCOM, Management Studies
J C M M School 1984 — 1994
Bachelor of Commerce (B.Com.), Human Resources Management/Personnel Administration, General
Erin Provencio Erin Provencio's Tabula Experience July 2006 - March 2015
Job Executive Assistant at Ayla Networks
Industry Semiconductors
Experience
Ayla Networks April 2015 - Present
Tabula July 2006 - March 2015
Stretch Inc. March 2003 - July 2006
CC Myers, Inc. August 2001 - March 2003
Nielsen Netratings 1998 - 2001
Cornerstone Imaging 1994 - 1998
Skills
Start-ups, Contract Negotiation, Contract Management, Project Management, Travel Arrangements, Calendars, Computer Proficiency, Microsoft Office, Microsoft Excel, PowerPoint, Salesforce.com, Confluence, Business Development, Leadership, Compilers, Semiconductors
Education
San Jose City College 1998 — 2000
Associate of Arts (AA), Communication and Media Studies
Ayla Networks April 2015 - Present
Tabula July 2006 - March 2015
Stretch Inc. March 2003 - July 2006
CC Myers, Inc. August 2001 - March 2003
Nielsen Netratings 1998 - 2001
Cornerstone Imaging 1994 - 1998
Skills
Start-ups, Contract Negotiation, Contract Management, Project Management, Travel Arrangements, Calendars, Computer Proficiency, Microsoft Office, Microsoft Excel, PowerPoint, Salesforce.com, Confluence, Business Development, Leadership, Compilers, Semiconductors
Education
San Jose City College 1998 — 2000
Associate of Arts (AA), Communication and Media Studies
Davy Huang's Tabula Experience January 2012 - Present
Job Experienced Systems Architect/Engineering Manager
Industry Semiconductors
Experience
Baidu USA March 2015 - Present
Tabula January 2012 - Present
Tabula November 2007 - January 2012
ShoreTel, Inc. June 2006 - November 2007
Xilinx, Inc. January 2001 - May 2006
Skills
TCL, Perl, ARM, SATA, Silicon Validation, Fibre Channel, SERDES, PCIe, SoC, ASIC, EDA, SystemVerilog, 100G Ethernet, Verification, PowerPC, Scrum, DFT, FPGA, FPGA prototyping, ASSP, Semiconductors, Logic Design, Verilog, Logic Synthesis, PCB design, Firmware, PCB Design
Education
University of Hawaii at Manoa 1999 — 2000
MS, Electrical Engineering
Tsinghua University 1992 — 1997
BS, Electrical Engineering
Baidu USA March 2015 - Present
Tabula January 2012 - Present
Tabula November 2007 - January 2012
ShoreTel, Inc. June 2006 - November 2007
Xilinx, Inc. January 2001 - May 2006
Skills
TCL, Perl, ARM, SATA, Silicon Validation, Fibre Channel, SERDES, PCIe, SoC, ASIC, EDA, SystemVerilog, 100G Ethernet, Verification, PowerPC, Scrum, DFT, FPGA, FPGA prototyping, ASSP, Semiconductors, Logic Design, Verilog, Logic Synthesis, PCB design, Firmware, PCB Design
Education
University of Hawaii at Manoa 1999 — 2000
MS, Electrical Engineering
Tsinghua University 1992 — 1997
BS, Electrical Engineering
Jeffrey Su's Tabula Experience October 2011 - Present
Job Software Engineer for Test at Ayla Networks
Industry Semiconductors
Experience
Ayla Networks April 2015 - Present
Knottd April 2014 - Present
Tabula October 2011 - Present
Xilinx January 2007 - October 2011
Skills
Python, Perl, C++, C#, SQL, SQLAlchemy, Backbone.js, FPGA, Testing, CSS, Debugging, AJAX, MySQL, PHP, Semiconductors
Education
University of California, San Diego 2002 — 2006
BS, Electrical Engineering
monta vista high school
Ayla Networks April 2015 - Present
Knottd April 2014 - Present
Tabula October 2011 - Present
Xilinx January 2007 - October 2011
Skills
Python, Perl, C++, C#, SQL, SQLAlchemy, Backbone.js, FPGA, Testing, CSS, Debugging, AJAX, MySQL, PHP, Semiconductors
Education
University of California, San Diego 2002 — 2006
BS, Electrical Engineering
monta vista high school
Tayo Fadelu's Tabula Experience November 2014 - March 2015
Job ASIC Design Engineer at Apple
Industry Computer Hardware
Experience
Apple April 2015 - Present
Tabula November 2014 - March 2015
Oracle June 2012 - October 2014
Qualcomm May 2011 - August 2011
Qualcomm July 2009 - May 2010
Qualcomm June 2008 - August 2008
Skills
Computer Architecture, ModelSim, Cadence Virtuoso, Verilog, RTL design, VHDL, ASIC, Embedded Systems, Matlab, C, Assembly, Perl, C++, Linux, VLSI, Xilinx, Static Timing Analysis, FPGA, Hardware Architecture
Education
University of Southern California 2010 — 2012
Master of Science (MSc), Electrical and Electronics Engineering, 4.0
Baylor University 2005 — 2009
Bachelor of Science (B.Sc.), Electrical and Computer Engineering, 3.82
Apple April 2015 - Present
Tabula November 2014 - March 2015
Oracle June 2012 - October 2014
Qualcomm May 2011 - August 2011
Qualcomm July 2009 - May 2010
Qualcomm June 2008 - August 2008
Skills
Computer Architecture, ModelSim, Cadence Virtuoso, Verilog, RTL design, VHDL, ASIC, Embedded Systems, Matlab, C, Assembly, Perl, C++, Linux, VLSI, Xilinx, Static Timing Analysis, FPGA, Hardware Architecture
Education
University of Southern California 2010 — 2012
Master of Science (MSc), Electrical and Electronics Engineering, 4.0
Baylor University 2005 — 2009
Bachelor of Science (B.Sc.), Electrical and Computer Engineering, 3.82
Rob Pelt's Tabula Experience October 2005 - October 2006
Job Principal Product Manager at Altera
Industry Semiconductors
Experience
Altera January 2015 - Present
Altera March 2010 - Present
Xilinx October 2006 - March 2010
Tabula October 2005 - October 2006
Altera October 2002 - October 2005
Chameleon Systems February 2000 - October 2002
Various September 1997 - February 2000
Digital Lightwave June 1996 - September 1997
Motorola (Cellular Subscriber Group) June 1993 - June 1996
Skills
FPGA, Embedded Systems, Digital Signal..., SoC, Altera, Embedded Software, ARM, System Architecture, Timing Closure, Hardware, System Design, Software Development, Digital Signal..., Software Design, ASIC
Education
Illinois Institute of Technology 1993 — 1996
MSEE, Communications, Digital Signal Processing
Illinois Institute of Technology 1989 — 1993
BSEE, Analog/Digital Design
Staunton High School 1985 — 1989
High School
Altera January 2015 - Present
Altera March 2010 - Present
Xilinx October 2006 - March 2010
Tabula October 2005 - October 2006
Altera October 2002 - October 2005
Chameleon Systems February 2000 - October 2002
Various September 1997 - February 2000
Digital Lightwave June 1996 - September 1997
Motorola (Cellular Subscriber Group) June 1993 - June 1996
Skills
FPGA, Embedded Systems, Digital Signal..., SoC, Altera, Embedded Software, ARM, System Architecture, Timing Closure, Hardware, System Design, Software Development, Digital Signal..., Software Design, ASIC
Education
Illinois Institute of Technology 1993 — 1996
MSEE, Communications, Digital Signal Processing
Illinois Institute of Technology 1989 — 1993
BSEE, Analog/Digital Design
Staunton High School 1985 — 1989
High School
Krishna Garlapati's Tabula Experience June 2007 - July 2009
Job Principal Engineer
Industry Computer Software
Experience
Xilinx 2009 - Present
Tabula June 2007 - July 2009
NVIDIA 2007 - 2008
Synplicity May 1999 - March 2007
Quickturn Design Systems February 1998 - May 1999
Skills
C++, Algorithms, Compilers, FPGA prototyping, RTL design, LLVM, VLSI CAD, EDA, Verilog, VHDL, SystemVerilog, Xilinx, ModelSim, Technical Leadership, OpenCL, TCL, FPGA, RTL Design
Education
San Jose State University 2002 — 2004
Master’s Degree, Computer Engineering
Bangalore University 1991 — 1995
Bachelor of Science (BS), Computer Science
Xilinx 2009 - Present
Tabula June 2007 - July 2009
NVIDIA 2007 - 2008
Synplicity May 1999 - March 2007
Quickturn Design Systems February 1998 - May 1999
Skills
C++, Algorithms, Compilers, FPGA prototyping, RTL design, LLVM, VLSI CAD, EDA, Verilog, VHDL, SystemVerilog, Xilinx, ModelSim, Technical Leadership, OpenCL, TCL, FPGA, RTL Design
Education
San Jose State University 2002 — 2004
Master’s Degree, Computer Engineering
Bangalore University 1991 — 1995
Bachelor of Science (BS), Computer Science
Jyotirmoy Ghosh's Tabula Experience 2007 - 2009
Job ASIC Kit Engineer at Intel Corporation
Industry Semiconductors
Experience
Intel Corporation November 2014 - Present
LSI, an Avago Technologies Company 2012 - 2014
Broadcom 2010 - 2011
Tabula 2007 - 2009
NextWave Broadband 2006 - 2007
ATI Technologies 1999 - 2006
Interra Inc. 1997 - 1999
LSI Logic 1996 - 1997
IBM 1995 - 1996
Skills
Static Timing Analysis, Physical Design, SoC, Verilog, VLSI, Semiconductors, EDA, Clock Tree Synthesis, IC, Parasitic Extraction, Floor Plans, Power Analysis, Low-power Design, Physical Verification, Primetime, Place & Route
Education
University of Cambridge 1993 — 1994
M.Phil., Microelectronic Engineering
University of Calcutta 1989 — 1993
B.Tech, Electronics Engineering
Intel Corporation November 2014 - Present
LSI, an Avago Technologies Company 2012 - 2014
Broadcom 2010 - 2011
Tabula 2007 - 2009
NextWave Broadband 2006 - 2007
ATI Technologies 1999 - 2006
Interra Inc. 1997 - 1999
LSI Logic 1996 - 1997
IBM 1995 - 1996
Skills
Static Timing Analysis, Physical Design, SoC, Verilog, VLSI, Semiconductors, EDA, Clock Tree Synthesis, IC, Parasitic Extraction, Floor Plans, Power Analysis, Low-power Design, Physical Verification, Primetime, Place & Route
Education
University of Cambridge 1993 — 1994
M.Phil., Microelectronic Engineering
University of Calcutta 1989 — 1993
B.Tech, Electronics Engineering
Abel Chow's Tabula Experience August 2009 - November 2011
Job
Industry Information Technology and Services
Experience
Tabula August 2009 - November 2011
Cswitch April 2009 - August 2009
Magma Design Automation April 2005 - August 2008
Magma Design Automation April 2003 - April 2005
Magma Design Automation April 2002 - April 2004
Magma Design Automation February 1999 - April 2002
G2 Networks 1997 - 1999
TRW 1993 - 1997
Education
University of California, Berkeley 1989 — 1993
BS
Tabula August 2009 - November 2011
Cswitch April 2009 - August 2009
Magma Design Automation April 2005 - August 2008
Magma Design Automation April 2003 - April 2005
Magma Design Automation April 2002 - April 2004
Magma Design Automation February 1999 - April 2002
G2 Networks 1997 - 1999
TRW 1993 - 1997
Education
University of California, Berkeley 1989 — 1993
BS
Nathan Kitchen's Tabula Experience June 2005 - August 2005
Job Software Engineer at Arista Networks
Industry Semiconductors
Experience
Arista Networks, Inc. July 2010 - Present
Cadence Design Systems June 2008 - December 2008
Cadence Design Systems July 2007 - November 2007
Cadence Design Systems June 2006 - December 2006
Tabula June 2005 - August 2005
IBM June 2004 - August 2004
Skills
Algorithms, C, C++, Data Structures, Perl, Python
Education
University of California, Berkeley 2002 — 2010
PhD, Electrical Engineering and Computer Sciences
Brigham Young University 1996 — 2002
BS, Computer Engineering
Arista Networks, Inc. July 2010 - Present
Cadence Design Systems June 2008 - December 2008
Cadence Design Systems July 2007 - November 2007
Cadence Design Systems June 2006 - December 2006
Tabula June 2005 - August 2005
IBM June 2004 - August 2004
Skills
Algorithms, C, C++, Data Structures, Perl, Python
Education
University of California, Berkeley 2002 — 2010
PhD, Electrical Engineering and Computer Sciences
Brigham Young University 1996 — 2002
BS, Computer Engineering
Scott Weber's Tabula Experience September 2010 - July 2014
Job SMTS at Altera
Industry Semiconductors
Experience
Altera July 2014 - Present
Tabula September 2010 - July 2014
Tabula December 2006 - September 2010
Tabula January 2006 - December 2006
UC Berkeley August 1999 - December 2005
Infineon Technologies March 2004 - June 2004
Tensilica May 1999 - August 1999
Skills
Logic Synthesis, Optimization, Research, EDA, Programmable Logic, FPGA, Clocking, RTL design, Verilog, Software Development, C++, Java, Embedded Systems, ASIC, Processors, Algorithms, SoC, Perl, Computer Architecture, Semiconductors, VLSI, TCL, Simulations
Education
University of California, Berkeley 1998 — 2005
PhD, Electrical Engineering
Carnegie Mellon University 1994 — 1998
BS, Electrical and Computer Engineering
Carnegie Mellon University 1994 — 1998
BS, Computer Science
Altera July 2014 - Present
Tabula September 2010 - July 2014
Tabula December 2006 - September 2010
Tabula January 2006 - December 2006
UC Berkeley August 1999 - December 2005
Infineon Technologies March 2004 - June 2004
Tensilica May 1999 - August 1999
Skills
Logic Synthesis, Optimization, Research, EDA, Programmable Logic, FPGA, Clocking, RTL design, Verilog, Software Development, C++, Java, Embedded Systems, ASIC, Processors, Algorithms, SoC, Perl, Computer Architecture, Semiconductors, VLSI, TCL, Simulations
Education
University of California, Berkeley 1998 — 2005
PhD, Electrical Engineering
Carnegie Mellon University 1994 — 1998
BS, Electrical and Computer Engineering
Carnegie Mellon University 1994 — 1998
BS, Computer Science
Yean-Yow Hwang's Tabula Experience January 2010 - July 2013
Job Architect
Industry Semiconductors
Experience
Cadence Design Systems August 2013 - Present
Tabula January 2010 - July 2013
eASIC Inc. February 2007 - March 2010
Velogix Inc. August 2004 - January 2007
Leopard Logic Inc. August 2003 - August 2004
Altera Corp. July 2001 - July 2004
Skills
EDA, FPGA, Algorithms, VHDL, ASIC, C++, Debugging, Software Engineering, Logic Synthesis, Digital Signal..., TCL, Verilog, VLSI, SoC
Education
University of California, Los Angeles 1991 — 1998
Ph.D, CS / VLSI CAD
University of California, Riverside 1985 — 1987
MS, Computer Science
National Taiwan University 1976 — 1980
BS, Electrical Engineering
Cadence Design Systems August 2013 - Present
Tabula January 2010 - July 2013
eASIC Inc. February 2007 - March 2010
Velogix Inc. August 2004 - January 2007
Leopard Logic Inc. August 2003 - August 2004
Altera Corp. July 2001 - July 2004
Skills
EDA, FPGA, Algorithms, VHDL, ASIC, C++, Debugging, Software Engineering, Logic Synthesis, Digital Signal..., TCL, Verilog, VLSI, SoC
Education
University of California, Los Angeles 1991 — 1998
Ph.D, CS / VLSI CAD
University of California, Riverside 1985 — 1987
MS, Computer Science
National Taiwan University 1976 — 1980
BS, Electrical Engineering
Rajeev Jayaraman's Tabula Experience October 2012 - March 2015
Job VP, Applications, Technical Support, and Services at Tabula
Industry Semiconductors
Experience
Entefy July 2015 - Present
Tabula October 2012 - March 2015
Tabula September 2008 - September 2012
Xilinx November 2002 - September 2008
Xilinx August 2000 - November 2002
Xilinx November 1991 - August 2000
Skills
FPGA, Xilinx, Algorithms, C++, EDA, Technical Leadership, Semiconductors, ASIC, SoC, Microprocessors, Embedded Systems, IC, RTL design, Hardware Architecture, Verilog, Digital Signal..., Logic Synthesis, System Architecture, High Performance..., Software Development, Software Project...
Education
Carnegie Mellon University 1987 — 1991
Doctor of Philosophy (Ph.D.), Electrical and Computer Engg
Carnegie Mellon University 1985 — 1987
Master of Science (MS), Electrical and Computer Engg
Indian Institute of Technology, Madras 1980 — 1985
B.Tech, Electrical Engg.
Kendriya Vidyalaya 1976 — 1980
Entefy July 2015 - Present
Tabula October 2012 - March 2015
Tabula September 2008 - September 2012
Xilinx November 2002 - September 2008
Xilinx August 2000 - November 2002
Xilinx November 1991 - August 2000
Skills
FPGA, Xilinx, Algorithms, C++, EDA, Technical Leadership, Semiconductors, ASIC, SoC, Microprocessors, Embedded Systems, IC, RTL design, Hardware Architecture, Verilog, Digital Signal..., Logic Synthesis, System Architecture, High Performance..., Software Development, Software Project...
Education
Carnegie Mellon University 1987 — 1991
Doctor of Philosophy (Ph.D.), Electrical and Computer Engg
Carnegie Mellon University 1985 — 1987
Master of Science (MS), Electrical and Computer Engg
Indian Institute of Technology, Madras 1980 — 1985
B.Tech, Electrical Engg.
Kendriya Vidyalaya 1976 — 1980
Daniel Gitlin's Tabula Experience April 2007 - March 2015
Job Expert Consultant and Representative in Silicon Valley at CEALeti
Industry Semiconductors
Experience
CEA-Leti June 2015 - Present
Tabula April 2007 - March 2015
Xilinx January 1992 - April 2007
LSI Logic July 1988 - December 1991
Skills
Semiconductors, Engineering, Manufacturing, Silicon, Start-ups, Electrical Engineering, Strategic Planning, Electronics, IC, Technology Development, SoC, Reliability, Semiconductor Industry, Engineering Management, R&D, Digital Signal..., FPGA, Product Development, Simulations, Cross-functional Team..., Mixed Signal, Analog, Product Marketing, Failure Analysis, Product Management, EDA, CMOS, Product Engineering, System Architecture, Consumer Electronics, Test Engineering, Go-to-market Strategy, Hardware Architecture, Circuit Design, PCB design
Education
University of California, Los Angeles 1984 — 1987
Degree of Engineer, Electrical Engineering
Harvard University 1982 — 1984
MS, Applied Physics
CEA-Leti June 2015 - Present
Tabula April 2007 - March 2015
Xilinx January 1992 - April 2007
LSI Logic July 1988 - December 1991
Skills
Semiconductors, Engineering, Manufacturing, Silicon, Start-ups, Electrical Engineering, Strategic Planning, Electronics, IC, Technology Development, SoC, Reliability, Semiconductor Industry, Engineering Management, R&D, Digital Signal..., FPGA, Product Development, Simulations, Cross-functional Team..., Mixed Signal, Analog, Product Marketing, Failure Analysis, Product Management, EDA, CMOS, Product Engineering, System Architecture, Consumer Electronics, Test Engineering, Go-to-market Strategy, Hardware Architecture, Circuit Design, PCB design
Education
University of California, Los Angeles 1984 — 1987
Degree of Engineer, Electrical Engineering
Harvard University 1982 — 1984
MS, Applied Physics
Nick Jepsen's Tabula Experience May 2005 - August 2005
Job Associate Attorney at Fish & Richardson, P.C.
Industry Law Practice
Experience
Fish & Richardson P.C. June 2010 - Present
Utah Legal Services - Provo October 2009 - May 2010
U.S. District Court for the District of Utah January 2009 - April 2009
Hickman Palermo Truong & Becker July 2008 - August 2008
Fish & Richardson P.C. May 2008 - June 2008
Workman Nydegger July 2007 - August 2007
U.S. Court of Appeals for the Federal Circuit May 2007 - June 2007
Rader, Fishman & Grauer January 2006 - May 2007
Tabula May 2005 - August 2005
Hitachi GST June 2004 - August 2004
Skills
Intellectual Property, Patent preparation, Patent Prosecution, Patents, Trademarks, Copyright Law, Patent Litigation, Patentability, Trade Secrets, Registered Patent..., Licensing, Trademark Infringement, Legal Writing, Legal Research, Patent Applications
Education
Brigham Young University—J. Reuben Clark Law School 2006 — 2009
J.D.
Brigham Young University 2000 — 2006
B.S., Electrical Engineering
Fish & Richardson P.C. June 2010 - Present
Utah Legal Services - Provo October 2009 - May 2010
U.S. District Court for the District of Utah January 2009 - April 2009
Hickman Palermo Truong & Becker July 2008 - August 2008
Fish & Richardson P.C. May 2008 - June 2008
Workman Nydegger July 2007 - August 2007
U.S. Court of Appeals for the Federal Circuit May 2007 - June 2007
Rader, Fishman & Grauer January 2006 - May 2007
Tabula May 2005 - August 2005
Hitachi GST June 2004 - August 2004
Skills
Intellectual Property, Patent preparation, Patent Prosecution, Patents, Trademarks, Copyright Law, Patent Litigation, Patentability, Trade Secrets, Registered Patent..., Licensing, Trademark Infringement, Legal Writing, Legal Research, Patent Applications
Education
Brigham Young University—J. Reuben Clark Law School 2006 — 2009
J.D.
Brigham Young University 2000 — 2006
B.S., Electrical Engineering
Chris Lavin's Tabula Experience September 2011 - March 2015
Job Staff Research Software Engineer at Xilinx
Industry Computer Software
Experience
Xilinx March 2015 - Present
Tabula September 2011 - March 2015
Configurable Computing Laboratory, Brigham Young University January 2008 - September 2011
Telemetry Laboratory, Brigham Young University January 2006 - December 2008
Skills
Java, Hardware, VHDL, Xilinx ISE, CUDA, Perl, FPGA, Algorithms, System Generator, Embedded Software, Xilinx, Linux, C, C++, Python, Computer Architecture, Debugging, Programming, Semiconductors, Software Design, Computer Vision, Simulations, Simulink, High Performance..., Hardware Architecture, EDA, Matlab, Computer Science, ModelSim, Eclipse, LaTeX, x86 Assembly, Assembly Language, ASIC, RTL design, Software Engineering, Embedded Systems, Perforce, Haskell
Education
Brigham Young University 2007 — 2011
PhD, Electrical Engineering
Brigham Young University 2003 — 2006
BS, Computer Engineering
Xilinx March 2015 - Present
Tabula September 2011 - March 2015
Configurable Computing Laboratory, Brigham Young University January 2008 - September 2011
Telemetry Laboratory, Brigham Young University January 2006 - December 2008
Skills
Java, Hardware, VHDL, Xilinx ISE, CUDA, Perl, FPGA, Algorithms, System Generator, Embedded Software, Xilinx, Linux, C, C++, Python, Computer Architecture, Debugging, Programming, Semiconductors, Software Design, Computer Vision, Simulations, Simulink, High Performance..., Hardware Architecture, EDA, Matlab, Computer Science, ModelSim, Eclipse, LaTeX, x86 Assembly, Assembly Language, ASIC, RTL design, Software Engineering, Embedded Systems, Perforce, Haskell
Education
Brigham Young University 2007 — 2011
PhD, Electrical Engineering
Brigham Young University 2003 — 2006
BS, Computer Engineering
April Lambert's Tabula Experience June 2010 - January 2011
Job Applied Micro Semi
Industry Computer Hardware
Experience
Applied Micro March 2013 - Present
Veloce Technologies, Inc. March 2011 - March 2013
Tabula June 2010 - January 2011
Innovative Silicon October 2009 - June 2010
Tabula March 2009 - September 2009
SanDisk September 2007 - January 2009
Cisco Systems February 2005 - April 2007
iWatt November 2004 - February 2005
Tau Networks April 2001 - February 2005
Creative Systems April 1998 - December 2001
Skills
ASIC, CMOS, Cadence, Hercules, Circuit Design, Analog
Education
Cabrillo College
Santa Cruz High
Applied Micro March 2013 - Present
Veloce Technologies, Inc. March 2011 - March 2013
Tabula June 2010 - January 2011
Innovative Silicon October 2009 - June 2010
Tabula March 2009 - September 2009
SanDisk September 2007 - January 2009
Cisco Systems February 2005 - April 2007
iWatt November 2004 - February 2005
Tau Networks April 2001 - February 2005
Creative Systems April 1998 - December 2001
Skills
ASIC, CMOS, Cadence, Hercules, Circuit Design, Analog
Education
Cabrillo College
Santa Cruz High
Peter Suaris's Tabula Experience September 2010 - April 2011
Job Senior Architect at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems December 2012 - Present
Atrenta May 2011 - December 2012
Tabula September 2010 - April 2011
TierLogic Inc June 2006 - July 2010
Mentor Graphics July 2002 - May 2006
Cadence Design Systems 1990 - 1992
Education
Duke University 1985 — 1988
Ph.D, Computer Science
University of Kentucky 1983 — 1985
M.S.O.R, Operations Research
University of Moratuwa 1975 — 1980
B.Sc, Eng
Cadence Design Systems December 2012 - Present
Atrenta May 2011 - December 2012
Tabula September 2010 - April 2011
TierLogic Inc June 2006 - July 2010
Mentor Graphics July 2002 - May 2006
Cadence Design Systems 1990 - 1992
Education
Duke University 1985 — 1988
Ph.D, Computer Science
University of Kentucky 1983 — 1985
M.S.O.R, Operations Research
University of Moratuwa 1975 — 1980
B.Sc, Eng
Gregg Smith's Tabula Experience September 2010 - February 2015
Job NA Marketing and Sales Development
Industry Management Consulting
Experience
Cardtek/Smartsoft January 2008 - Present
Feig Electronics September 2014 - Present
GSCCO LLC July 2007 - Present
Tabula September 2010 - February 2015
World Peace Group Americas January 2009 - March 2010
ZiLOG, Inc. 2002 - 2007
Pioneer Standard 1999 - 2002
V3 Semiconductor 1997 - 1999
Future Electronics 1986 - 1997
National Semiconductor June 1976 - May 1986
Skills
Sales Management, Product Management, Semiconductors, New Business Development, Product Marketing, Sales, Start-ups, Leadership, Embedded Systems, Business Strategy, Electronics, Business Development, Cross-functional Team..., Strategic Partnerships, Strategic Planning, Account Management, Mobile Devices, Telecommunications, Solution Selling, International Sales, Manufacturing, Product Development, Go-to-market Strategy, Competitive Analysis, Sales Operations, Product Launch, Business Planning, Strategy, Channel Partners
Education
University of New Brunswick 1964 — 1969
BS Business Administration
Cardtek/Smartsoft January 2008 - Present
Feig Electronics September 2014 - Present
GSCCO LLC July 2007 - Present
Tabula September 2010 - February 2015
World Peace Group Americas January 2009 - March 2010
ZiLOG, Inc. 2002 - 2007
Pioneer Standard 1999 - 2002
V3 Semiconductor 1997 - 1999
Future Electronics 1986 - 1997
National Semiconductor June 1976 - May 1986
Skills
Sales Management, Product Management, Semiconductors, New Business Development, Product Marketing, Sales, Start-ups, Leadership, Embedded Systems, Business Strategy, Electronics, Business Development, Cross-functional Team..., Strategic Partnerships, Strategic Planning, Account Management, Mobile Devices, Telecommunications, Solution Selling, International Sales, Manufacturing, Product Development, Go-to-market Strategy, Competitive Analysis, Sales Operations, Product Launch, Business Planning, Strategy, Channel Partners
Education
University of New Brunswick 1964 — 1969
BS Business Administration
Kuoching Lin's Tabula Experience August 2010 - February 2015
Job Senior Software Architect at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems March 2015 - Present
Tabula August 2010 - February 2015
Tierlogic Technology November 2006 - August 2010
Mentor Graphics 1989 - 2006
Skills
C++, Debugging, Software Engineering
Education
The University of Texas at Austin 1987 — 1989
Master, Computer Engineering
National Tsing Hua University 1981 — 1985
Cadence Design Systems March 2015 - Present
Tabula August 2010 - February 2015
Tierlogic Technology November 2006 - August 2010
Mentor Graphics 1989 - 2006
Skills
C++, Debugging, Software Engineering
Education
The University of Texas at Austin 1987 — 1989
Master, Computer Engineering
National Tsing Hua University 1981 — 1985
Narender Hanchate's Tabula Experience November 2012 - February 2015
Job Sr. Principal Software Engineer
Industry Semiconductors
Experience
Cadence Design Systems February 2015 - Present
Tabula November 2012 - February 2015
Samsung Semiconductor May 2011 - November 2012
Synopsys June 2006 - May 2011
University of South Florida January 2002 - May 2006
HCL Technologies June 2000 - July 2001
Skills
EDA, Static Timing Analysis, Circuits, VLSI, ASIC, Algorithms, Signal Integrity, TCL, Physical Design, Verilog, FPGA, SoC, Timing Closure, RTL design, RTL Design, Semiconductors
Education
University of South Florida 2003 — 2006
Ph.D., Computer Engineering
University of South Florida 2001 — 2003
M.S, Computer Engineering
Osmania University 1996 — 2000
Bachelor of Engineering, Electronics and Communications
Atomic Energy Central School 1984 — 1994
Cadence Design Systems February 2015 - Present
Tabula November 2012 - February 2015
Samsung Semiconductor May 2011 - November 2012
Synopsys June 2006 - May 2011
University of South Florida January 2002 - May 2006
HCL Technologies June 2000 - July 2001
Skills
EDA, Static Timing Analysis, Circuits, VLSI, ASIC, Algorithms, Signal Integrity, TCL, Physical Design, Verilog, FPGA, SoC, Timing Closure, RTL design, RTL Design, Semiconductors
Education
University of South Florida 2003 — 2006
Ph.D., Computer Engineering
University of South Florida 2001 — 2003
M.S, Computer Engineering
Osmania University 1996 — 2000
Bachelor of Engineering, Electronics and Communications
Atomic Energy Central School 1984 — 1994
Eric Minami's Tabula Experience January 2008 - February 2015
Job Associate Techical Director, technology CAD at Inphi Corporation
Industry Semiconductors
Experience
Inphi Corporation March 2015 - Present
Tabula January 2008 - February 2015
Marvell Semiconductor June 2001 - December 2007
Marvell Semiconductor November 1998 - June 2001
MoSys, Inc. August 1996 - November 1998
Xilinx June 1994 - August 1996
Sony Corporation June 1989 - August 1991
Skills
Semiconductors, IC, ASIC, SoC, EDA, Verilog, Mixed Signal, Electronics, Silicon, Debugging, Electrical Engineering, Manufacturing, R&D, Design for Manufacturing, Physical Verification, FPGA
Education
University of California, Berkeley 1991 — 1994
Ph.D., Electrical Engineering
University of California, Berkeley 1986 — 1988
M.S., Electrical Engineering
Massachusetts Institute of Technology 1982 — 1986
S.B. / S.B., Materials Science / Electrcal Engineering
Inphi Corporation March 2015 - Present
Tabula January 2008 - February 2015
Marvell Semiconductor June 2001 - December 2007
Marvell Semiconductor November 1998 - June 2001
MoSys, Inc. August 1996 - November 1998
Xilinx June 1994 - August 1996
Sony Corporation June 1989 - August 1991
Skills
Semiconductors, IC, ASIC, SoC, EDA, Verilog, Mixed Signal, Electronics, Silicon, Debugging, Electrical Engineering, Manufacturing, R&D, Design for Manufacturing, Physical Verification, FPGA
Education
University of California, Berkeley 1991 — 1994
Ph.D., Electrical Engineering
University of California, Berkeley 1986 — 1988
M.S., Electrical Engineering
Massachusetts Institute of Technology 1982 — 1986
S.B. / S.B., Materials Science / Electrcal Engineering
Kent Townley's Tabula Experience May 2008 - September 2012
Job Principal Engineer and Microprocessor Designer
Industry Computer Hardware
Experience
Soft Machines 2012 - Present
Tabula May 2008 - September 2012
Montalvo Systems November 2005 - March 2008
MIPS Technologies December 1998 - March 2004
Hewlett-Packard May 1994 - December 1998
IBM 1992 - 1994
Analog Devices 1989 - 1992
Skills
FPGA, Low-power Design, Circuit Design, Debugging, PLL, Digital Signal..., Microprocessors, Digital Circuit Design, VLSI, IC, EDA
Education
University of Illinois at Urbana-Champaign 1986 — 1989
Soft Machines 2012 - Present
Tabula May 2008 - September 2012
Montalvo Systems November 2005 - March 2008
MIPS Technologies December 1998 - March 2004
Hewlett-Packard May 1994 - December 1998
IBM 1992 - 1994
Analog Devices 1989 - 1992
Skills
FPGA, Low-power Design, Circuit Design, Debugging, PLL, Digital Signal..., Microprocessors, Digital Circuit Design, VLSI, IC, EDA
Education
University of Illinois at Urbana-Champaign 1986 — 1989
Dhammika Kurumbalapitiya's Tabula Experience November 2011 - February 2015
Job Systems Engineer at Achronix Semiconductor Corporation
Industry Semiconductors
Experience
Achronix Semiconductor Corporation March 2015 - Present
Tabula November 2011 - February 2015
TierLogic January 2008 - July 2010
Skills
ASIC, FPGA, Algorithms, VLSI, SoC, Xilinx, Verilog, Semiconductors, EDA, Hardware Architecture, Engineering, Debugging, RTL design
Education
University of Peradeniya 1984 — 1990
Achronix Semiconductor Corporation March 2015 - Present
Tabula November 2011 - February 2015
TierLogic January 2008 - July 2010
Skills
ASIC, FPGA, Algorithms, VLSI, SoC, Xilinx, Verilog, Semiconductors, EDA, Hardware Architecture, Engineering, Debugging, RTL design
Education
University of Peradeniya 1984 — 1990
Jung Ko's Tabula Experience September 2008 - March 2015
Job Senior Member of Technical Staff at Altera
Industry Semiconductors
Experience
Altera March 2015 - Present
Tabula September 2008 - March 2015
Altera July 2005 - August 2008
Concordia University 2001 - 2003
Canadian Space Agency January 2002 - September 2002
Matrox May 2001 - September 2001
Nortel September 2000 - December 2000
Skills
FPGA, ASIC, RTL design, Verilog, Simulations, Electrical Engineering, Cadence Virtuoso, Algorithms, Perl, TCL, Timing Closure, Digital Signal..., Mixed Signal, Memory Design, Clojure, DSP, Simulation, Linux, C++, C, Haskell, Functional Programming, Arduino, Primetime, Static Timing Analysis, Integrated Circuit..., Embedded Systems, SoC, Semiconductors, EDA, IC
Education
University of Alberta 2003 — 2005
MSc, Electrical and Computer Engineering
Concordia University 1998 — 2003
BEng, Electrical Engineering
Altera March 2015 - Present
Tabula September 2008 - March 2015
Altera July 2005 - August 2008
Concordia University 2001 - 2003
Canadian Space Agency January 2002 - September 2002
Matrox May 2001 - September 2001
Nortel September 2000 - December 2000
Skills
FPGA, ASIC, RTL design, Verilog, Simulations, Electrical Engineering, Cadence Virtuoso, Algorithms, Perl, TCL, Timing Closure, Digital Signal..., Mixed Signal, Memory Design, Clojure, DSP, Simulation, Linux, C++, C, Haskell, Functional Programming, Arduino, Primetime, Static Timing Analysis, Integrated Circuit..., Embedded Systems, SoC, Semiconductors, EDA, IC
Education
University of Alberta 2003 — 2005
MSc, Electrical and Computer Engineering
Concordia University 1998 — 2003
BEng, Electrical Engineering
Nanda Lekkelapudi's Tabula Experience June 2012 - March 2015
Job Sr Staff Engineer at Xilinx
Industry Computer Hardware
Experience
Xilinx June 2015 - Present
Tabula June 2012 - March 2015
MIPS Technologies December 2008 - May 2012
MIPS Technologies January 2008 - December 2008
MIPS Technologies July 2001 - January 2008
HAL Computer Systems May 1997 - July 2001
Reliance Computer Corp (later acquired by Broadcom) August 1996 - December 1996
Skills
Integrated Circuit..., Logic Synthesis, DFT, FPGA, CMOS, Hardware Architecture, Embedded Systems, LVS, Debugging, MIPS, VLSI, ASIC, SoC
Education
Texas A&M University-Kingsville 1995 — 1997
Master of Science (MS), Electrical Engineering
Bangalore University 1990 — 1994
B.S., Electronics
Xilinx June 2015 - Present
Tabula June 2012 - March 2015
MIPS Technologies December 2008 - May 2012
MIPS Technologies January 2008 - December 2008
MIPS Technologies July 2001 - January 2008
HAL Computer Systems May 1997 - July 2001
Reliance Computer Corp (later acquired by Broadcom) August 1996 - December 1996
Skills
Integrated Circuit..., Logic Synthesis, DFT, FPGA, CMOS, Hardware Architecture, Embedded Systems, LVS, Debugging, MIPS, VLSI, ASIC, SoC
Education
Texas A&M University-Kingsville 1995 — 1997
Master of Science (MS), Electrical Engineering
Bangalore University 1990 — 1994
B.S., Electronics
Tom Chanak's Tabula Experience February 2008 - March 2015
Job Principal Engineer at Altera
Industry Semiconductors
Experience
Altera March 2015 - Present
Tabula February 2008 - March 2015
MIPS Technologies January 2007 - January 2008
MIPS Technologies June 2004 - January 2007
MIPS Technologies March 1998 - June 2004
Silicon Graphics May 1995 - March 1998
Skills
EDA
Education
Stanford University 1989 — 1995
PhD, Electrical Engineering
Stanford University 1988 — 1989
MS, Electrical Engineering
Carnegie Mellon University 1984 — 1988
BS, Electrical Engineering and Computer Engineering
Altera March 2015 - Present
Tabula February 2008 - March 2015
MIPS Technologies January 2007 - January 2008
MIPS Technologies June 2004 - January 2007
MIPS Technologies March 1998 - June 2004
Silicon Graphics May 1995 - March 1998
Skills
EDA
Education
Stanford University 1989 — 1995
PhD, Electrical Engineering
Stanford University 1988 — 1989
MS, Electrical Engineering
Carnegie Mellon University 1984 — 1988
BS, Electrical Engineering and Computer Engineering
Dave Tarbox's Tabula Experience May 2012 - March 2015
Job Senior Software Tools and Build Engineer at Dell
Industry Computer Software
Experience
Dell April 2015 - Present
Tabula May 2012 - March 2015
Xilinx October 1989 - March 2012
Silvar Lisco 1985 - 1989
Silvar-Lisco (SVR) 1985 - 1989
NCA (now defunct) 1980 - 1985
Skills
FPGA, Perl, EDA, Debugging, TCL, C++, C, Software Engineering, Python, Perforce, Buildbot, Shell Scripting
Education
New Mexico Institute of Mining and Technology 1967 — 1980
B.S.
The University of New Mexico 1966 — 1967
Dell April 2015 - Present
Tabula May 2012 - March 2015
Xilinx October 1989 - March 2012
Silvar Lisco 1985 - 1989
Silvar-Lisco (SVR) 1985 - 1989
NCA (now defunct) 1980 - 1985
Skills
FPGA, Perl, EDA, Debugging, TCL, C++, C, Software Engineering, Python, Perforce, Buildbot, Shell Scripting
Education
New Mexico Institute of Mining and Technology 1967 — 1980
B.S.
The University of New Mexico 1966 — 1967
Santosh Pilligundla's Tabula Experience June 2008 - December 2010
Job Staff Software Engineer at Xilinx
Industry Computer Software
Experience
Xilinx December 2010 - Present
Tabula June 2008 - December 2010
Mentor Graphics May 2002 - June 2008
IKOS Systems May 2001 - May 2002
Convergys August 2000 - April 2001
Cadence Design Systems 1998 - 2000
Skills
C++, EDA, Perl, Debugging, TCL, Verilog, SoC, Algorithms, Software Development, ASIC, Software Engineering, FPGA
Education
Birla Institute of Technology and Science 1993 — 1998
Bachelor of Engineering (BEng), Computer Science
Xilinx December 2010 - Present
Tabula June 2008 - December 2010
Mentor Graphics May 2002 - June 2008
IKOS Systems May 2001 - May 2002
Convergys August 2000 - April 2001
Cadence Design Systems 1998 - 2000
Skills
C++, EDA, Perl, Debugging, TCL, Verilog, SoC, Algorithms, Software Development, ASIC, Software Engineering, FPGA
Education
Birla Institute of Technology and Science 1993 — 1998
Bachelor of Engineering (BEng), Computer Science
Kenny Duong's Tabula Experience June 2011 - March 2015
Job Staff Hardware Engineer at Altera
Industry Electrical/Electronic Manufacturing
Experience
Altera March 2015 - Present
Tabula June 2011 - March 2015
Oracle August 2008 - June 2011
UC Berkeley December 2006 - May 2008
Skills
Circuit Design, VLSI, IC, Semiconductors, Digital Circuit Design, Statistical Modeling, Timing Closure, SRAM, Semiconductor Device, Physical Design, ASIC, Verilog, Perl, Linux, C, Microprocessors, FPGA, Embedded Systems, Hardware Architecture, RTL design, Hardware
Education
University of California, Berkeley 2007 — 2008
MS
University of California, Berkeley 2003 — 2007
BS
Altera March 2015 - Present
Tabula June 2011 - March 2015
Oracle August 2008 - June 2011
UC Berkeley December 2006 - May 2008
Skills
Circuit Design, VLSI, IC, Semiconductors, Digital Circuit Design, Statistical Modeling, Timing Closure, SRAM, Semiconductor Device, Physical Design, ASIC, Verilog, Perl, Linux, C, Microprocessors, FPGA, Embedded Systems, Hardware Architecture, RTL design, Hardware
Education
University of California, Berkeley 2007 — 2008
MS
University of California, Berkeley 2003 — 2007
BS
Gene Bushuyev's Tabula Experience January 2012 - March 2015
Job Looking for startups, doing c++11
Industry Computer Software
Experience
GB Research, LLC January 2006 - Present
Tabula January 2012 - March 2015
Bloomberg LP January 2009 - February 2011
Cadence 2004 - 2006
Telairity Semiconductor 2001 - 2003
Synopsys 1997 - 2001
Skills
C++, Algorithms, Programming, Leadership, Labview, Design Patterns, EDA, Perl, Unix, Optimization, Simulations, System Architecture, Distributed Systems, LabVIEW, Python, Software Engineering, Java, Software Development
Education
Carnegie Mellon University 1996 — 1997
Electrical Engineering
Moscow Institute of Physics and Technology (State University) (MIPT) 1980 — 1986
MSEE, Electrical Engineering
Moscow Institute of Physics and Technology (State University) (MIPT) 1980 — 1986
MS
GB Research, LLC January 2006 - Present
Tabula January 2012 - March 2015
Bloomberg LP January 2009 - February 2011
Cadence 2004 - 2006
Telairity Semiconductor 2001 - 2003
Synopsys 1997 - 2001
Skills
C++, Algorithms, Programming, Leadership, Labview, Design Patterns, EDA, Perl, Unix, Optimization, Simulations, System Architecture, Distributed Systems, LabVIEW, Python, Software Engineering, Java, Software Development
Education
Carnegie Mellon University 1996 — 1997
Electrical Engineering
Moscow Institute of Physics and Technology (State University) (MIPT) 1980 — 1986
MSEE, Electrical Engineering
Moscow Institute of Physics and Technology (State University) (MIPT) 1980 — 1986
MS
Ben Hemmen's Tabula Experience August 2008 - March 2015
Job Verification Engineercontact at NetSpeed Systems
Industry Semiconductors
Experience
NetSpeed Systems June 2015 - Present
Tabula August 2008 - March 2015
RFMD 2004 - 2008
trace mountain products inc April 1989 - April 2005
Symbol Technologies May 1995 - June 2003
eclipse data technology March 1996 - September 1997
Trace Products 1989 - 1995
National Semiconductor October 1987 - May 1989
Fairchild Semiconductor June 1984 - October 1987
Theater R Us January 1979 - February 1979
Education
Santa Clara University 1980 — 1994
BSEE
Santa Clara University 1986 — 1988
MSEE
NetSpeed Systems June 2015 - Present
Tabula August 2008 - March 2015
RFMD 2004 - 2008
trace mountain products inc April 1989 - April 2005
Symbol Technologies May 1995 - June 2003
eclipse data technology March 1996 - September 1997
Trace Products 1989 - 1995
National Semiconductor October 1987 - May 1989
Fairchild Semiconductor June 1984 - October 1987
Theater R Us January 1979 - February 1979
Education
Santa Clara University 1980 — 1994
BSEE
Santa Clara University 1986 — 1988
MSEE
Richard Asano's Tabula Experience September 2011 - September 2013
Job Contractor at Tabula
Industry Computer Hardware
Experience
Tabula September 2011 - September 2013
Tabula November 2009 - February 2011
Rambus 1993 - October 2008
SMOS Systems 1989 - 1993
Elxsi 1980 - 1989
Education
University of California, Berkeley
Tabula September 2011 - September 2013
Tabula November 2009 - February 2011
Rambus 1993 - October 2008
SMOS Systems 1989 - 1993
Elxsi 1980 - 1989
Education
University of California, Berkeley
Harlan Lau's Tabula Experience April 2009 - September 2013
Job Design verification engineer
Industry Semiconductors
Experience
Tabula April 2009 - September 2013
Rambus February 1992 - October 2008
MIPS Computer systems 1987 - 1992
Lawrence Livermore National Laboratory 1985 - 1987
ELXSI 1980 - 1985
IBM 1977 - 1980
Skills
Simulation, VCS, Verilog, Documentation, IC, Engineering, Semiconductors, EDA, FPGA, Perl, ASIC, RTL design, Debugging, Python, Unix, Linux, Functional Verification, Shell Scripting, CVS, Integration, Simulations, Static Timing Analysis, Software Documentation, Microprocessors, SoC, Hardware Architecture, TCL, Veritas Cluster Server, DFT, Processors, VLSI, SystemVerilog
Education
Stanford University 1973 — 1977
MS, Electrical engineering
Encina High School
Tabula April 2009 - September 2013
Rambus February 1992 - October 2008
MIPS Computer systems 1987 - 1992
Lawrence Livermore National Laboratory 1985 - 1987
ELXSI 1980 - 1985
IBM 1977 - 1980
Skills
Simulation, VCS, Verilog, Documentation, IC, Engineering, Semiconductors, EDA, FPGA, Perl, ASIC, RTL design, Debugging, Python, Unix, Linux, Functional Verification, Shell Scripting, CVS, Integration, Simulations, Static Timing Analysis, Software Documentation, Microprocessors, SoC, Hardware Architecture, TCL, Veritas Cluster Server, DFT, Processors, VLSI, SystemVerilog
Education
Stanford University 1973 — 1977
MS, Electrical engineering
Encina High School
Joseph Shinnerl's Tabula Experience May 2006 - October 2008
Job Staff Engineer in Place and Route at Mentor Graphics
Industry Computer Software
Experience
Mentor Graphics January 2009 - Present
Tabula May 2006 - October 2008
UCLA Computer Science Dept. July 1999 - April 2006
Skills
EDA, ASIC, Algorithms
Education
University of California, San Diego 1988 — 1995
PhD, Mathematics
University of California, San Diego 1983 — 1988
BS, Physics and Applied Mathematics
Mentor Graphics January 2009 - Present
Tabula May 2006 - October 2008
UCLA Computer Science Dept. July 1999 - April 2006
Skills
EDA, ASIC, Algorithms
Education
University of California, San Diego 1988 — 1995
PhD, Mathematics
University of California, San Diego 1983 — 1988
BS, Physics and Applied Mathematics
Prashant Mangal's Tabula Experience March 2008 - March 2015
Job Technical Lead at Oracle
Industry Semiconductors
Experience
Oracle May 2015 - Present
Tabula March 2008 - March 2015
Intersil February 2005 - February 2008
Centillium Communications March 2002 - February 2005
Texas Instruments June 1999 - March 2002
Skills
SoC, IO Design, FPGA, Semiconductors, IC, Mixed Signal, CMOS, Analog, Debugging, Hardware Architecture, SERDES, Analog Circuit Design, Integrated Circuit..., PLL, Power Management
Education
Arizona State University 1997 — 2000
Master of Science (MS), Electrical and Electronics Engineering
University of Mysore 1993 — 1997
Bachelor of Science (B.S.), Electrical and Electronics Engineering
Oracle May 2015 - Present
Tabula March 2008 - March 2015
Intersil February 2005 - February 2008
Centillium Communications March 2002 - February 2005
Texas Instruments June 1999 - March 2002
Skills
SoC, IO Design, FPGA, Semiconductors, IC, Mixed Signal, CMOS, Analog, Debugging, Hardware Architecture, SERDES, Analog Circuit Design, Integrated Circuit..., PLL, Power Management
Education
Arizona State University 1997 — 2000
Master of Science (MS), Electrical and Electronics Engineering
University of Mysore 1993 — 1997
Bachelor of Science (B.S.), Electrical and Electronics Engineering
Pritish Malavade's Tabula Experience January 2013 - March 2015
Job Engineer at Broadcom
Industry Semiconductors
Experience
Broadcom March 2015 - Present
Tabula January 2013 - March 2015
Algo-Logic Systems January 2011 - December 2012
Algo-Logic Systems September 2010 - December 2010
Skills
Verilog, FPGA, ModelSim, Xilinx, RTL coding, Logic Design, Hardware Architecture, C, TCL, C++, VLSI, Computer Architecture, Altera Quartus, Microarchitecture, TCP/IP
Education
University of Southern California 2008 — 2010
MS, Electrical Engineering
Mumbai University
Bachelor of Engineering, Electronics Engineering
Broadcom March 2015 - Present
Tabula January 2013 - March 2015
Algo-Logic Systems January 2011 - December 2012
Algo-Logic Systems September 2010 - December 2010
Skills
Verilog, FPGA, ModelSim, Xilinx, RTL coding, Logic Design, Hardware Architecture, C, TCL, C++, VLSI, Computer Architecture, Altera Quartus, Microarchitecture, TCP/IP
Education
University of Southern California 2008 — 2010
MS, Electrical Engineering
Mumbai University
Bachelor of Engineering, Electronics Engineering
Bill Allaire's Tabula Experience September 2011 - Present
Job Director of Product Planning at Xilinx
Industry Computer Software
Experience
Xilinx March 2015 - Present
Tabula September 2011 - Present
Invictus Mobile Media June 2008 - Present
Allaire Consulting Group June 2008 - December 2011
Invictus Mobile Media 2008 - December 2011
Xilinx 1990 - 2008
Skills
FPGA, Hardware Design, Product Marketing, Embedded Systems, Microprocessors, Software Engineering, New Product Ideation, Hardware Architecture, Semiconductors, Product Development, Mobile Devices, System Architecture, Embedded Software, Software Development, Mobile Applications, Start-ups, Analog
Education
University of Delaware 1979 — 1983
BS, Electrical Engineering
Xilinx March 2015 - Present
Tabula September 2011 - Present
Invictus Mobile Media June 2008 - Present
Allaire Consulting Group June 2008 - December 2011
Invictus Mobile Media 2008 - December 2011
Xilinx 1990 - 2008
Skills
FPGA, Hardware Design, Product Marketing, Embedded Systems, Microprocessors, Software Engineering, New Product Ideation, Hardware Architecture, Semiconductors, Product Development, Mobile Devices, System Architecture, Embedded Software, Software Development, Mobile Applications, Start-ups, Analog
Education
University of Delaware 1979 — 1983
BS, Electrical Engineering
Jindrich Zejda's Tabula Experience October 2011 - Present
Job Principal R&D Engineer at Tabula
Industry Computer Hardware
Experience
Tabula October 2011 - Present
Synopsys 1997 - October 2011
Skills
Static Timing Analysis, EDA, Signal Integrity, Algorithms, Verilog, TCL, Debugging, ASIC, Multithreading, Architectures, Semiconductors, C, SoC, VLSI, Physical Design, RTL Design, Architecture, High Performance..., Sofware architecture
Education
Université de Montréal 1993 — 1997
PhD, Computer Science, Electrical Engineering
Tabula October 2011 - Present
Synopsys 1997 - October 2011
Skills
Static Timing Analysis, EDA, Signal Integrity, Algorithms, Verilog, TCL, Debugging, ASIC, Multithreading, Architectures, Semiconductors, C, SoC, VLSI, Physical Design, RTL Design, Architecture, High Performance..., Sofware architecture
Education
Université de Montréal 1993 — 1997
PhD, Computer Science, Electrical Engineering
Eric Sather's Tabula Experience September 2012 - February 2015
Job Principal Engineer at Altera
Industry Semiconductors
Experience
Altera February 2015 - Present
Tabula September 2012 - February 2015
Tabula September 2006 - September 2012
Actel Corporation September 1996 - September 2006
Skills
EDA, Place & Route, Physical Synthesis, Graph Theory, Optimization, Algorithms, C++, Perl, Debugging, Static Timing Analysis, FPGA, SoC, ASIC, Semiconductors, VLSI, IC
Education
Massachusetts Institute of Technology
Ph.D., Theoretical Particle Physics
The University of Chicago
A.B., Physics
Altera February 2015 - Present
Tabula September 2012 - February 2015
Tabula September 2006 - September 2012
Actel Corporation September 1996 - September 2006
Skills
EDA, Place & Route, Physical Synthesis, Graph Theory, Optimization, Algorithms, C++, Perl, Debugging, Static Timing Analysis, FPGA, SoC, ASIC, Semiconductors, VLSI, IC
Education
Massachusetts Institute of Technology
Ph.D., Theoretical Particle Physics
The University of Chicago
A.B., Physics
Jacob Korn's Tabula Experience January 2006 - September 2006
Job Senior Design Verification Engineer at Apple
Industry Semiconductors
Experience
Apple June 2007 - Present
Tabula January 2006 - September 2006
Teknovus August 2004 - August 2006
Raytheon June 1998 - September 2000
Skills
ASIC, SoC, Logic Design, Debugging, Verilog, Semiconductors, FPGA, RTL Design, VLSI, System verilog
Education
University of California, Riverside 1993 — 1998
BS, Electrical Engineering
University of California, Riverside 1993 — 1998
BS, Electrical and Electronics Engineering
Apple June 2007 - Present
Tabula January 2006 - September 2006
Teknovus August 2004 - August 2006
Raytheon June 1998 - September 2000
Skills
ASIC, SoC, Logic Design, Debugging, Verilog, Semiconductors, FPGA, RTL Design, VLSI, System verilog
Education
University of California, Riverside 1993 — 1998
BS, Electrical Engineering
University of California, Riverside 1993 — 1998
BS, Electrical and Electronics Engineering
Julia Luo's Tabula Experience June 2010 - July 2011
Job CAD manager at Lattice Semiconductor
Industry Semiconductors
Experience
Lattice Semiconductor February 2012 - Present
Achronix Semiconductor August 2011 - February 2012
Tabula June 2010 - July 2011
ARM 2000 - 2010
Skills
EDA, ASIC, SoC, IC, Semiconductors, Verilog, TCL, Mixed Signal, VLSI, Physical Design, Static Timing Analysis, Timing Closure, CMOS, Low-power Design, FPGA, Cadence Virtuoso, Integrated Circuit..., Debugging, Analog, Circuit Design, CAD
Education
UC Davis 1996 — 1999
Applied Mathematics
Lattice Semiconductor February 2012 - Present
Achronix Semiconductor August 2011 - February 2012
Tabula June 2010 - July 2011
ARM 2000 - 2010
Skills
EDA, ASIC, SoC, IC, Semiconductors, Verilog, TCL, Mixed Signal, VLSI, Physical Design, Static Timing Analysis, Timing Closure, CMOS, Low-power Design, FPGA, Cadence Virtuoso, Integrated Circuit..., Debugging, Analog, Circuit Design, CAD
Education
UC Davis 1996 — 1999
Applied Mathematics
Martha (Zepeda) Huerta's Tabula Experience November 2012 - April 2015
Job Financial Analyst at Avogy Inc.
Industry Semiconductors
Experience
Avogy Inc. May 2015 - Present
Tabula November 2012 - April 2015
Twin Creeks Technologies, Inc January 2008 - December 2012
SanDisk June 2006 - January 2008
Matrix Semiconductor, Inc. January 2001 - June 2006
Gemstar/NuvoMedia, Inc. January 1999 - January 2001
3Com/ Palm Computing Inc. September 1996 - January 1999
Reliance Technical Services, Inc April 1995 - September 1996
Skills
QuickBooks, Microsoft Excel, Cross-functional Team..., Start-ups, Microsoft Office, Outlook, Leadership, Project Management, Mas 90, Oracle, Paychex, ADP Payroll, ADP HRB, Sage, Platinum, ASK MANMAN, QAD, Concur Solutions, Microsoft Dynamics AX
Education
University of Phoenix
Bachelor's Degree, Accounting and Business/Management
Heald College
Associate's Degree, Accounting
Avogy Inc. May 2015 - Present
Tabula November 2012 - April 2015
Twin Creeks Technologies, Inc January 2008 - December 2012
SanDisk June 2006 - January 2008
Matrix Semiconductor, Inc. January 2001 - June 2006
Gemstar/NuvoMedia, Inc. January 1999 - January 2001
3Com/ Palm Computing Inc. September 1996 - January 1999
Reliance Technical Services, Inc April 1995 - September 1996
Skills
QuickBooks, Microsoft Excel, Cross-functional Team..., Start-ups, Microsoft Office, Outlook, Leadership, Project Management, Mas 90, Oracle, Paychex, ADP Payroll, ADP HRB, Sage, Platinum, ASK MANMAN, QAD, Concur Solutions, Microsoft Dynamics AX
Education
University of Phoenix
Bachelor's Degree, Accounting and Business/Management
Heald College
Associate's Degree, Accounting