Scalable Systems Research Labs, Inc.
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23 Scalable Systems Research Labs, Inc. employees in database. Find out everything there's to know about Scalable Systems Research Labs, Inc. employees. We offer you a great deal of unbiased information from the internal database, personal records, and many other details that might be of interest to you.
Scalable Systems Research Labs, Inc. Employees
Scalable Systems Research Labs Inc. July 2015 - Present
Illinois Institute of Technology August 2014 - Present
Illinois Institute of Technology January 2014 - Present
Tata Consultancy Services September 2012 - June 2013
Skills
C++, VHDL, SQL, VLSI, C, HP Quality Center, Unix, JIRA, Cadence Virtuoso, Oracle, Visual Basic, Simvision, Java, Matlab, Cadence Virtuoso XL, HTML, Programming, Turbo C++, Putty, Virtuoso, Steinberg Nuendo, Microsoft Office, Shell Scripting, Linux, Music Production, Piano Playing, JavaScript, FPGA, Embedded Systems, Digital Circuit Design, Atmel, Xilinx ISE
Education
Illinois Institute of Technology 2013 — 2015
"Masters of Science", Electrical and Electronics Engineering
Sri Sairam Engineering College 2008 — 2012
Bachelor of Engineering (BEng), Electrical and Electronics Engineering
Apple August 2015 - Present
Scalable Systems Research Labs, Inc. August 2014 - July 2015
Oneirix Labs October 2011 - March 2012
Skills
C, Matlab, C++, Machine Learning, Signal Processing, Algorithms, Linear Algebra, Python, Computer Vision, Digital Audio, OpenCV, Csound, Image Processing, JavaScript, Programming, HTML
Education
University of Rochester 2012 — 2014
Master of Science (M.S.), Electrical Engineering
Vishwakarma Insitute of Technology, Pune 2007 — 2011
Bachelor of Engineering (B.E.), Electrical and Electronics Engineering
Trimble September 2014 - Present
Trimble January 2014 - August 2014
Scalable Systems Research Labs, Inc. July 2013 - January 2014
Skills
C, C++, C#, MIPS, Matlab, Microsoft Office, Linux, HTML, CSS, Eclipse, Soldering, Express PCB, Eagle, 8085 and 8051 Assembly, Data Structures, Computer Architecture, Pspice, Microcontrollers, Embedded Systems, Device Drivers, Linux Kernel, OpenCL, LLVM, Embedded Linux, Simulations, Embedded C, Integrated Circuit..., Java, Firmware, JavaScript, Programming, Unix, Python, Debugging, Algorithms, Software Engineering, Software Development
Education
Rajiv Gandhi Prodyogiki Vishwavidyalaya 2007 — 2011
Bachelor of Engineering (BE), Electronics and Communications Engineering
MS in Computer Engineering 2012 — 2014
Master's Degree, Computer Engineering
Intel Corporation June 2014 - Present
Intel Corporation June 2014 - March 2015
Scalable Systems Research Labs, Inc. July 2013 - June 2014
San Jose State University 2013 - June 2014
San Jose State University January 2014 - May 2014
Castrol January 2012 - August 2012
NDTS India Private Limited April 2011 - December 2011
Skills
Verilog, VHDL, Testing, ASIC, Linux, Matlab, Perl, C, SystemVerilog, C++, Xilinx ISE, ModelSim, Xilinx, LTE, Computer Architecture, 2G, 3GPP, 4G, Pspice, Synopsys tools, RF Test, Python
Education
San Jose State University 2012 — 2014
Master of Science (MS), Electrical Engineering
The University of Mumbai
B.E, Instrumentation
Scalable Systems Research Labs Inc. June 2015 - Present
PMC-Sierra September 2014 - May 2015
San Jose State University February 2014 - May 2015
RV-VLSI Design Center January 2013 - July 2013
Skills
Verilog, ASIC, RTL design, RTL verification, Static Timing Analysis, Logic Design, Xilinx ISE, SystemVerilog, C, C++, VLSI, Timing, FPGA, Perl, Photography, ModelSim, Xilinx, TCL, Linux, Synopsys tools, Logic Synthesis, Altera Quartus, Simulations, Synopsys Primetime, Flash Memory, Matlab, Debugging, SoC, Cache Coherency, FIFO, FreeBSD
Education
San Jose State University 2013 — 2015
Master of Science (MS)
Mumbai University 2008 — 2012
Bachelor of Engineering (BE)
Scalable Systems Research Labs, Inc. June 2013 - Present
Best Western International June 2008 - May 2012
Choice Hotels International January 2006 - July 2008
Skills
Hospitality Management, Sales, International Trade, Market Research, Finance, Microsoft Office, Security
Education
San Jose State University 2010 — 2013
Bachelor of Science (B.S.), International Business
Laney College
Associate of Arts (AA), Business Administration and Management, General, 3.3 GPA
Scalable Systems Research Labs Inc. December 2014 - Present
Skills
Matlab, C, VLSI, Cadence, Verilog, ASIC, Pspice, Microsoft Office, Electronics, CMOS, PowerPoint, Teamwork, Simulink, Mixed Signal, Analog, Microsoft Word, Agilent ADS, Cadence Virtuoso, Microsoft Excel, Python, NGSpice, Integrated Circuit..., Electrical Engineering, PLL
Education
San Jose State University 2012 — 2014
Master's degree, Electrical Engineering
pvp siddhartha institute of technology 2008 — 2012
Bachelor of Technology (BTech), Electrical and Electronics Engineering
Scalable Systems Research Labs, Inc. July 2013 - Present
San Jose State University July 2013 - May 2014
Skills
Verilog, Digital Electronics, ASIC, SystemVerilog, VHDL, Pspice, C++, Matlab, ModelSim, Perl, Python, RTL design, Design Verification..., Functional Verification, Static Timing Analysis, Xilinx, Proteus, Keil, Cadence Encounter, Computer Architecture, MIPS, Cadence, Xilinx ISE, FPGA, Synopsys tools, Logic Synthesis, RTL coding, SoC, Integrated Circuit..., RTL Design
Education
San Jose State University 2012 — 2014
Master's degree, Electrical and Electronics Engineering
FAMT, University of Mumbai 2007 — 2011
Bachelor of Science (BS), Electronics Engineering
Scalable Systems Research Labs, Inc. January 2014 - February 2015
Broadcom October 2013 - December 2013
San Jose State University November 2012 - October 2013
Accenture Services July 2010 - June 2012
Skills
Verilog, VHDL, Cadence Virtuoso, Logic Synthesis, VLSI, Matlab, Synopsys tools, ModelSim, Integrated Circuit..., Simulations, ASIC, SystemVerilog, Xilinx, Static Timing Analysis, EDA, RTL Design, COBOL, TCP/IP, Debugging, Cadence, Perl, Quartus, DRC/LVS, Management, SQL, Microsoft Office, Microsoft Excel, Java, HTML, JavaScript, C, DFT, TCL, Business Analysis, Customer Service, Microsoft SQL Server, Leadership, Visio, Microsoft Project, Microsoft Word, Data Analysis, Project Management, PowerPoint, SDLC, C++, Market Analysis, CSS, MySQL, Python, Eclipse
Education
San Jose State University 2012 — 2014
Master of Science (M.S.), Electrical Engineering
K. S. Institute of Technology 2006 — 2010
Bachelor of Engineering (B.E.), Telecommunications Engineering
Mentor Graphics July 2015 - Present
Mentor Graphics July 2014 - June 2015
Scalable Systems Research Labs, Inc. April 2013 - April 2014
Skills
Emulation, veloce, Verilog, ASIC, System Verilog, UVM, Matlab, C++, Unix, Linux, Perl
Education
San Jose State University 2011 — 2013
Master's Degree, Electrical Engineering
C.U.Shah College Of Engg and Technology 2006 — 2010
Bachelor of Engineering, Electronics And Communications
YoungWonks November 2014 - Present
Scalable Systems Research Labs, Inc. September 2013 - Present
San Jose State University January 2013 - December 2013
San Jose State University January 2012 - December 2013
Marvell Semiconductor January 2013 - August 2013
Tech Mahindra January 2011 - December 2011
Skills
C, Telecommunications, CCNA, Open Source Software, Digital Circuit Design, Digital IC Design, ASIC, RTL verification, Verilog, FPGA, Integrated Circuit..., Synopsys tools, Xilinx, SystemVerilog, Debugging, VHDL, ModelSim
Education
San Jose State University 2012 — 2014
MS, Electrical and Electronics Engineering
K S Institute of Technology 2006 — 2010
Bachelor of Science (BS), Telecommunications Engineering
Scalable Systems Research Labs, Inc August 2014 - March 2015
The University of Texas at Dallas August 2012 - May 2014
Infosys September 2010 - July 2012
Bharat Electronics Limited January 2010 - March 2010
Skills
C, Verilog, VHDL, Perl, SystemVerilog, Computer Architecture, RTL Design, ASIC, VLSI, Cadence Virtuoso, Synopsys tools, Xilinx ISE, Integrated Circuit..., Xilinx, Microcontrollers, Matlab, Code Composer Studio, ModelSim, Cadence, Digital Electronics, C++, Networking
Education
The University of Texas at Dallas 2012 — 2014
Master of Science (M.S.), Electrical Engineering
Visvesvaraya Technological University 2006 — 2010
Bachelor of Engineering (B.E.), Electronics and Communication Engineering
Scalable Systems Research Labs Inc. October 2012 - Present
FormFactor July 2011 - October 2012
Parimics, Inc. October 2002 - August 2011
UCSC SVEBP January 2004 - October 2008
HotRail, Inc. June 2000 - October 2002
Infineon Technologies April 1998 - June 2000
Skills
Processors, Verilog, FPGA, Hardware Architecture, Patents, System Architecture, Parallel Processing, Semiconductors, Start-ups, ASIC, IC, Mixed Signal, SoC, Analog, EDA, MEMS, Microprocessors, Embedded Systems, CMOS, SystemVerilog, Digital Signal..., Silicon, Engineering Management, Hardware, Electronics, Semiconductor Industry, Firmware, High Performance..., Wireless, Simulations, Sensors, Embedded Software, R&D, Integrated Circuit..., RF, Computer Architecture, VLSI, Cadence Virtuoso, PCB design, Debugging, RTL design, Device Drivers, Analog Circuit Design, ModelSim, Image Processing, Testing, DFT, Perl, Static Timing Analysis, TCL
Education
Christian-Albrechts-Universität zu Kiel 1985 — 1991
PhD, Physics & Informatik (~US Computer Science)
Scalable Systems Research Labs, Inc. November 2014 - Present
Oklahoma State University August 2013 - December 2013
Oracle Financial Services Software Ltd December 2010 - August 2012
Bestfit Business Solutions Pvt Ltd November 2010 - December 2010
Skills
Verilog, Digital Logic, Integrated Circuit..., ASIC, Unix, VLSI, C, Computer Architecture, Static Timing Analysis, Cadence, SystemVerilog, Synopsys tools, Python, TCL, Perl, ModelSim, SDLC, Manual Testing, Cadence Virtuoso, Xilinx ISE, Debugging, Testing, Physical Design, Simulations, Pspice, Test Planning, VHDL, SoC, Microsoft Office, Matlab, RTL Design, C++, EDA, CMOS, SPICE, Logic Design, Linux, FPGA, Functional Verification, Logic Synthesis, Java, Low-power Design, Programming, Semiconductors
Education
Oklahoma State University 2012 — 2014
Master's Degree, Electrical Engineering, 3.57
Visvesvaraya Technological University 2006 — 2010
Bachelor's Degree, Electronics and Communication, 3.7
Cadence Design Systems March 2015 - Present
Fastor Systems October 2014 - March 2015
Scalable Systems Research Labs, Inc. July 2014 - October 2014
University of Massachusetts January 2013 - May 2014
Advanced Electronic Technology Center (AETC) October 2012 - December 2013
Advanced Electronic Technology Center September 2012 - October 2012
Skills
C, C++ Language, Electronics, Semiconductors, Semiconductor..., Logic Design, VLSI, CMOS, Digital Circuit Design, Analog Circuit Design, ASIC, Verilog, SystemVerilog, Verification, Physical Design, Floorplanning, Static Timing Analysis, Clock Tree Synthesis, Simulations, Cadence Virtuoso, Cadence Virtuoso Layout..., Cadence Spectre, Encounter, Xilinx ISE, ModelSim, Questa, Matlab, MEMS, Silvaco, Testing, Electrical Engineering, Labview, Test Tools, Unix Shell Scripting, Perl Script, Web Design, Microsoft Office, Project Management, PSpice, UVM, FPGA, Synopsys tools, C++, Perl, SDK development, Memory Test
Education
University of Massachusetts Lowell 2012 — 2014
Master's Degree, Electrical Engineering, GPA - 3.67/4.0
North Maharashtra University 2007 — 2011
Bachelor's Degree, Electronics & Telecommunication, GPA - 7.79/10.0
Jeevan Bharti Madhyamik Vidhyalay 2005 — 2007
XII, Science, 70 %
Scalable Systems Research Labs Inc. June 2015 - Present
Cirwind Machines Mfg.Co June 2012 - May 2013
Vinay Enterprise December 2011 - March 2012
Skills
Synopsys VCS, Cadence Virtuoso, Cadence Design Vision, VHDL, system verilog, NC-Verilog, Perl, Assembly Language, UVM, C, C++, Matlab, Eclipse, Express PCB, NI Multisim, CCNA, Wireshark, GNS3, Testing, Electronics, Digital Electronics, Microcontrollers, HTML, Networking, ASIC, Hardware Architecture, Firmware, SystemVerilog, Altera Quartus, Xilinx ISE
Education
San Jose State University 2013 — 2015
Master of Science (MS), Electrical and Electronics Engineering, 3.20 4
Dharmsinh Desai Institute of Technology 2008 — 2012
Bachelor of Engineering (BE), Electrical, Electronics and Communications Engineering, 3.27 4
Scalable Systems Research Labs Inc. July 2015 - September 2015
Alcatel-Lucent June 2014 - May 2015
Illinois Institute of Technology April 2014 - May 2014
Adijit Softech Pvt.Ltd. February 2013 - June 2013
Skills
C, Shell Scripting, C++, Python, OpenStack, Docker, Matlab, TCL, Git, Open Source
Education
Illinois Institute of Technology 2013 — 2015
Master of Science (MS), Electrical Engineering, 3.71/4.00
University of Pune 2008 — 2012
Bachelor of Engineering (BEng), Electronics and Telecommunications
Scalable Systems Research Labs Inc. June 2015 - July 2015
Sirius Embedded Software January 2014 - June 2014
IISER Mohali May 2013 - July 2013
Central Electronics Engineering Research Institute (CEERI) January 2013 - May 2013
GMR Group May 2011 - July 2011
Skills
Verilog, Cadence Virtuoso, Matlab, C, C++, Algorithms, C++ Language, Perl, System Verilog, Code Composer Studio, ModelSim, SPICE, VLSI, Xilinx ISE, Computer Architecture, Design Compiler, ASIC, CAD, TCL, System C, VCS, DVE, SystemVerilog
Education
University of Minnesota-Twin Cities 2014 — 2016
Master's Degree, Electrical Engineering - Digital VLSI and Computer Architecture
Birla Institute of Technology and Science 2009 — 2014
Bachelor's Degree, Electrical and Electronics Engineering
Birla Institute of Technology and Science 2009 — 2014
Master's Degree, Physics
PS Senior Sec school, Chennai
Class XII
Scalable Systems Research Labs, Inc. December 2014 - Present
Tata Consultancy Services December 2011 - August 2012
Skills
VHDL, VLSI, ModelSim, C, Xilinx ISE, Embedded Systems, FPGA, ASIC, Computer Architecture, Verilog, Microcontrollers, Microprocessors, Logic Design, RTL Design, Digital IC Design, Cadence Virtuoso, BIST, C++, EDA, Altera Quartus, Perl, IC Station, Multisim, PCB design, Matlab, Programming, Assembly Language, Digital Electronics, Routing Protocols, Electronics, Robotics, Static Timing Analysis, Microsoft Office, Integrated Circuit..., Hardware, PSpice, Simulations, Sensors
Education
Rochester Institute of Technology 2012 — 2014
Master of Science (MS)
Amravati University 2007 — 2011
Bachelor of Engineering (BE)
Scalable Systems Research Labs, Inc. September 2011 - Present
Richard Arase Design (self) January 2001 - Present
Richard Arase Design (self) January 2000 - Present
Skills
SoC, FPGA, ASIC, TCL, Verilog, Static Timing Analysis, VLSI, EDA, Timing Closure, Physical Design, Logic Synthesis, Integrated Circuit..., Functional Verification, Low-power Design, Primetime, IC, Microprocessors, Logic Design, Processors, Semiconductors, VHDL, CMOS, Embedded Systems, Perl
Education
City University of New York City College 1966 — 1973
Bachelor of Engineering (1973)
University of California, Santa Cruz
Intel Corporation June 2015 - Present
Scalable Systems Research Labs Inc. August 2014 - May 2015
Arizona State University June 2014 - August 2014
Arizona State University January 2014 - May 2014
Tata Consultancy Services August 2010 - July 2012
Skills
VLSI, Verilog, C, C++, Matlab, Integrated Circuit..., Cadence, Cadence Virtuoso, VHDL, Testing, Perl, TCL, Windows, Xilinx ISE, MySQL, Quality Center, HTML, Micro Controller 8051, Digital Physical Design, ASIC Design Flow, Verilog RTL Design, Static Timing Analysis, DRC and LVS, Finite State Machines, SystemVerilog, webMethods Integration..., Eclipse, HP Quality Centre, System Verilog, Digital Design, Production Testing, Production Testing..., Agilent ADS, Place and Route, Floorplanning, IR Drop Analysis, Embedded Systems
Education
Arizona State University 2012 — 2014
Master of Science in Electrical Engineering, VLSI
BMS College of Engineering, Bangalore 2006 — 2010
Bachelor of Engineering (B.E.), Electrical, Electronics and Communications Engineering
MES College of Arts, Commerce and Science 2004 — 2006
Pre University College, Science
AMD September 2014 - Present
Sever Silicon Inc July 2014 - September 2014
Scalable Systems Research Labs, Inc. March 2014 - July 2014
Amazon lab126 June 2013 - December 2013
QuadVision January 2010 - December 2011
PayPal September 2009 - January 2010
Skills
Verilog, C, VLSI, Logic Design, Matlab, DSP, Agile Methodologies, C++, Mentor Graphics, MIPS Architecture, FPGA, I2C, ASIC, QPST, AXI, QXDM, System verilog, Formality, Vcs, Design Compiler, Lattice Diamond Software, PMIC, SPI, Perl, soc, RTL design, RTL verification, Design complier, Xilinx ISE, systemVerilog, VHDL, Computer Architecture, OCP, HLS, SystemVerilog, SoC, Digital Signal...
Education
Santa Clara University 2012 — 2014
Master's degree, Computer Engineering in VLSI
Visvesvaraya Technological University 2006 — 2009
Bachelor's degree, Electrical, Electronics and Communications Engineering
Government Polytechnic for Women's 2003 — 2006
Diploma, Electronics and Communication
Scared Heart School 1993 — 2003
10th
University of California, Santa Cruz(Extension)
Scalable Systems Research Labs Inc. July 2015 - Present
Barnes & Noble August 2013 - March 2015
San Jose State University February 2013 - December 2013
Barnes & Noble January 2013 - February 2013
Skills
Cadence, Matlab, Pspice, C, Verilog, Mixed Signal, C++, ModelSim, Xilinx ISE, Cadence Virtuoso, VLSI, Xilinx, VHDL, ASIC, Verilog-A, LabVIEW, PSpice, CMOS, RF, Microsoft Word, Microsoft Excel, Microsoft Office, Linux, Circuit Design, Perl, Analog Circuit Design, Simulations, Analog, Simulink, Cadence Spectre
Education
San Jose State University 2012 — 2015
Master’s Degree, Electrical Engineering, 3.12
University of Mumbai 2008 — 2012
Bachelor of Engineering (B.E.), Electronics and Telecommunication Engineering, 3.31