Cadence Design Systems
Industry: Software company
DescriptionCadence Design Systems, Inc. is an American multinational electronic design automation software and engineering services company, founded in 1988 by the merger of SDA Systems and ECAD, Inc. CEO: Lip-Bu Tan (Jan 2009–) Headquarters: San Jose, California, United States Revenue: 1.816 billion USD (2016) Subsidiaries: Sigrity, Tensilica, Chip Estimate Corp, nusemi inc,
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Cadence Design Systems Employees
Employee
Years
Job
Industry
Marcus da Mata Marcus da Mata's Cadence Design Systems Experience July 2015 - Present
Job Lead Application Engineer at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems July 2015 - Present
Cadence Design Systems September 2014 - June 2015
Jasper Design Automation February 2014 - August 2014
Jasper Design Automation September 2013 - January 2014
Jasper Design Automation March 2012 - August 2013
Skills
Formal Verification, Verilog, Hardware, TCL, Bash, C++, Programming, C, Java, Linux, Matlab, LaTeX, Python, Debugging, Software Engineering
Education
Centro Federal de Educação Tecnológica de Minas Gerais 2008 — 2013
Bachelor's degree, Computer Engineering
Cadence Design Systems July 2015 - Present
Cadence Design Systems September 2014 - June 2015
Jasper Design Automation February 2014 - August 2014
Jasper Design Automation September 2013 - January 2014
Jasper Design Automation March 2012 - August 2013
Skills
Formal Verification, Verilog, Hardware, TCL, Bash, C++, Programming, C, Java, Linux, Matlab, LaTeX, Python, Debugging, Software Engineering
Education
Centro Federal de Educação Tecnológica de Minas Gerais 2008 — 2013
Bachelor's degree, Computer Engineering
Steffen Rochel Steffen Rochel's Cadence Design Systems Experience April 2002 - November 2006
Job Engineering Executive exploring new opportunities
Industry Computer Software
Experience
Coverity June 2015 - Present
Tabula, Inc. September 2012 - March 2015
Tabula, Inc. October 2009 - September 2012
Sustainable Silicon Valley 2008 - 2009
Blaze DFM November 2006 - December 2008
Cadence Design Systems April 2002 - November 2006
Simplex Solutions, Inc. 1996 - 2002
Anacad 1994 - 1999
Skills
EDA, Semiconductors, Executive Management, Software Development, Cross-functional Team..., Strategic Planning, Software Project..., FPGA, ASIC, Product Management, Verilog, Simulations, C++, SoC, Leadership Development, IC, Algorithms, Team Building, Product Development, Engineering, Leadership, Linux, Project Management, Start-ups, Management, Project Planning, Quality Management, User Interface Design, Signal Integrity, Reliability, Software Engineering, Software Quality..., Timing Closure, High Performance Teams, High Performance..., Perl, Python, TCL, Circuit Design, Strategy, New Business Development, Program Management, Data Analysis, Data Modeling
Education
Presidio 2008 — 2009
Executive Certification in Sustainable Management, Sustainable Management
Technische Universität Ilmenau 1988 — 1992
PhD, Electrical Engineering
Coverity June 2015 - Present
Tabula, Inc. September 2012 - March 2015
Tabula, Inc. October 2009 - September 2012
Sustainable Silicon Valley 2008 - 2009
Blaze DFM November 2006 - December 2008
Cadence Design Systems April 2002 - November 2006
Simplex Solutions, Inc. 1996 - 2002
Anacad 1994 - 1999
Skills
EDA, Semiconductors, Executive Management, Software Development, Cross-functional Team..., Strategic Planning, Software Project..., FPGA, ASIC, Product Management, Verilog, Simulations, C++, SoC, Leadership Development, IC, Algorithms, Team Building, Product Development, Engineering, Leadership, Linux, Project Management, Start-ups, Management, Project Planning, Quality Management, User Interface Design, Signal Integrity, Reliability, Software Engineering, Software Quality..., Timing Closure, High Performance Teams, High Performance..., Perl, Python, TCL, Circuit Design, Strategy, New Business Development, Program Management, Data Analysis, Data Modeling
Education
Presidio 2008 — 2009
Executive Certification in Sustainable Management, Sustainable Management
Technische Universität Ilmenau 1988 — 1992
PhD, Electrical Engineering
Bruce Braidek Bruce Braidek's Cadence Design Systems Experience 1998 - 2001
Job Embedded Software Developer
Industry Computer Software
Experience
AMD 2005 - 2010
Terayon 2001 - 2005
Cadence Design Systems 1998 - 2001
Skills
Windows, Linux/Unix, C, C++, Assembly, TCP/IP, SNMP, HTTP,..., ARM, MIPS, SHARC, Logic Analyser,..., Perforce, CVS, TeamTrack, Debugging, Embedded Systems, Embedded Software, Digital Signal..., Testing, Digital TV, Processors, VxWorks
Education
Algonquin College of Applied Arts and Technology 1994 — 1997
3 yr, Computer Engineering
AMD 2005 - 2010
Terayon 2001 - 2005
Cadence Design Systems 1998 - 2001
Skills
Windows, Linux/Unix, C, C++, Assembly, TCP/IP, SNMP, HTTP,..., ARM, MIPS, SHARC, Logic Analyser,..., Perforce, CVS, TeamTrack, Debugging, Embedded Systems, Embedded Software, Digital Signal..., Testing, Digital TV, Processors, VxWorks
Education
Algonquin College of Applied Arts and Technology 1994 — 1997
3 yr, Computer Engineering
Usama Zaghloul Usama Zaghloul's Cadence Design Systems Experience March 2006 - June 2006
Job Research Scientist at Carnegie Mellon University; Seeking a position in MEMS/Semiconductors
Industry Semiconductors
Experience
Carnegie Mellon University November 2013 - Present
Carnegie Mellon University August 2012 - October 2013
University of Pennsylvania November 2011 - August 2012
LAAS-CNRS January 2008 - October 2011
SoftMEMS July 2006 - January 2008
Cadence Design Systems March 2006 - June 2006
Central Electronics Engineering Research Institute (CEERI-Pilani) June 2005 - January 2006
Electronics Research Institute December 2003 - May 2005
Skills
Micro-fabrication..., Nanoscale/macroscale..., Thin film synthesis and..., M/NEMS design,..., EDA tools for MEMS and..., MEMS, Matlab, Sensors, FPGA, Analog, IC, Integrated Circuit..., Characterization, Simulations, Thin Films, Microfabrication, Physics, Silicon, COMSOL
Education
The University of Toulouse, France, jointly with The Ohio State University, USA 2008 — 2011
Doctor of Philosophy (PhD), Electrical, Electronics and Telecommunication Engineering
Ain Shams University 2003 — 2006
M.Sc., Microelectronics and Telecommunication Engineering
Information Technology Institute, Cairo, Egypt 2004 — 2005
Professional Diploma, Integrated circuits (IC) design and CAD tools development
Faculty of Electronics Engineering, Menoufia University, Egypt 1997 — 2002
B.Sc., Electrical, Electronics and Telecommunication Engineering
Carnegie Mellon University November 2013 - Present
Carnegie Mellon University August 2012 - October 2013
University of Pennsylvania November 2011 - August 2012
LAAS-CNRS January 2008 - October 2011
SoftMEMS July 2006 - January 2008
Cadence Design Systems March 2006 - June 2006
Central Electronics Engineering Research Institute (CEERI-Pilani) June 2005 - January 2006
Electronics Research Institute December 2003 - May 2005
Skills
Micro-fabrication..., Nanoscale/macroscale..., Thin film synthesis and..., M/NEMS design,..., EDA tools for MEMS and..., MEMS, Matlab, Sensors, FPGA, Analog, IC, Integrated Circuit..., Characterization, Simulations, Thin Films, Microfabrication, Physics, Silicon, COMSOL
Education
The University of Toulouse, France, jointly with The Ohio State University, USA 2008 — 2011
Doctor of Philosophy (PhD), Electrical, Electronics and Telecommunication Engineering
Ain Shams University 2003 — 2006
M.Sc., Microelectronics and Telecommunication Engineering
Information Technology Institute, Cairo, Egypt 2004 — 2005
Professional Diploma, Integrated circuits (IC) design and CAD tools development
Faculty of Electronics Engineering, Menoufia University, Egypt 1997 — 2002
B.Sc., Electrical, Electronics and Telecommunication Engineering
Sachin Dhingra Sachin Dhingra's Cadence Design Systems Experience July 2015 - Present
Job Senior Product Marketing Manager at Cadence Design Systems
Industry Computer Hardware
Experience
Cadence Design Systems July 2015 - Present
Achronix Semiconductor December 2012 - May 2015
Altera March 2012 - December 2012
Altera March 2010 - February 2012
Altera November 2008 - February 2010
Altera Corp. June 2006 - October 2008
Auburn University August 2004 - May 2006
EPM Global Services Inc. November 2003 - August 2004
Skills
Product Management, Product Marketing, Business Development, Strategic Partnerships, Business Strategy, Customer Engagement, Engineering, Hardware, Product Planning, Project Management, SERDES, Semiconductors, Electrical Engineering, Organization Skills, Customer Support, Strategic Negotiations, Vendor Management, Static Timing Analysis, Processors, Digital Signal..., Competitive Analysis, Cross-functional Team..., Technical Support
Education
Auburn University 2004 — 2006
Master of Science (MS), Electrical and Computer Engineering
Maharashtra Institute of Technology 1999 — 2003
Bachelor of Science (BS), Electronics and Telecommunications Engineering
Cadence Design Systems July 2015 - Present
Achronix Semiconductor December 2012 - May 2015
Altera March 2012 - December 2012
Altera March 2010 - February 2012
Altera November 2008 - February 2010
Altera Corp. June 2006 - October 2008
Auburn University August 2004 - May 2006
EPM Global Services Inc. November 2003 - August 2004
Skills
Product Management, Product Marketing, Business Development, Strategic Partnerships, Business Strategy, Customer Engagement, Engineering, Hardware, Product Planning, Project Management, SERDES, Semiconductors, Electrical Engineering, Organization Skills, Customer Support, Strategic Negotiations, Vendor Management, Static Timing Analysis, Processors, Digital Signal..., Competitive Analysis, Cross-functional Team..., Technical Support
Education
Auburn University 2004 — 2006
Master of Science (MS), Electrical and Computer Engineering
Maharashtra Institute of Technology 1999 — 2003
Bachelor of Science (BS), Electronics and Telecommunications Engineering
Imran Lanker Imran Lanker's Cadence Design Systems Experience April 2004 - July 2007
Job PDE
Industry Electrical/Electronic Manufacturing
Experience
Intel Corporation April 2010 - Present
Arizona State University January 2008 - May 2009
Freescale Semiconductor May 2008 - August 2008
Cadence Design Systems April 2004 - July 2007
Skills
Cadence Virtuoso, Verilog, Mixed Signal, VLSI, Integrated Circuit..., Circuit Design
Education
Arizona State University 2007 — 2009
MSEE, Analog and Mixed-Signal Circuit Designing
Jamia Millia Islamia 1999 — 2003
BSEE, Electronics and Communication Engineering
Intel Corporation April 2010 - Present
Arizona State University January 2008 - May 2009
Freescale Semiconductor May 2008 - August 2008
Cadence Design Systems April 2004 - July 2007
Skills
Cadence Virtuoso, Verilog, Mixed Signal, VLSI, Integrated Circuit..., Circuit Design
Education
Arizona State University 2007 — 2009
MSEE, Analog and Mixed-Signal Circuit Designing
Jamia Millia Islamia 1999 — 2003
BSEE, Electronics and Communication Engineering
Govindarajan Natarajan Govindarajan Natarajan's Cadence Design Systems Experience May 2004 - 2005
Job Senior Staff at Samsung Semiconductor Inc.,
Industry Semiconductors
Experience
Samsung Semiconductor, Inc. March 2014 - Present
Synapse Design Automation Inc. February 2010 - March 2014
Cypress Semiconductor November 2008 - 2009
Tallika Technologies April 2007 - October 2008
Texas Instruments April 2005 - March 2007
Cadence Design Systems May 2004 - 2005
Magma Design Automation July 2003 - May 2004
Rendezvous On Chip / V-Design September 1998 - July 2003
Skills
Physical Design, Timing Closure, Low Power, IP, SOC, Physical Verification, IR drop, In-Rush Current Analysis, Power EM & Signal EM, Redhawk Analysis on..., STA, VLSI, ASIC, SoC, Static Timing Analysis, Low-power Design, TCL, IC, RTL coding, Place & Route, Magma, Cadence, Clock Tree Synthesis, RTL design, Integrated Circuit..., Verilog, DFT, Hercules, Perl, Compilers, Primetime, LVS, Floorplanning, EDA, SystemVerilog, DRC, Logic Synthesis, RTL Design
Education
Anna University
BE, Electronics & Communication Engineering
Central Polytechnic
DECE, Electronics & Communication Engg
Samsung Semiconductor, Inc. March 2014 - Present
Synapse Design Automation Inc. February 2010 - March 2014
Cypress Semiconductor November 2008 - 2009
Tallika Technologies April 2007 - October 2008
Texas Instruments April 2005 - March 2007
Cadence Design Systems May 2004 - 2005
Magma Design Automation July 2003 - May 2004
Rendezvous On Chip / V-Design September 1998 - July 2003
Skills
Physical Design, Timing Closure, Low Power, IP, SOC, Physical Verification, IR drop, In-Rush Current Analysis, Power EM & Signal EM, Redhawk Analysis on..., STA, VLSI, ASIC, SoC, Static Timing Analysis, Low-power Design, TCL, IC, RTL coding, Place & Route, Magma, Cadence, Clock Tree Synthesis, RTL design, Integrated Circuit..., Verilog, DFT, Hercules, Perl, Compilers, Primetime, LVS, Floorplanning, EDA, SystemVerilog, DRC, Logic Synthesis, RTL Design
Education
Anna University
BE, Electronics & Communication Engineering
Central Polytechnic
DECE, Electronics & Communication Engg
Tiina Korhonen Tiina Korhonen's Cadence Design Systems Experience November 2005 - February 2006
Job Dynamic Marketing Communications Professional with international experience
Industry Marketing and Advertising
Experience
Kuehne + Nagel June 2015 - Present
StaffPoint Oy March 2014 - May 2015
Kiinteistömaailma February 2010 - January 2014
Tecnomen February 2009 - December 2009
Ixonos March 2006 - July 2008
Cadence Design Systems November 2005 - February 2006
Suomen Asumisoikeus Oy May 2004 - October 2005
The Finnish Association of Algarve November 2003 - March 2004
Skills
Marketing Communications, Marketing, Sales, Marketing Management, Marketing Strategy, Brand Management, Online Marketing, Corporate Communications, Social Media Marketing, Press Releases, Management, Project Planning, Internal Communications, English, French, Retail, Real Estate, InDesign, International Business, Social Media, Photoshop, Communication, Digital Marketing, Event Management, Project Management, Online Advertising, Executive..., Corporate Events
Education
Turun yliopisto 2006 — 2009
Master of Science (Economics), Marketing and Retail/Services Management
Markkinointi Instituutti 2014 — 2014
Social Media Marketing, Communications
University of Helsinki
French Language and Literature studies
HAAGA-HELIA University of Applied Sciences 2012 — 2013
Specialization Studies in Organizational Communication, Business/Corporate Communications
Project Management Association Finland 2010 — 2010
IPMA Certification (D-level), Project Management
Hogeschool van Arnhem en Nijmegen
Bachelor's Degree, International Business
Helsingin normaalilyseo High School
High School
Kuehne + Nagel June 2015 - Present
StaffPoint Oy March 2014 - May 2015
Kiinteistömaailma February 2010 - January 2014
Tecnomen February 2009 - December 2009
Ixonos March 2006 - July 2008
Cadence Design Systems November 2005 - February 2006
Suomen Asumisoikeus Oy May 2004 - October 2005
The Finnish Association of Algarve November 2003 - March 2004
Skills
Marketing Communications, Marketing, Sales, Marketing Management, Marketing Strategy, Brand Management, Online Marketing, Corporate Communications, Social Media Marketing, Press Releases, Management, Project Planning, Internal Communications, English, French, Retail, Real Estate, InDesign, International Business, Social Media, Photoshop, Communication, Digital Marketing, Event Management, Project Management, Online Advertising, Executive..., Corporate Events
Education
Turun yliopisto 2006 — 2009
Master of Science (Economics), Marketing and Retail/Services Management
Markkinointi Instituutti 2014 — 2014
Social Media Marketing, Communications
University of Helsinki
French Language and Literature studies
HAAGA-HELIA University of Applied Sciences 2012 — 2013
Specialization Studies in Organizational Communication, Business/Corporate Communications
Project Management Association Finland 2010 — 2010
IPMA Certification (D-level), Project Management
Hogeschool van Arnhem en Nijmegen
Bachelor's Degree, International Business
Helsingin normaalilyseo High School
High School
Bhushan Talele Bhushan Talele's Cadence Design Systems Experience July 2013 - July 2015
Job Graduate Student at Arizona State University
Industry Semiconductors
Experience
Cadence Design Systems July 2013 - July 2015
Cosmic Circuits July 2012 - December 2012
Canopus Instruments May 2011 - July 2011
Education
Arizona State University 2015 — 2017
Master of Science (MS), Electrical Engineering
Birla Institute of Technology and Science, Pilani 2009 — 2013
Bachelor of Engineering (B.E.) (Hons.), Electrical and Electronics Engineering
M.H. High School and Junior College, Thane 2007 — 2009
Higher Secondary Certificate (HSC)
Sri Ma Bal Niketan High School and Junior College 1998 — 2007
Secondary School Certificate (SSC)
Cadence Design Systems July 2013 - July 2015
Cosmic Circuits July 2012 - December 2012
Canopus Instruments May 2011 - July 2011
Education
Arizona State University 2015 — 2017
Master of Science (MS), Electrical Engineering
Birla Institute of Technology and Science, Pilani 2009 — 2013
Bachelor of Engineering (B.E.) (Hons.), Electrical and Electronics Engineering
M.H. High School and Junior College, Thane 2007 — 2009
Higher Secondary Certificate (HSC)
Sri Ma Bal Niketan High School and Junior College 1998 — 2007
Secondary School Certificate (SSC)
Alika Tuiolosega Alika Tuiolosega's Cadence Design Systems Experience July 1997 - October 2001
Job Buyer Coordinator at Complete Genomics Inc.
Industry Pharmaceuticals
Experience
Complete Genomics Inc. February 2014 - Present
Genentech via RenderSoft Inc. August 2012 - December 2013
DURECT Corporation 2010 - 2012
Thermo Fisher Scientific June 2006 - April 2009
Accountemps July 2005 - June 2006
Duke Scientific(Accountemps) 2005 - 2006
Cadence Design Systems July 1997 - October 2001
Skills
Procurement, MRP, Supply Management, Materials Management, Strategic Sourcing, Global Sourcing, Cross-functional Team..., Process Improvement, Budgets, Sourcing, Quality System, Biotechnology, Team Leadership, Inventory Control, Auditing
Education
CET-Sobrato 2004 — 2005
Diploma, Accounting and Business/Management
Institute for Business and Technology 1991 — 1992
Diploma, Business/Electronics
Complete Genomics Inc. February 2014 - Present
Genentech via RenderSoft Inc. August 2012 - December 2013
DURECT Corporation 2010 - 2012
Thermo Fisher Scientific June 2006 - April 2009
Accountemps July 2005 - June 2006
Duke Scientific(Accountemps) 2005 - 2006
Cadence Design Systems July 1997 - October 2001
Skills
Procurement, MRP, Supply Management, Materials Management, Strategic Sourcing, Global Sourcing, Cross-functional Team..., Process Improvement, Budgets, Sourcing, Quality System, Biotechnology, Team Leadership, Inventory Control, Auditing
Education
CET-Sobrato 2004 — 2005
Diploma, Accounting and Business/Management
Institute for Business and Technology 1991 — 1992
Diploma, Business/Electronics
Wei-Lin Tsai Wei-Lin Tsai's Cadence Design Systems Experience March 2014 - July 2014
Job Actively Seeking Fulltime Software Engineer Opportunity
Industry Computer Software
Experience
WANdisco June 2015 - August 2015
Cadence Design Systems March 2014 - July 2014
MediaTek November 2010 - June 2013
TSMC October 2009 - October 2010
Skills
C++, C, Java, JUnit, Android, Debugging, Hadoop, HBase, Mockito, Functional Verification, Perl, Linux, Git, Csh, Tcl-Tk, VB, SoC, SystemVerilog, Semiconductors, VLSI, UVM, Yacc, Lex, OOP, Algorithms
Education
Carnegie Mellon University, Silicon Valley 2014 — 2015
Master of Science (MS), Computer Software Engineering, 3.95
National Taiwan University 2007 — 2009
Master of Science (MS), EDA, Electronics Engineering, 4.0
National Taiwan University 2003 — 2007
Bachelor of Science (BS), Computer Science
WANdisco June 2015 - August 2015
Cadence Design Systems March 2014 - July 2014
MediaTek November 2010 - June 2013
TSMC October 2009 - October 2010
Skills
C++, C, Java, JUnit, Android, Debugging, Hadoop, HBase, Mockito, Functional Verification, Perl, Linux, Git, Csh, Tcl-Tk, VB, SoC, SystemVerilog, Semiconductors, VLSI, UVM, Yacc, Lex, OOP, Algorithms
Education
Carnegie Mellon University, Silicon Valley 2014 — 2015
Master of Science (MS), Computer Software Engineering, 3.95
National Taiwan University 2007 — 2009
Master of Science (MS), EDA, Electronics Engineering, 4.0
National Taiwan University 2003 — 2007
Bachelor of Science (BS), Computer Science
Saktiswarup Satapathy Saktiswarup Satapathy's Cadence Design Systems Experience August 2010 - March 2011
Job Graduate Research Associate at Arizona State University
Industry Semiconductors
Experience
Cirrus Logic May 2015 - August 2015
Qualcomm January 2013 - July 2014
Texas Instruments April 2011 - January 2013
Cadence Design Systems August 2010 - March 2011
Skills
DFT, Verilog, Static Timing Analysis, Functional Verification, Perl, SoC, VLSI, ATPG, Unix, JTAG, ASIC, C, SystemVerilog, Debugging, RTL Design, EDA
Education
Arizona State University 2014 — 2016
Master's Degree, Computer Engineering, 4.00
National Institute of Technology,Jamshedpur 2006 — 2010
B.Tech, Electronics and Communication Engineering, 86.8 %
J.K.B.K Junior college,Cuttack
XII, Science(Physics, Chemistry, Maths), 85 %
Cirrus Logic May 2015 - August 2015
Qualcomm January 2013 - July 2014
Texas Instruments April 2011 - January 2013
Cadence Design Systems August 2010 - March 2011
Skills
DFT, Verilog, Static Timing Analysis, Functional Verification, Perl, SoC, VLSI, ATPG, Unix, JTAG, ASIC, C, SystemVerilog, Debugging, RTL Design, EDA
Education
Arizona State University 2014 — 2016
Master's Degree, Computer Engineering, 4.00
National Institute of Technology,Jamshedpur 2006 — 2010
B.Tech, Electronics and Communication Engineering, 86.8 %
J.K.B.K Junior college,Cuttack
XII, Science(Physics, Chemistry, Maths), 85 %
Paparao Kavalipati Paparao Kavalipati's Cadence Design Systems Experience 1995 - 1997
Job Software Architect
Industry Computer Software
Experience
Tabula Inc 2013 - 2015
Ausdia Inc. 2011 - 2012
Mentor Graphics 2005 - 2011
Synopsys 1997 - 2005
Cadence Design Systems 1995 - 1997
Skills
EDA, Formal Verification, Static Timing Analysis, SystemVerilog, Verilog, Logic Synthesis, VHDL, ASIC, TCL, Simulations, Functional Verification, RTL design, VLSI, FPGA, Integrated Circuit..., IC, RTL Design, C++
Education
Indian Institute of Science 1993 — 1995
MS, EE
Andhra University 1984 — 1988
BE, EE
Tabula Inc 2013 - 2015
Ausdia Inc. 2011 - 2012
Mentor Graphics 2005 - 2011
Synopsys 1997 - 2005
Cadence Design Systems 1995 - 1997
Skills
EDA, Formal Verification, Static Timing Analysis, SystemVerilog, Verilog, Logic Synthesis, VHDL, ASIC, TCL, Simulations, Functional Verification, RTL design, VLSI, FPGA, Integrated Circuit..., IC, RTL Design, C++
Education
Indian Institute of Science 1993 — 1995
MS, EE
Andhra University 1984 — 1988
BE, EE
Jaspreet Kaur Sahota Jaspreet Kaur Sahota's Cadence Design Systems Experience February 2011 - August 2012
Job FPGA Solution Engineer
Industry Semiconductors
Experience
Intel Corporation July 2015 - Present
Broadcom June 2015 - June 2015
Microchip Technology May 2014 - August 2014
Cadence Design Systems February 2011 - August 2012
STMicroelectronics July 2006 - January 2011
Skills
Configuration Management, Scripting, Shell Scripting, Perl, TCL, IP Packaging, HTML, CSS, JavaScript, Perforce, CVS, ClearCase, Design Sync, Synchronicity, Lef & FRAM generation, Cygwin, Visual Studio, Keil, C++, C, x86 Assembly, Python, Verilog, SoC, Physical Design, Celtic, CSV, EDA, Static Timing Analysis, Linux
Education
Arizona State University 2013 — 2015
Master's Degree, Electrical and Electronics Engineering, 3.91
The Institution of Engineers 2007 — 2010
BTech, Electronics & Communication Engineering, 7.56 CGPA
Meerabai Institute of Technology 2003 — 2006
Diploma, Electronics & Communication Engineering, 81.4
Intel Corporation July 2015 - Present
Broadcom June 2015 - June 2015
Microchip Technology May 2014 - August 2014
Cadence Design Systems February 2011 - August 2012
STMicroelectronics July 2006 - January 2011
Skills
Configuration Management, Scripting, Shell Scripting, Perl, TCL, IP Packaging, HTML, CSS, JavaScript, Perforce, CVS, ClearCase, Design Sync, Synchronicity, Lef & FRAM generation, Cygwin, Visual Studio, Keil, C++, C, x86 Assembly, Python, Verilog, SoC, Physical Design, Celtic, CSV, EDA, Static Timing Analysis, Linux
Education
Arizona State University 2013 — 2015
Master's Degree, Electrical and Electronics Engineering, 3.91
The Institution of Engineers 2007 — 2010
BTech, Electronics & Communication Engineering, 7.56 CGPA
Meerabai Institute of Technology 2003 — 2006
Diploma, Electronics & Communication Engineering, 81.4
Marcin Rogawski Marcin Rogawski's Cadence Design Systems Experience October 2014 - Present
Job R&D at Cadence
Industry Computer Hardware
Experience
Cadence Design Systems October 2014 - Present
Cadence Design Systems September 2013 - October 2014
George Mason University August 2009 - April 2014
Université Jean Monnet Saint Etienne May 2009 - June 2009
George Mason University August 2008 - May 2009
FileMedic September 2007 - August 2008
Asseco Poland (Former Prokom Software SA) January 2004 - September 2007
Asseco Poland (Former Prokom Software SA) September 2003 - September 2007
Polish Army and Polish Ministry of Defense August 2003 - December 2003
Wojskowa Akademia Techniczna August 2002 - September 2002
Skills
Hardware Emulation, Applied Mathematics, Creative Problem Solving, Creativity Skills, Learning Quickly, Applied Cryptography, VHDL, FPGA, Computer Architecture, Linux, Cryptography, Embedded Systems, Hardware Architecture, C, ASIC, Algorithms, C++, Verilog, ModelSim, Perl, Programming, Microprocessors, Operating Systems, Matlab, Simulations, Python, Signal Processing, Java, Hardware, RTL design, Microcontrollers, Digital Signal..., Software Engineering, Public Key Cryptography, TCL, Embedded Software, Subversion, Circuit Design, Assembly Language, Unix, Research, Shell Scripting, Computer Arithmetic, GCC, ECC, Object Oriented Modeling, PowerPC, Mac OS, Creativity
Education
George Mason University 2008 — 2013
Doctor of Philosophy (PhD)
Wojskowa Akademia Techniczna w Warszawie 1998 — 2003
Master of Science (MSc)
Cadence Design Systems October 2014 - Present
Cadence Design Systems September 2013 - October 2014
George Mason University August 2009 - April 2014
Université Jean Monnet Saint Etienne May 2009 - June 2009
George Mason University August 2008 - May 2009
FileMedic September 2007 - August 2008
Asseco Poland (Former Prokom Software SA) January 2004 - September 2007
Asseco Poland (Former Prokom Software SA) September 2003 - September 2007
Polish Army and Polish Ministry of Defense August 2003 - December 2003
Wojskowa Akademia Techniczna August 2002 - September 2002
Skills
Hardware Emulation, Applied Mathematics, Creative Problem Solving, Creativity Skills, Learning Quickly, Applied Cryptography, VHDL, FPGA, Computer Architecture, Linux, Cryptography, Embedded Systems, Hardware Architecture, C, ASIC, Algorithms, C++, Verilog, ModelSim, Perl, Programming, Microprocessors, Operating Systems, Matlab, Simulations, Python, Signal Processing, Java, Hardware, RTL design, Microcontrollers, Digital Signal..., Software Engineering, Public Key Cryptography, TCL, Embedded Software, Subversion, Circuit Design, Assembly Language, Unix, Research, Shell Scripting, Computer Arithmetic, GCC, ECC, Object Oriented Modeling, PowerPC, Mac OS, Creativity
Education
George Mason University 2008 — 2013
Doctor of Philosophy (PhD)
Wojskowa Akademia Techniczna w Warszawie 1998 — 2003
Master of Science (MSc)
Rajanikanth Kovvuri Rajanikanth Kovvuri's Cadence Design Systems Experience July 2013 - Present
Job Principal Program Manager at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems July 2013 - Present
DynaVox Technologies September 2009 - June 2013
Thales Avionics July 2007 - October 2009
Medigration GmbH, Germany August 2006 - April 2007
Fraunhofer IIS, Erlangen, Germany August 2005 - June 2006
Advanced Mask Technology Center 2004 - 2004
Skills
Software Project..., Program Management, XML, Microsoft SQL Server, ASP.NET, Project Management, Software Product..., UML, Client/server, ASP.NET MVC, C#, IIS, Risk Management, C++, Software Engineering, Windows
Education
Hochschule Karlsruhe - Technik und Wirtschaft 2003 — 2006
Master of Science, Industrial Automation, Software Engineering, Image and Signal Processing, Sensorics
Jawaharlal Nehru Technological University 1998 — 2002
Bachelors, Electrical and Electronics Engg
Little Flower Jr College 1996 — 1998
Don Bosco High Scool 1986 — 1996
Schooling, Schooling
Cadence Design Systems July 2013 - Present
DynaVox Technologies September 2009 - June 2013
Thales Avionics July 2007 - October 2009
Medigration GmbH, Germany August 2006 - April 2007
Fraunhofer IIS, Erlangen, Germany August 2005 - June 2006
Advanced Mask Technology Center 2004 - 2004
Skills
Software Project..., Program Management, XML, Microsoft SQL Server, ASP.NET, Project Management, Software Product..., UML, Client/server, ASP.NET MVC, C#, IIS, Risk Management, C++, Software Engineering, Windows
Education
Hochschule Karlsruhe - Technik und Wirtschaft 2003 — 2006
Master of Science, Industrial Automation, Software Engineering, Image and Signal Processing, Sensorics
Jawaharlal Nehru Technological University 1998 — 2002
Bachelors, Electrical and Electronics Engg
Little Flower Jr College 1996 — 1998
Don Bosco High Scool 1986 — 1996
Schooling, Schooling
Manadher Kharroubi Manadher Kharroubi's Cadence Design Systems Experience November 2014 - Present
Job Sr. Principal Software Engineer at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems November 2014 - Present
Altera July 2012 - November 2014
AMD October 2010 - April 2012
NVIDIA February 2008 - October 2010
Knowlent Corp July 2007 - January 2008
Synopsys Inc June 2002 - July 2007
AVANT! Corp April 2001 - June 2002
University of Montreal September 1998 - December 2000
Skills
Verilog, TCL, EDA, Compilers, SystemVerilog, Algorithms, Data Structures, C++, Functional Verification, Perl, C, CUDA, OOP, Mathematics, VMM, CAD, Yacc, Multithreading, Linux, Unix, Lex, VHDL, Firmware, Formal Verification, Static Timing Analysis, Logic Synthesis, Debugging, Software Development, ASIC, Semiconductors, Processors, Microprocessors, SoC, FPGA, Device Drivers, RTL design, VLSI, Embedded Systems, Computer Architecture, Software Engineering, Python, Testing
Education
Université de Montréal 1998 — 2000
Master in Science, Computer Science
Université de Tunis 1992 — 1995
Diploma Specialized studies, Logic and Computer Science Mathematic Fundamentals
Université de Tunis 1990 — 1992
Master Degree of Sciences, Mathematics
Universite de Tunis 1988 — 1990
University Diploma, Scientific Studies (Mathematics & Physics
Cadence Design Systems November 2014 - Present
Altera July 2012 - November 2014
AMD October 2010 - April 2012
NVIDIA February 2008 - October 2010
Knowlent Corp July 2007 - January 2008
Synopsys Inc June 2002 - July 2007
AVANT! Corp April 2001 - June 2002
University of Montreal September 1998 - December 2000
Skills
Verilog, TCL, EDA, Compilers, SystemVerilog, Algorithms, Data Structures, C++, Functional Verification, Perl, C, CUDA, OOP, Mathematics, VMM, CAD, Yacc, Multithreading, Linux, Unix, Lex, VHDL, Firmware, Formal Verification, Static Timing Analysis, Logic Synthesis, Debugging, Software Development, ASIC, Semiconductors, Processors, Microprocessors, SoC, FPGA, Device Drivers, RTL design, VLSI, Embedded Systems, Computer Architecture, Software Engineering, Python, Testing
Education
Université de Montréal 1998 — 2000
Master in Science, Computer Science
Université de Tunis 1992 — 1995
Diploma Specialized studies, Logic and Computer Science Mathematic Fundamentals
Université de Tunis 1990 — 1992
Master Degree of Sciences, Mathematics
Universite de Tunis 1988 — 1990
University Diploma, Scientific Studies (Mathematics & Physics
Prasanthi Yelamarthy Prasanthi Yelamarthy's Cadence Design Systems Experience August 2015 - Present
Job Design Engineering Intern at Cadence Design Systems
Industry Higher Education
Experience
Cadence Design Systems August 2015 - Present
Electronics Corporation of India Limited May 2013 - June 2013
Bharat Sanchar Nigam Limited June 2012 - June 2012
Skills
Verilog, RTL Design, VLSI, C++, C, Teamwork, Matlab, Research, English, HTML, Team Leadership, Microsoft Excel
Education
Arizona State University 2014 — 2016
Master's Degree, Electrical and Electronics Engineering
Gitam University 2010 — 2014
Bachelor's Degree, Electrical, Electronics and Communications Engineering
Cadence Design Systems August 2015 - Present
Electronics Corporation of India Limited May 2013 - June 2013
Bharat Sanchar Nigam Limited June 2012 - June 2012
Skills
Verilog, RTL Design, VLSI, C++, C, Teamwork, Matlab, Research, English, HTML, Team Leadership, Microsoft Excel
Education
Arizona State University 2014 — 2016
Master's Degree, Electrical and Electronics Engineering
Gitam University 2010 — 2014
Bachelor's Degree, Electrical, Electronics and Communications Engineering
Jack Bartell Jack Bartell's Cadence Design Systems Experience February 1995 - Present
Job Group Director, Cadence Sales North America
Industry Computer Software
Experience
Cadence Design Systems February 1995 - Present
Cadence Design Systems February 1995 - Present
Cadence 2005 - 2009
Education
Arizona State University - W. P. Carey School of Business 1985 — 1990
B.S.BA, Marketing, Finance, Economics
Cadence Design Systems February 1995 - Present
Cadence Design Systems February 1995 - Present
Cadence 2005 - 2009
Education
Arizona State University - W. P. Carey School of Business 1985 — 1990
B.S.BA, Marketing, Finance, Economics
Ramesh Dewangan Ramesh Dewangan's Cadence Design Systems Experience March 2004 - February 2006
Job Vice President, Product Strategy and Business Development at Real Intent
Industry Computer Software
Experience
Real Intent November 2014 - Present
Real Intent February 2014 - October 2014
Toastmasters International July 2013 - June 2014
Atrenta Inc. February 2006 - January 2014
Toastmasters International July 2008 - June 2009
Cadence Design Systems March 2004 - February 2006
Tera Systems February 2002 - March 2003
Synopsys March 1998 - December 2002
Synopsys July 1996 - March 1998
Texas Instruments October 1985 - June 1995
Skills
Product Management, Product Marketing, EDA, IC Design, Operations Management, International Management, Public Speaking, People Management, Software Product..., VLSI, Physical Design, IP design, ASIC, General Management, Customer Relations, RTL design, Community Leadership, SoC, Semiconductors, Engineering Management, Program Management, Cross-functional Team..., IC, Product Launch, Product Strategy, Team Leadership, IP, Management, Business Development, Software Development, Competitive Analysis, Product Development, CRM, Go-to-market Strategy, Business Strategy, Pre-sales, Strategic Partnerships, Technical Marketing, Start-ups, Leadership Development, Enterprise Software, Leadership, Communication, Management Consulting, Project Management, Marketing, Integrated Circuit..., RTL Design, Customer Service
Education
University of California, Berkeley - Walter A. Haas School of Business 2000 — 2003
MBA, Marketing
Annamalai University 1992 — 1994
PGDBA, Business Administration
Indian Institute of Technology, Madras 1983 — 1985
M.S., Computer Science
National Institute of Technology Karnataka 1978 — 1983
B.Tech., Electronics
Real Intent November 2014 - Present
Real Intent February 2014 - October 2014
Toastmasters International July 2013 - June 2014
Atrenta Inc. February 2006 - January 2014
Toastmasters International July 2008 - June 2009
Cadence Design Systems March 2004 - February 2006
Tera Systems February 2002 - March 2003
Synopsys March 1998 - December 2002
Synopsys July 1996 - March 1998
Texas Instruments October 1985 - June 1995
Skills
Product Management, Product Marketing, EDA, IC Design, Operations Management, International Management, Public Speaking, People Management, Software Product..., VLSI, Physical Design, IP design, ASIC, General Management, Customer Relations, RTL design, Community Leadership, SoC, Semiconductors, Engineering Management, Program Management, Cross-functional Team..., IC, Product Launch, Product Strategy, Team Leadership, IP, Management, Business Development, Software Development, Competitive Analysis, Product Development, CRM, Go-to-market Strategy, Business Strategy, Pre-sales, Strategic Partnerships, Technical Marketing, Start-ups, Leadership Development, Enterprise Software, Leadership, Communication, Management Consulting, Project Management, Marketing, Integrated Circuit..., RTL Design, Customer Service
Education
University of California, Berkeley - Walter A. Haas School of Business 2000 — 2003
MBA, Marketing
Annamalai University 1992 — 1994
PGDBA, Business Administration
Indian Institute of Technology, Madras 1983 — 1985
M.S., Computer Science
National Institute of Technology Karnataka 1978 — 1983
B.Tech., Electronics
Malavika Goda Krishna Malavika Goda Krishna's Cadence Design Systems Experience June 2014 - August 2014
Job Student at University of Southern California
Industry
Experience
Cadence Design Systems June 2014 - August 2014
Skills
VLSI, Cadence Spectre, ModelSim, C, Cadence Virtuoso, Cadence Encounter, NCSim, Verilog
Education
University of Southern California 2013 — 2015
Master's degree, Electrical Engineering VLSI
Sir M Visvesvaraya Institute Of Technology 2009 — 2013
Bachelor of Technology (B.Tech.), Electrical and Electronics Engineering
Cadence Design Systems June 2014 - August 2014
Skills
VLSI, Cadence Spectre, ModelSim, C, Cadence Virtuoso, Cadence Encounter, NCSim, Verilog
Education
University of Southern California 2013 — 2015
Master's degree, Electrical Engineering VLSI
Sir M Visvesvaraya Institute Of Technology 2009 — 2013
Bachelor of Technology (B.Tech.), Electrical and Electronics Engineering
Aditya Tuteja Aditya Tuteja's Cadence Design Systems Experience April 2009 - June 2012
Job Software Engineer at Oracle
Industry Computer Software
Experience
Oracle July 2014 - Present
Juniper Networks May 2013 - August 2013
Cadence Design Systems April 2009 - June 2012
Cadence Design Systems July 2007 - April 2009
Cadence Design Systems January 2006 - July 2007
Newgen Software Technologies January 2005 - January 2006
Skills
Perl, EDA, C++, Algorithms, C, TCL, Java, Verilog, Data Structures, Unix, Linux, ClearCase, Shell Scripting, Debugging, Eclipse, Unix Shell Scripting, Subversion, XML, MySQL, Software Engineering, Software Development, Operating Systems, GNU Debugger, Object Oriented Design, Multithreading, Core Java, OOP, Software Design, Solaris, Awk, TCP/IP, Programming
Education
University of Southern California 2012 — 2014
Master's degree, Computer Science
Maharshi Dayanand Sarswati University 2001 — 2005
B.Tech, Computer Science
Oracle July 2014 - Present
Juniper Networks May 2013 - August 2013
Cadence Design Systems April 2009 - June 2012
Cadence Design Systems July 2007 - April 2009
Cadence Design Systems January 2006 - July 2007
Newgen Software Technologies January 2005 - January 2006
Skills
Perl, EDA, C++, Algorithms, C, TCL, Java, Verilog, Data Structures, Unix, Linux, ClearCase, Shell Scripting, Debugging, Eclipse, Unix Shell Scripting, Subversion, XML, MySQL, Software Engineering, Software Development, Operating Systems, GNU Debugger, Object Oriented Design, Multithreading, Core Java, OOP, Software Design, Solaris, Awk, TCP/IP, Programming
Education
University of Southern California 2012 — 2014
Master's degree, Computer Science
Maharshi Dayanand Sarswati University 2001 — 2005
B.Tech, Computer Science
Jeff McGuire, MBA Jeff McGuire, MBA's Cadence Design Systems Experience 2001 - 2005
Job Vice President of Sales and Marketing at Kandou Bus
Industry Semiconductors
Experience
Kandou Bus, S.A. 2013 - Present
Rambus 2005 - 2012
Cadence Design Systems 2001 - 2005
Agilent Technologies 1999 - 2001
Hewlett Packard 1995 - 1999
Hewlett-Packard 1993 - 1995
Skills
Cross-functional Team..., Business Development, Semiconductors, Start-ups, Sales Management, Global Business..., Executive Level Selling, Strategic Alliances, Intellectual Property, Financial Analysis, Patents, Strategy, Sales Operations, Strategic Leadership, Profit & Loss Management, Manufacturing..., Contract Negotiations, Managing Complex Sales, Software Sales, Consumer Marketing, Executive Management, Business Strategy, Management, Forecasting, Leadership, Strategic Partnerships, ASIC
Education
Arizona State University
MBA
Thunderbird School of Global Management
William Jewell College
Bachelor of Science (BS)
Kandou Bus, S.A. 2013 - Present
Rambus 2005 - 2012
Cadence Design Systems 2001 - 2005
Agilent Technologies 1999 - 2001
Hewlett Packard 1995 - 1999
Hewlett-Packard 1993 - 1995
Skills
Cross-functional Team..., Business Development, Semiconductors, Start-ups, Sales Management, Global Business..., Executive Level Selling, Strategic Alliances, Intellectual Property, Financial Analysis, Patents, Strategy, Sales Operations, Strategic Leadership, Profit & Loss Management, Manufacturing..., Contract Negotiations, Managing Complex Sales, Software Sales, Consumer Marketing, Executive Management, Business Strategy, Management, Forecasting, Leadership, Strategic Partnerships, ASIC
Education
Arizona State University
MBA
Thunderbird School of Global Management
William Jewell College
Bachelor of Science (BS)
Kshitij Gupta Kshitij Gupta's Cadence Design Systems Experience 2004 - 2007
Job Director Engineering
Industry Computer Software
Experience
Shoppin LLC December 2013 - Present
iCelero November 2011 - December 2013
Dialogic December 2010 - November 2011
Dilithium Networks March 2008 - July 2010
Dilithium Networks March 2007 - March 2008
Cadence Design Systems 2004 - 2007
OMAP Software R&D, Texas Instruments India Ltd 2002 - 2004
Infineon Technologies June 2000 - June 2002
Skills
Leadership, Start-ups, Product Development, Mobile Platforms, System Architecture, Scalability, New Product Ideas, Sprint Planning, Technical Leadership, Algorithms, Amazon Web Services..., User Experience Design, Video Compression, Team Mentoring, Live Video Streaming, Distributed Caching, Embedded Systems, C, Mobile Applications, C++, Mobile Devices, Software Design
Education
Madan Mohan Malaviya University of Technology 1996 — 2000
Bachelor of Engineering (B.E.), Computer Science
Shoppin LLC December 2013 - Present
iCelero November 2011 - December 2013
Dialogic December 2010 - November 2011
Dilithium Networks March 2008 - July 2010
Dilithium Networks March 2007 - March 2008
Cadence Design Systems 2004 - 2007
OMAP Software R&D, Texas Instruments India Ltd 2002 - 2004
Infineon Technologies June 2000 - June 2002
Skills
Leadership, Start-ups, Product Development, Mobile Platforms, System Architecture, Scalability, New Product Ideas, Sprint Planning, Technical Leadership, Algorithms, Amazon Web Services..., User Experience Design, Video Compression, Team Mentoring, Live Video Streaming, Distributed Caching, Embedded Systems, C, Mobile Applications, C++, Mobile Devices, Software Design
Education
Madan Mohan Malaviya University of Technology 1996 — 2000
Bachelor of Engineering (B.E.), Computer Science
Joshua Luo Joshua Luo's Cadence Design Systems Experience July 2014 - Present
Job FAE at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems July 2014 - Present
Cadence Design Systems October 2012 - July 2014
Cadence Design Systems July 2012 - October 2012
Sigrity September 2006 - July 2012
Cadence Design Systems 2002 - 2006
Tatung 2001 - 2002
Skills
EDA, Signal Integrity, PCB design, Simulation, Semiconductors, Simulations, IC
Education
Chung-Hua University 2004 — 2006
Master, Computer Science Information Engineer
I-Shou University 1996 — 2000
Bachelor, Electronic Engineer
Cadence Design Systems July 2014 - Present
Cadence Design Systems October 2012 - July 2014
Cadence Design Systems July 2012 - October 2012
Sigrity September 2006 - July 2012
Cadence Design Systems 2002 - 2006
Tatung 2001 - 2002
Skills
EDA, Signal Integrity, PCB design, Simulation, Semiconductors, Simulations, IC
Education
Chung-Hua University 2004 — 2006
Master, Computer Science Information Engineer
I-Shou University 1996 — 2000
Bachelor, Electronic Engineer
Ankit Mitra Ankit Mitra's Cadence Design Systems Experience June 2015 - August 2015
Job Graduate Student of Computer Engineering at Arizona State University
Industry Electrical/Electronic Manufacturing
Experience
Arizona State University August 2015 - Present
Arizona State University July 2014 - Present
Cadence Design Systems June 2015 - August 2015
Arizona State University January 2015 - May 2015
XESP December 2013 - January 2014
Jadavpur University August 2013 - November 2013
Bharat Sanchar Nigam Limited December 2010 - January 2011
Skills
Matlab, VHDL, Cadence Virtuoso, ModelSim, VLSI, Xilinx, FPGA, Integrated Circuit..., Circuit Design, C, C++, Cadence Spectre, ASIC, Semiconductors, SystemVerilog, Synopsys Primetime, Microcontrollers, Verilog, Cadence SoC Encounter, SoC, Simulink, Embedded Systems, Digital Electronics, Perl, Digital Signal..., Assembly Language, Silvaco, SPICE, Analog, Xilinx ISE, Python, Pspice, Programming, Shell Scripting, MyCADpro2009, Simulations, Logic Synthesis, Cadence RTL Compiler, Hercules, StarRC
Education
Arizona State University 2014 — 2016
Master's Degree, Computer Engineering(Electrical Engineering), VLSI Design and Architectures, 3.43/4
West Bengal University of Technology 2008 — 2012
B.Tech, Electronics and Communication Engineering, 8.85
Calcutta Boys School 1995 — 2008
ICSE, 83%
Calcutta Boys' School 1995 — 2008
ISC, science, 84%
Arizona State University August 2015 - Present
Arizona State University July 2014 - Present
Cadence Design Systems June 2015 - August 2015
Arizona State University January 2015 - May 2015
XESP December 2013 - January 2014
Jadavpur University August 2013 - November 2013
Bharat Sanchar Nigam Limited December 2010 - January 2011
Skills
Matlab, VHDL, Cadence Virtuoso, ModelSim, VLSI, Xilinx, FPGA, Integrated Circuit..., Circuit Design, C, C++, Cadence Spectre, ASIC, Semiconductors, SystemVerilog, Synopsys Primetime, Microcontrollers, Verilog, Cadence SoC Encounter, SoC, Simulink, Embedded Systems, Digital Electronics, Perl, Digital Signal..., Assembly Language, Silvaco, SPICE, Analog, Xilinx ISE, Python, Pspice, Programming, Shell Scripting, MyCADpro2009, Simulations, Logic Synthesis, Cadence RTL Compiler, Hercules, StarRC
Education
Arizona State University 2014 — 2016
Master's Degree, Computer Engineering(Electrical Engineering), VLSI Design and Architectures, 3.43/4
West Bengal University of Technology 2008 — 2012
B.Tech, Electronics and Communication Engineering, 8.85
Calcutta Boys School 1995 — 2008
ICSE, 83%
Calcutta Boys' School 1995 — 2008
ISC, science, 84%
Hwey-Fong Chen Hwey-Fong Chen's Cadence Design Systems Experience April 1991 - February 2004
Job Acupuncturist
Industry Health, Wellness and Fitness
Experience
Self-employed May 2008 - Present
Acuharmony Acupuncture Clinic May 2008 - Present
Lattice Semiconductor November 2004 - March 2007
Cadence Design Systems April 1991 - February 2004
Education
South Baylo University 2003 — 2005
Doctor of Oriental Medicine (OMD), Medicine
Academy of Chinese Culture and Health Sciences 1998 — 2001
Master's degree, Acupuncture and Oriental Medicine
Self-employed May 2008 - Present
Acuharmony Acupuncture Clinic May 2008 - Present
Lattice Semiconductor November 2004 - March 2007
Cadence Design Systems April 1991 - February 2004
Education
South Baylo University 2003 — 2005
Doctor of Oriental Medicine (OMD), Medicine
Academy of Chinese Culture and Health Sciences 1998 — 2001
Master's degree, Acupuncture and Oriental Medicine
Srinivas Kommoori's Cadence Design Systems Experience July 2001 - July 2006
Job at Fabula Solutions
Industry Consumer Services
Experience
Fabula Solutions November 2009 - Present
Apache Design Solutions July 2006 - October 2009
Cadence Design Systems July 2001 - July 2006
Sun Microsystems August 2000 - December 2000
Education
Arizona State University 1999 — 2003
MS
Fabula Solutions November 2009 - Present
Apache Design Solutions July 2006 - October 2009
Cadence Design Systems July 2001 - July 2006
Sun Microsystems August 2000 - December 2000
Education
Arizona State University 1999 — 2003
MS
Nancy Schabilion Nancy Schabilion's Cadence Design Systems Experience February 1991 - September 1997
Job Sales Manager, MidMarket Commerce B2B at IBM
Industry Computer Software
Experience
IBM January 2015 - Present
IBM May 2012 - December 2014
IBM Corporation September 2010 - April 2012
Sterling Commerce, an IBM Company March 2006 - September 2010
Rainmaker Systems September 2004 - September 2005
SalesRamp September 2003 - September 2004
Mentor Graphics July 1999 - July 2002
PTC Corporation October 1997 - September 1998
Cadence Design Systems February 1991 - September 1997
Skills
Sales Process, Enterprise Software, Program Management, Salesforce.com, Sales Operations, CRM, Leadership, SaaS, Management, Lead Generation, Direct Sales, Start-ups, B2B, Sales Management, Sales Enablement, Sales, Inside Sales, Training, Marketing
Education
San Jose State University 2003 — 2006
Master of Arts, Counselor Education
Arizona State University 1982 — 1986
BS, Business Administration
IBM January 2015 - Present
IBM May 2012 - December 2014
IBM Corporation September 2010 - April 2012
Sterling Commerce, an IBM Company March 2006 - September 2010
Rainmaker Systems September 2004 - September 2005
SalesRamp September 2003 - September 2004
Mentor Graphics July 1999 - July 2002
PTC Corporation October 1997 - September 1998
Cadence Design Systems February 1991 - September 1997
Skills
Sales Process, Enterprise Software, Program Management, Salesforce.com, Sales Operations, CRM, Leadership, SaaS, Management, Lead Generation, Direct Sales, Start-ups, B2B, Sales Management, Sales Enablement, Sales, Inside Sales, Training, Marketing
Education
San Jose State University 2003 — 2006
Master of Arts, Counselor Education
Arizona State University 1982 — 1986
BS, Business Administration
Mayank Bhatia Mayank Bhatia's Cadence Design Systems Experience July 2013 - Present
Job Sr Marketing Manager at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems July 2013 - Present
Cadence Design Systems October 2010 - June 2013
Cadence Design Systems March 2008 - September 2010
Cadence Design Systems May 2006 - February 2008
Cadence Design Systems May 2000 - June 2004
Skills
Pre-sales, Strategy, Product Marketing, Competitive Analysis, Management, Product Management, Business Intelligence, Market Research, Marketing, Semiconductors, Account Management, Relationship Management, Market Development, Go-to-market Strategy, Sales, Data Analysis, Wireless, Multi-channel Marketing, Market Analysis, Strategic Planning, Simulations, Competitive Intelligence, FileMaker
Education
Asian Institute of Management 2004 — 2006
MBA
Maulana Azad National Institute of Technology 1996 — 2000
B.E.
Air Force Bal Bharati School
Cadence Design Systems July 2013 - Present
Cadence Design Systems October 2010 - June 2013
Cadence Design Systems March 2008 - September 2010
Cadence Design Systems May 2006 - February 2008
Cadence Design Systems May 2000 - June 2004
Skills
Pre-sales, Strategy, Product Marketing, Competitive Analysis, Management, Product Management, Business Intelligence, Market Research, Marketing, Semiconductors, Account Management, Relationship Management, Market Development, Go-to-market Strategy, Sales, Data Analysis, Wireless, Multi-channel Marketing, Market Analysis, Strategic Planning, Simulations, Competitive Intelligence, FileMaker
Education
Asian Institute of Management 2004 — 2006
MBA
Maulana Azad National Institute of Technology 1996 — 2000
B.E.
Air Force Bal Bharati School
Ajay Pratap Singh Ajay Pratap Singh's Cadence Design Systems Experience April 2008 - December 2012
Job Senior Manager, Design Verification at Xilinx
Industry Semiconductors
Experience
Xilinx December 2012 - Present
Cadence Design Systems April 2008 - December 2012
AMCC 2007 - 2008
Broadcom June 2005 - April 2007
Contract at Cisco January 2005 - June 2005
Texas Instruments 2002 - 2005
Cradle technologies 2001 - 2001
IPolicynetworks 2000 - 2001
STMicroelectronics 1998 - 2000
VLSi software 1998 - 1998
Skills
SystemVerilog, Functional Verification, Verilog, ASIC, Specman, Debugging, UVM, Open Verification..., FPGA, Semiconductors, RTL design, SoC, ModelSim, IC, NCSim, Logic Synthesis, Simulations, EDA, VLSI, Formal Verification, Processors, Microprocessors, Perl, Cadence, Logic Design, Mixed Signal, Wireless Networking, Questa, Team Management, IMC, Vmanager, Simvision, Hiring
Education
National Institute of Technology Kurukshetra 1995 — 1997
MTech, Electrical Enginering
Amravati University 1991 — 1995
BE, Electronics and Communications Engineering
Xilinx December 2012 - Present
Cadence Design Systems April 2008 - December 2012
AMCC 2007 - 2008
Broadcom June 2005 - April 2007
Contract at Cisco January 2005 - June 2005
Texas Instruments 2002 - 2005
Cradle technologies 2001 - 2001
IPolicynetworks 2000 - 2001
STMicroelectronics 1998 - 2000
VLSi software 1998 - 1998
Skills
SystemVerilog, Functional Verification, Verilog, ASIC, Specman, Debugging, UVM, Open Verification..., FPGA, Semiconductors, RTL design, SoC, ModelSim, IC, NCSim, Logic Synthesis, Simulations, EDA, VLSI, Formal Verification, Processors, Microprocessors, Perl, Cadence, Logic Design, Mixed Signal, Wireless Networking, Questa, Team Management, IMC, Vmanager, Simvision, Hiring
Education
National Institute of Technology Kurukshetra 1995 — 1997
MTech, Electrical Enginering
Amravati University 1991 — 1995
BE, Electronics and Communications Engineering
Daniel Argollo Daniel Argollo's Cadence Design Systems Experience May 2015 - Present
Job Software Architect at Cadence Design Systems
Industry Telecommunications
Experience
Cadence Design Systems May 2015 - Present
Keysight Technologies August 2014 - May 2015
Agilent Technologies August 2006 - August 2014
Xpedion Design Systems October 2001 - August 2006
Xlin Research Institute - Limoges - France July 2000 - July 2001
Skills
C++, Simulations, Software Engineering, EDA, RF, Electronics, C, Perl, GoldenGate, Semiconductors, Software Development, Python, Linux, Algorithms, Testing, Debugging, Wireless, Matlab, Machine Learning, Shell Scripting, Digital Signal..., Analog, SoC, MySQL, Unix, Electrical Engineering, IC, Embedded Systems, ASIC, Signal Processing
Education
Université de Limoges 1996 — 2001
PhD, Circuit Theory
Universidade de Brasília 1993 — 1996
Master’s Degree, Telecommunication
Cadence Design Systems May 2015 - Present
Keysight Technologies August 2014 - May 2015
Agilent Technologies August 2006 - August 2014
Xpedion Design Systems October 2001 - August 2006
Xlin Research Institute - Limoges - France July 2000 - July 2001
Skills
C++, Simulations, Software Engineering, EDA, RF, Electronics, C, Perl, GoldenGate, Semiconductors, Software Development, Python, Linux, Algorithms, Testing, Debugging, Wireless, Matlab, Machine Learning, Shell Scripting, Digital Signal..., Analog, SoC, MySQL, Unix, Electrical Engineering, IC, Embedded Systems, ASIC, Signal Processing
Education
Université de Limoges 1996 — 2001
PhD, Circuit Theory
Universidade de Brasília 1993 — 1996
Master’s Degree, Telecommunication
Christine Rousselle Christine Rousselle's Cadence Design Systems Experience March 1999 - January 2001
Job Art Masters Chair at PTA
Industry Electrical/Electronic Manufacturing
Experience
PTA 2006 - Present
Little Black Dress December 2007 - December 2008
CAbi August 2006 - December 2007
Mentor Graphics February 2001 - May 2005
Cadence Design Systems March 1999 - January 2001
Northrop Grumman September 1997 - March 1999
Delphi Automotive Systems May 1992 - September 1997
Skills
Apparel, Management, Account Management, Product Development, Sales Management, EDA, Teaching, Verilog, Direct Sales
Education
Arizona State University 1994 — 1995
M.S.E.E., Electrical Engineering
University of Missouri-Rolla 1988 — 1994
B.S., Electrical Engineering
Parkway Central Senior High 1984 — 1988
high school diploma, general high school education
PTA 2006 - Present
Little Black Dress December 2007 - December 2008
CAbi August 2006 - December 2007
Mentor Graphics February 2001 - May 2005
Cadence Design Systems March 1999 - January 2001
Northrop Grumman September 1997 - March 1999
Delphi Automotive Systems May 1992 - September 1997
Skills
Apparel, Management, Account Management, Product Development, Sales Management, EDA, Teaching, Verilog, Direct Sales
Education
Arizona State University 1994 — 1995
M.S.E.E., Electrical Engineering
University of Missouri-Rolla 1988 — 1994
B.S., Electrical Engineering
Parkway Central Senior High 1984 — 1988
high school diploma, general high school education
Dwayne Martin Dwayne Martin's Cadence Design Systems Experience November 2000 - November 2013
Job IT Director
Industry Information Technology and Services
Experience
Cadence Design Systems November 2000 - November 2013
Cadence Design Systems April 1997 - November 2000
Mitel Corporation April 1995 - April 1997
Skills
Unix, Cloud Computing, Virtualization, Data Center, Enterprise Architecture, Operations Management, Operational Efficiency, IT Operations, Capital Budgeting, Professional Mentoring, Servers, Shell Scripting, VMware, Disaster Recovery, EDA, Integration, Firewalls, ITIL, Reporting & Analysis, IT Management, Cross-functional Team..., Troubleshooting, Project Management, Staff Development, Incident Management, Cross-cultural Teams, Data Analysis, Process Efficiency, Coaching Staff, Customer Oriented, Customer Service, Business Acumen, Operating Budgets, Team Management, Driving Efficiency, Change Management, Problem Management
Education
Algonquin College of Applied Arts and Technology 1995 — 1997
Computer Information Systems
Cadence Design Systems November 2000 - November 2013
Cadence Design Systems April 1997 - November 2000
Mitel Corporation April 1995 - April 1997
Skills
Unix, Cloud Computing, Virtualization, Data Center, Enterprise Architecture, Operations Management, Operational Efficiency, IT Operations, Capital Budgeting, Professional Mentoring, Servers, Shell Scripting, VMware, Disaster Recovery, EDA, Integration, Firewalls, ITIL, Reporting & Analysis, IT Management, Cross-functional Team..., Troubleshooting, Project Management, Staff Development, Incident Management, Cross-cultural Teams, Data Analysis, Process Efficiency, Coaching Staff, Customer Oriented, Customer Service, Business Acumen, Operating Budgets, Team Management, Driving Efficiency, Change Management, Problem Management
Education
Algonquin College of Applied Arts and Technology 1995 — 1997
Computer Information Systems
Kuhoo Edson Kuhoo Edson's Cadence Design Systems Experience March 2013 - Present
Job Communications Consultant at Intel Security
Industry Marketing and Advertising
Experience
Intel Security November 2013 - Present
Cadence Design Systems March 2013 - Present
Ultra Clean Technology March 2012 - Present
Blackbaud November 2008 - Present
Technology In Images, Inc September 2000 - Present
Cisco Systems May 2010 - July 2011
Credence February 2007 - September 2008
Cadence Design Systems 2005 - 2007
Cadence Design Systems September 1995 - December 1999
VeriBest Inc. 1992 - 1995
Skills
Market Analysis, Product Marketing, Business Strategy, Product Management, Mergers, Mergers & Acquisitions, Enterprise Software, Software Development, Cross-functional Team..., Integration, Business Operations, Strategic Partnerships, Go-to-market Strategy, Product Launch, Marketing, Marketing Strategy, Competitive Analysis, Strategy, Strategic Planning
Education
University of Alabama in Huntsville 1984 — 1987
BSEE, Engineering
Auburn University
Bachelor of Science (BS), Electrical and Electronics Engineering
Intel Security November 2013 - Present
Cadence Design Systems March 2013 - Present
Ultra Clean Technology March 2012 - Present
Blackbaud November 2008 - Present
Technology In Images, Inc September 2000 - Present
Cisco Systems May 2010 - July 2011
Credence February 2007 - September 2008
Cadence Design Systems 2005 - 2007
Cadence Design Systems September 1995 - December 1999
VeriBest Inc. 1992 - 1995
Skills
Market Analysis, Product Marketing, Business Strategy, Product Management, Mergers, Mergers & Acquisitions, Enterprise Software, Software Development, Cross-functional Team..., Integration, Business Operations, Strategic Partnerships, Go-to-market Strategy, Product Launch, Marketing, Marketing Strategy, Competitive Analysis, Strategy, Strategic Planning
Education
University of Alabama in Huntsville 1984 — 1987
BSEE, Engineering
Auburn University
Bachelor of Science (BS), Electrical and Electronics Engineering
Marc Bell Marc Bell's Cadence Design Systems Experience 1999 - 2002
Job Senior Design Engineer at Janteq Corp
Industry Electrical/Electronic Manufacturing
Experience
Janteq Corp January 2014 - Present
Suttronics Ltd May 2008 - September 2014
Suttronics LTD May 2008 - February 2009
OVUS LTD January 2006 - April 2008
SADiE 2003 - 2006
Symbionics 2000 - 2003
Symbionics / Cadence / Tality 1999 - 2002
Cadence Design Systems 1999 - 2002
Madge Networks July 1995 - June 1999
GEC MARCONI AVIONICS October 1994 - July 1995
Skills
Altium Designer, PADS Layout, PowerPCB, Altium, Controlled Impedance, Hyperlynx, High-speed Design, DDR2, Xilinx, Spartan, Hardware, Professional Audio, Hardware Architecture, ARM, Electronics, PCB design, Embedded Systems, DVB, PCB Design, Debugging, Semiconductors, FPGA, Analog, RF, Testing, Digital Signal...
Education
Aston University 1991 — 1994
Bachelor of Engineering (BEng)
Janteq Corp January 2014 - Present
Suttronics Ltd May 2008 - September 2014
Suttronics LTD May 2008 - February 2009
OVUS LTD January 2006 - April 2008
SADiE 2003 - 2006
Symbionics 2000 - 2003
Symbionics / Cadence / Tality 1999 - 2002
Cadence Design Systems 1999 - 2002
Madge Networks July 1995 - June 1999
GEC MARCONI AVIONICS October 1994 - July 1995
Skills
Altium Designer, PADS Layout, PowerPCB, Altium, Controlled Impedance, Hyperlynx, High-speed Design, DDR2, Xilinx, Spartan, Hardware, Professional Audio, Hardware Architecture, ARM, Electronics, PCB design, Embedded Systems, DVB, PCB Design, Debugging, Semiconductors, FPGA, Analog, RF, Testing, Digital Signal...
Education
Aston University 1991 — 1994
Bachelor of Engineering (BEng)
Murthy Parakala Murthy Parakala's Cadence Design Systems Experience November 2013 - January 2015
Job Experienced Software Engineer
Industry Computer Software
Experience
Cadence Design Systems November 2013 - January 2015
Vislink Services October 2012 - October 2013
BitRouter November 2011 - August 2012
Broadcom September 2010 - September 2011
NetLogic Microsystems September 2009 - July 2010
RMI corporation July 2006 - September 2009
Advanced Micro Devices December 2005 - June 2006
National Semiconductor June 1999 - November 2005
Digital Equipment Corporation April 1996 - May 1999
Universal Software Corporation July 1995 - March 1996
Skills
Digital TV, MPEG2, Firmware, SoC, C++, C, Debugging, Linux Kernel, Device Drivers, Embedded Systems, Embedded Software, Software Development, Linux, Software Engineering, Testing
Education
Indian Institute of Technology (Banaras Hindu University), Varanasi
Master of Technology (M.Tech.), Electronics Engineering
Acharya Nagarjuna University
Bachelor of Technology (B.Tech.), Electronics and Communication Engineering
Cadence Design Systems November 2013 - January 2015
Vislink Services October 2012 - October 2013
BitRouter November 2011 - August 2012
Broadcom September 2010 - September 2011
NetLogic Microsystems September 2009 - July 2010
RMI corporation July 2006 - September 2009
Advanced Micro Devices December 2005 - June 2006
National Semiconductor June 1999 - November 2005
Digital Equipment Corporation April 1996 - May 1999
Universal Software Corporation July 1995 - March 1996
Skills
Digital TV, MPEG2, Firmware, SoC, C++, C, Debugging, Linux Kernel, Device Drivers, Embedded Systems, Embedded Software, Software Development, Linux, Software Engineering, Testing
Education
Indian Institute of Technology (Banaras Hindu University), Varanasi
Master of Technology (M.Tech.), Electronics Engineering
Acharya Nagarjuna University
Bachelor of Technology (B.Tech.), Electronics and Communication Engineering
Terri (Winters) Beiter Terri (Winters) Beiter's Cadence Design Systems Experience June 2012 - Present
Job Lead Program Manager at Cadence Design Systems
Industry Financial Services
Experience
Choicelinx August 2014 - Present
Cadence Design Systems June 2012 - Present
NuView Systems January 2011 - July 2012
Dassault Systemes March 2009 - January 2011
Fidelity September 2000 - December 2008
Fidelity Investments October 2005 - September 2007
Fidelity HR Services 2005 - 2006
Education
Alfred University 1982 — 1986
BS, Business/MIS
Choicelinx August 2014 - Present
Cadence Design Systems June 2012 - Present
NuView Systems January 2011 - July 2012
Dassault Systemes March 2009 - January 2011
Fidelity September 2000 - December 2008
Fidelity Investments October 2005 - September 2007
Fidelity HR Services 2005 - 2006
Education
Alfred University 1982 — 1986
BS, Business/MIS
Rich Hovey Rich Hovey's Cadence Design Systems Experience 2014 - Present
Job
Industry Semiconductors
Experience
Cadence Design Systems 2014 - Present
LSI Corporation March 2010 - 2014
LSI, an Avago Technologies Company June 2006 - February 2010
LSI, an Avago Technologies Company October 2004 - June 2006
LSI, an Avago Technologies Company July 2001 - September 2004
LSI, an Avago Technologies Company July 2000 - June 2001
LSI, an Avago Technologies Company October 1996 - June 2000
National Semiconductor February 1994 - October 1996
Skills
ASIC, EDA, SoC, Product Management, IC, Semiconductors, Semiconductor Industry, Cross-functional Team..., Program Management, Product Marketing
Education
Arizona State University
BS
Massachusetts Institute of Technology - Sloan School of Management
MBA
Cadence Design Systems 2014 - Present
LSI Corporation March 2010 - 2014
LSI, an Avago Technologies Company June 2006 - February 2010
LSI, an Avago Technologies Company October 2004 - June 2006
LSI, an Avago Technologies Company July 2001 - September 2004
LSI, an Avago Technologies Company July 2000 - June 2001
LSI, an Avago Technologies Company October 1996 - June 2000
National Semiconductor February 1994 - October 1996
Skills
ASIC, EDA, SoC, Product Management, IC, Semiconductors, Semiconductor Industry, Cross-functional Team..., Program Management, Product Marketing
Education
Arizona State University
BS
Massachusetts Institute of Technology - Sloan School of Management
MBA
Robert Makofske Robert Makofske's Cadence Design Systems Experience September 2000 - Present
Job Electronic Design Automation engineer focused on intellectual property development
Industry Computer Software
Experience
Cadence Design Systems September 2000 - Present
Harris Semiconductor December 1991 - September 2000
Harris Semiconductor October 1983 - November 1991
Skills
EDA
Education
Auburn University 1980 — 1983
Bachelor of Electrical Engineering, Electronics, control systems, power systems, electromagnetics
Cadence Design Systems September 2000 - Present
Harris Semiconductor December 1991 - September 2000
Harris Semiconductor October 1983 - November 1991
Skills
EDA
Education
Auburn University 1980 — 1983
Bachelor of Electrical Engineering, Electronics, control systems, power systems, electromagnetics
Ilya Zaverukha's Cadence Design Systems Experience December 2009 - October 2014
Job Product Testing, Validation and Quality Control, Process Engineering, Electronics Hardware/Software Integration
Industry Computer Hardware
Experience
Cree May 2015 - Present
Cadence Design Systems December 2009 - October 2014
Cadence Design Systems September 2000 - December 2009
PSC, Inc. (acquired by Datalogic) April 1991 - July 2000
Hi-Cal Design, Inc November 1989 - March 1991
Skills
PCB design, Signal Integrity, Physical Design, Cadence, Testing, Orcad, ASIC, Logic Analyzer, High Speed Interfaces, SERDES, Debugging, PCIe, Cadence Allegro, Oscilloscope, Test Equipment, EDA, Cadence Virtuoso, Schematic Capture, DFT, Semiconductors, Mixed Signal, Test Automation, Selenium WebDriver, PCB Design, OrCAD
Education
Rochester Institute of Technology 1995 — 1996
Pursued graduate-level courses, Microelectronics
Moscow State Mining University (MSMU) 1981 — 1986
Bachelor's Degree, BSET
Cree May 2015 - Present
Cadence Design Systems December 2009 - October 2014
Cadence Design Systems September 2000 - December 2009
PSC, Inc. (acquired by Datalogic) April 1991 - July 2000
Hi-Cal Design, Inc November 1989 - March 1991
Skills
PCB design, Signal Integrity, Physical Design, Cadence, Testing, Orcad, ASIC, Logic Analyzer, High Speed Interfaces, SERDES, Debugging, PCIe, Cadence Allegro, Oscilloscope, Test Equipment, EDA, Cadence Virtuoso, Schematic Capture, DFT, Semiconductors, Mixed Signal, Test Automation, Selenium WebDriver, PCB Design, OrCAD
Education
Rochester Institute of Technology 1995 — 1996
Pursued graduate-level courses, Microelectronics
Moscow State Mining University (MSMU) 1981 — 1986
Bachelor's Degree, BSET
Yi Zhao Yi Zhao's Cadence Design Systems Experience July 2013 - September 2013
Job FT2014 MBA, Product Management, Marketing, Industry Research
Industry Telecommunications
Experience
Cadence Design Systems July 2013 - September 2013
ZTE April 2010 - September 2011
Alcatel-Lucent July 2008 - March 2010
CYIT January 2006 - June 2008
Skills
Product Marketing, Telecommunications, Product Management, Project Management, Wireless, Competitive Analysis, Cross-functional Team..., Business Development, Data Analysis, Corporate Finance, Business Strategy, Business Analysis, Program Management, Team Leadership, Microsoft Office, Management, Marketing, Mobile Devices, LTE, Internet, Cloud Computing, Strategic Planning, Semiconductors, Project Planning, New Business Development, Matlab, Product Development, Software Development, GSM, Microsoft Excel, V Lookups, Operations Management, Engineering, SQL, 3G, Strategy, CDMA, International Project..., Analysis, IP, WCDMA, Team Building, Change Management, Agile Methodologies, Manufacturing..., VBA
Education
University of California, San Diego - The Rady School of Management 2012 — 2014
Master of Business Administration (MBA), Marketing, 3.42
Chongqing University of Post and Telecommunications 2005 — 2008
Master's degree, Electronic Engineering, A
Hebei University of Technology 2001 — 2005
Bachelor's degree, Mechanical Engineering, B
Cadence Design Systems July 2013 - September 2013
ZTE April 2010 - September 2011
Alcatel-Lucent July 2008 - March 2010
CYIT January 2006 - June 2008
Skills
Product Marketing, Telecommunications, Product Management, Project Management, Wireless, Competitive Analysis, Cross-functional Team..., Business Development, Data Analysis, Corporate Finance, Business Strategy, Business Analysis, Program Management, Team Leadership, Microsoft Office, Management, Marketing, Mobile Devices, LTE, Internet, Cloud Computing, Strategic Planning, Semiconductors, Project Planning, New Business Development, Matlab, Product Development, Software Development, GSM, Microsoft Excel, V Lookups, Operations Management, Engineering, SQL, 3G, Strategy, CDMA, International Project..., Analysis, IP, WCDMA, Team Building, Change Management, Agile Methodologies, Manufacturing..., VBA
Education
University of California, San Diego - The Rady School of Management 2012 — 2014
Master of Business Administration (MBA), Marketing, 3.42
Chongqing University of Post and Telecommunications 2005 — 2008
Master's degree, Electronic Engineering, A
Hebei University of Technology 2001 — 2005
Bachelor's degree, Mechanical Engineering, B
Jerry Grula Jerry Grula's Cadence Design Systems Experience 2007 - 2009
Job Principal Project Engineer at Honeywell Aerospace
Industry Aviation & Aerospace
Experience
Honeywell Aerospace October 2014 - Present
Venture Catalyst at ASU June 2012 - Present
Aerospace Solutions LLC September 2013 - October 2014
Jagmen Solutions January 2011 - October 2014
The Predictive Group, Inc. October 2012 - June 2013
Pulsic 2009 - 2010
Cadence Design Systems 2007 - 2009
Cadence Design Systems 2000 - 2006
Quickturn Design Systems, Inc. 1998 - 2000
Quickturn Design Systems 1996 - 1998
Skills
Account Management, Solution Selling, Product Management, Strategic Planning, Marketing Strategy, New Business Development, Product Marketing, Consultative Selling, Key Account Management, Direct Sales, Product Strategy, Competitive Analysis, Sales Process, Business Planning, B2B, SaaS, Sales Presentations, Software Sales, Team Leadership, Go-to-market Strategy, Cross-functional Team..., Complex Sales, Negotiation, Business Development, Marketing, Coaching, Entrepreneurship, Project Management, Training, Team Building, Software Industry, Leadership, Start-ups, CRM, Enterprise Software, Management, Sales Operations, Strategic Partnerships, Cloud Computing, Sales Management, Forecasting, Strategy, Sales, Executive Management, Professional Services, Pricing, Lead Generation
Education
Arizona State University, W. P. Carey School of Business 1990 — 1994
MBA, Business Administration
Massachusetts Institute of Technology 1985 — 1989
BS, Electrical Engineering
Honeywell Aerospace October 2014 - Present
Venture Catalyst at ASU June 2012 - Present
Aerospace Solutions LLC September 2013 - October 2014
Jagmen Solutions January 2011 - October 2014
The Predictive Group, Inc. October 2012 - June 2013
Pulsic 2009 - 2010
Cadence Design Systems 2007 - 2009
Cadence Design Systems 2000 - 2006
Quickturn Design Systems, Inc. 1998 - 2000
Quickturn Design Systems 1996 - 1998
Skills
Account Management, Solution Selling, Product Management, Strategic Planning, Marketing Strategy, New Business Development, Product Marketing, Consultative Selling, Key Account Management, Direct Sales, Product Strategy, Competitive Analysis, Sales Process, Business Planning, B2B, SaaS, Sales Presentations, Software Sales, Team Leadership, Go-to-market Strategy, Cross-functional Team..., Complex Sales, Negotiation, Business Development, Marketing, Coaching, Entrepreneurship, Project Management, Training, Team Building, Software Industry, Leadership, Start-ups, CRM, Enterprise Software, Management, Sales Operations, Strategic Partnerships, Cloud Computing, Sales Management, Forecasting, Strategy, Sales, Executive Management, Professional Services, Pricing, Lead Generation
Education
Arizona State University, W. P. Carey School of Business 1990 — 1994
MBA, Business Administration
Massachusetts Institute of Technology 1985 — 1989
BS, Electrical Engineering
Arul Jothi Paramasivam Arul Jothi Paramasivam's Cadence Design Systems Experience August 2011 - June 2012
Job Technical Director at Mindtree
Industry Computer Software
Experience
Mindtree July 2015 - Present
MadhuraShree.ORG September 2014 - Present
MUFG Americas March 2014 - February 2015
IGATE March 2014 - March 2014
Hewlett-Packard September 2013 - March 2014
PETCO Animal Supplies, Inc. March 2013 - September 2013
Avalara June 2012 - March 2013
Cadence Design Systems August 2011 - June 2012
Cognizant Technology Solutions July 2010 - June 2012
Intuit December 2007 - June 2012
Skills
Web Services, Testing, SOAP, SOA, Enterprise Architecture, JBoss Application Server, Agile Methodologies, SDLC, Agile Project Management, WSDL, Software Development, Scrum, BPEL, Software Project..., SaaS, Enterprise Software, Cloud Computing, Requirements Analysis, Project Management, JBoss, Oracle, Integration, WebSphere, Management, Analytics, Struts, Spring, Java Enterprise Edition, Software Engineering, Start-ups, Eclipse, Consulting, Unix, Program Management, XML, Java, Solution Architecture, Vendor Management, Linux, CRM, Leadership, Business Analysis, Business Intelligence, IT Strategy, SQL, Architecture, Pre-sales, Data Warehousing, Team Leadership, Scala
Education
IBM 2015 — 2019
Developer Community, Engineering CAM, CAD and CAE, NC machine programming
Parametric Technology Corporation 2015 — 2019
Engineering and Visualization Technologies, PLM, PDM, CAD, CAM, CAE
Toast Master 1997 — 2012
Toast Master International, Inc, Communication, General, NA
Invisible Elephant Training and Consulting 2006 — 2007
Advanced Presentation Skills and Project Management, Project Management, 4.0
Annamalai University 1990 — 1992
ME, Engineering, 3.95
GRADUATE APTITUDE TEST IN ENGINEERING 1990 — 1992
Engineer's Degree, SCIENCES AND ENGINEERING, 4.78
Annamalai University 1986 — 1990
BE, Engineering, 4.02
Muthiah Polytechnic, Directorate of Technical Education 1983 — 1986
Diploma, Engineering, 4.7
SK Velayudham (SKV) Higher Secondary School 1978 — 1983
High School, English, Tamil, Maths, Science and History, 3.83
SKV Higher Secondary School 1978 — 1983
SSLC, Maths, Physics and Chemistry, 3.8
Mindtree July 2015 - Present
MadhuraShree.ORG September 2014 - Present
MUFG Americas March 2014 - February 2015
IGATE March 2014 - March 2014
Hewlett-Packard September 2013 - March 2014
PETCO Animal Supplies, Inc. March 2013 - September 2013
Avalara June 2012 - March 2013
Cadence Design Systems August 2011 - June 2012
Cognizant Technology Solutions July 2010 - June 2012
Intuit December 2007 - June 2012
Skills
Web Services, Testing, SOAP, SOA, Enterprise Architecture, JBoss Application Server, Agile Methodologies, SDLC, Agile Project Management, WSDL, Software Development, Scrum, BPEL, Software Project..., SaaS, Enterprise Software, Cloud Computing, Requirements Analysis, Project Management, JBoss, Oracle, Integration, WebSphere, Management, Analytics, Struts, Spring, Java Enterprise Edition, Software Engineering, Start-ups, Eclipse, Consulting, Unix, Program Management, XML, Java, Solution Architecture, Vendor Management, Linux, CRM, Leadership, Business Analysis, Business Intelligence, IT Strategy, SQL, Architecture, Pre-sales, Data Warehousing, Team Leadership, Scala
Education
IBM 2015 — 2019
Developer Community, Engineering CAM, CAD and CAE, NC machine programming
Parametric Technology Corporation 2015 — 2019
Engineering and Visualization Technologies, PLM, PDM, CAD, CAM, CAE
Toast Master 1997 — 2012
Toast Master International, Inc, Communication, General, NA
Invisible Elephant Training and Consulting 2006 — 2007
Advanced Presentation Skills and Project Management, Project Management, 4.0
Annamalai University 1990 — 1992
ME, Engineering, 3.95
GRADUATE APTITUDE TEST IN ENGINEERING 1990 — 1992
Engineer's Degree, SCIENCES AND ENGINEERING, 4.78
Annamalai University 1986 — 1990
BE, Engineering, 4.02
Muthiah Polytechnic, Directorate of Technical Education 1983 — 1986
Diploma, Engineering, 4.7
SK Velayudham (SKV) Higher Secondary School 1978 — 1983
High School, English, Tamil, Maths, Science and History, 3.83
SKV Higher Secondary School 1978 — 1983
SSLC, Maths, Physics and Chemistry, 3.8
Melissa Amooi Melissa Amooi's Cadence Design Systems Experience 1998 - 2009
Job Director, Customer Success
Industry Computer Software
Jeff Francis Jeff Francis's Cadence Design Systems Experience June 2011 - September 2013
Job
Industry Government Administration
Experience
Arizona Corporation Commission June 2014 - Present
Cadence Design Systems June 2011 - September 2013
Synopsys, Inc. April 1999 - August 2008
Cadence Design Systems, Inc. 1992 - 1999
Comdisco Systems 1990 - 1992
Tektronix, Inc. 1979 - 1990
General Motors 1977 - 1979
Skills
Strategy, Sales Management, Account Management, Management, Leadership, New Business Development, SaaS, Sales Operations, Sales, Consulting, Product Marketing, Strategic Planning, Semiconductors, Enterprise Software, Product Development, Solution Selling, Process Improvement, Product Management, Strategic Partnerships, Start-ups, Go-to-market Strategy, Executive Management, Cross-functional Team...
Education
Arizona State University
PSM
Case Western Reserve University
BS
Arizona Corporation Commission June 2014 - Present
Cadence Design Systems June 2011 - September 2013
Synopsys, Inc. April 1999 - August 2008
Cadence Design Systems, Inc. 1992 - 1999
Comdisco Systems 1990 - 1992
Tektronix, Inc. 1979 - 1990
General Motors 1977 - 1979
Skills
Strategy, Sales Management, Account Management, Management, Leadership, New Business Development, SaaS, Sales Operations, Sales, Consulting, Product Marketing, Strategic Planning, Semiconductors, Enterprise Software, Product Development, Solution Selling, Process Improvement, Product Management, Strategic Partnerships, Start-ups, Go-to-market Strategy, Executive Management, Cross-functional Team...
Education
Arizona State University
PSM
Case Western Reserve University
BS
Jason McCampbell Jason McCampbell's Cadence Design Systems Experience October 2014 - Present
Job Software Architect at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems October 2014 - Present
Skills
High Performance..., EDA, Python, Testing, Software Engineering, Linux, C++, Databases, Software Development, C#, Software Design, Object Oriented Design, Semiconductors, Start-ups, Web Services, Agile Methodologies, Distributed Systems, Product Management
Education
Arizona State University - W. P. Carey School of Business 2008 — 2010
MBA
University of Michigan 1990 — 1993
BSCE
Cadence Design Systems October 2014 - Present
Skills
High Performance..., EDA, Python, Testing, Software Engineering, Linux, C++, Databases, Software Development, C#, Software Design, Object Oriented Design, Semiconductors, Start-ups, Web Services, Agile Methodologies, Distributed Systems, Product Management
Education
Arizona State University - W. P. Carey School of Business 2008 — 2010
MBA
University of Michigan 1990 — 1993
BSCE
Carolyn Curry's Cadence Design Systems Experience 2000 - 2002
Job Corporate Development, Strategic Planning and Sales Finance
Industry Financial Services
Experience
Curry Financial Consulting 2003 - Present
Cadence Design Systems 2000 - 2002
Adaptive Broadband 1999 - 2000
Motorola 1989 - 1999
Skills
Mergers, Acquisition Integration, Corporate Development, Corporate Strategy..., Sales Finance Leadership, Financial Planning and..., Finance Business..., Finance, Mergers & Acquisitions, Strategy, Business Strategy, Strategic Planning, Strategic Financial..., Outsourcing, Leadership, Corporate Finance, Management, Consulting, Analysis, Pricing, Cross-functional Team..., Start-ups, Financial Planning
Education
University of Phoenix 1993 — 1994
Masters, Business Administration
Arizona State University 1982 — 1986
Bachelors, Corporate Finance
Curry Financial Consulting 2003 - Present
Cadence Design Systems 2000 - 2002
Adaptive Broadband 1999 - 2000
Motorola 1989 - 1999
Skills
Mergers, Acquisition Integration, Corporate Development, Corporate Strategy..., Sales Finance Leadership, Financial Planning and..., Finance Business..., Finance, Mergers & Acquisitions, Strategy, Business Strategy, Strategic Planning, Strategic Financial..., Outsourcing, Leadership, Corporate Finance, Management, Consulting, Analysis, Pricing, Cross-functional Team..., Start-ups, Financial Planning
Education
University of Phoenix 1993 — 1994
Masters, Business Administration
Arizona State University 1982 — 1986
Bachelors, Corporate Finance
Indira Negi's Cadence Design Systems Experience January 2007 - June 2007
Job at Intel Corporation
Industry Semiconductors
Experience
Intel Corporation January 2015 - Present
Intel Corporation May 2012 - January 2015
Intel Corporation June 2010 - May 2012
Arizona State University, The BioDesign Institute, Center for Bioelectronics and Biosensors May 2008 - May 2010
Broadcom 2008 - 2008
Cadence Design Systems January 2007 - June 2007
Skills
Biosensors, Sensors, PCB design, VLSI, Verilog, EDA, TCL, Firmware, C, Healthcare, Algorithms, Embedded Systems, Signal Processing, Low-power Design, Microcontrollers
Education
Arizona State University 2008 — 2009
MS, Electrical Engineering
DA-IICT 2003 — 2007
Information and Communication Technology, VLSI circuits, Architecture
Brightlands School 1998 — 2003
High School, Physics, Chemistry, Mathematics, Biology, English
Intel Corporation January 2015 - Present
Intel Corporation May 2012 - January 2015
Intel Corporation June 2010 - May 2012
Arizona State University, The BioDesign Institute, Center for Bioelectronics and Biosensors May 2008 - May 2010
Broadcom 2008 - 2008
Cadence Design Systems January 2007 - June 2007
Skills
Biosensors, Sensors, PCB design, VLSI, Verilog, EDA, TCL, Firmware, C, Healthcare, Algorithms, Embedded Systems, Signal Processing, Low-power Design, Microcontrollers
Education
Arizona State University 2008 — 2009
MS, Electrical Engineering
DA-IICT 2003 — 2007
Information and Communication Technology, VLSI circuits, Architecture
Brightlands School 1998 — 2003
High School, Physics, Chemistry, Mathematics, Biology, English
Kris Donate Kris Donate's Cadence Design Systems Experience 1996 - 2005
Job Associate Developer IVR at 3Cinteractive
Industry Computer Software
Experience
3Cinteractive April 2013 - Present
FLGAL Ventures, LLC July 2005 - Present
Applied Research Laboratories, Inc. November 2009 - April 2013
Cadence Design Systems 1996 - 2005
Motorola Semiconductor July 1991 - July 1996
Skills
EDA, IC, Semiconductors, Mixed Signal, ASIC, Analog, TCL, Verilog, Simulations, SoC, Analog Circuit Design, Integrated Circuit..., Perl, RF, Product Lifecycle...
Education
Florida Atlantic University 2011 — 2013
Master of Science (M.S.), Computer Science
The University of Texas at Austin 2001 — 2001
Engineering Management
Arizona State University 1993 — 1995
Microwave/RF Circuit Design
University of Florida 1987 — 1991
BSEE, Electrical Engineering
3Cinteractive April 2013 - Present
FLGAL Ventures, LLC July 2005 - Present
Applied Research Laboratories, Inc. November 2009 - April 2013
Cadence Design Systems 1996 - 2005
Motorola Semiconductor July 1991 - July 1996
Skills
EDA, IC, Semiconductors, Mixed Signal, ASIC, Analog, TCL, Verilog, Simulations, SoC, Analog Circuit Design, Integrated Circuit..., Perl, RF, Product Lifecycle...
Education
Florida Atlantic University 2011 — 2013
Master of Science (M.S.), Computer Science
The University of Texas at Austin 2001 — 2001
Engineering Management
Arizona State University 1993 — 1995
Microwave/RF Circuit Design
University of Florida 1987 — 1991
BSEE, Electrical Engineering
Robert Akins's Cadence Design Systems Experience May 2013 - November 2013
Job Administration, Customer Service, Data Center Technology, Screenwriting
Industry Motion Pictures and Film
Experience
Accenture November 2014 - February 2015
CoreSite November 2013 - June 2014
Cadence Design Systems May 2013 - November 2013
Nordstrom October 2011 - March 2013
Netflix September 2009 - March 2010
Rasputin Music March 2008 - November 2009
Digital Chocolate October 2006 - February 2008
Namco Bandai Games America June 2006 - October 2006
Macy's September 2005 - May 2006
Skills
Final Cut Pro, Photoshop, Adobe Creative Suite, Microsoft Word, Avid, Premiere, Microsoft Office, Microsoft Excel, Oracle, Maya, Renderman, Painter X, Final Draft, Lenel, HP Quality Center, Remedy, OneNote, PowerPoint, Visio, Adobe Acrobat, Social Media Marketing, Creative Writing, Film, Editing, Social Media, Leadership, Graphic Design
Education
Academy of Art University 2008 — 2013
Bachelor of Fine Arts (BFA), Playwriting and Screenwriting
Accenture November 2014 - February 2015
CoreSite November 2013 - June 2014
Cadence Design Systems May 2013 - November 2013
Nordstrom October 2011 - March 2013
Netflix September 2009 - March 2010
Rasputin Music March 2008 - November 2009
Digital Chocolate October 2006 - February 2008
Namco Bandai Games America June 2006 - October 2006
Macy's September 2005 - May 2006
Skills
Final Cut Pro, Photoshop, Adobe Creative Suite, Microsoft Word, Avid, Premiere, Microsoft Office, Microsoft Excel, Oracle, Maya, Renderman, Painter X, Final Draft, Lenel, HP Quality Center, Remedy, OneNote, PowerPoint, Visio, Adobe Acrobat, Social Media Marketing, Creative Writing, Film, Editing, Social Media, Leadership, Graphic Design
Education
Academy of Art University 2008 — 2013
Bachelor of Fine Arts (BFA), Playwriting and Screenwriting
Shree Sekar Shree Sekar's Cadence Design Systems Experience June 2011 - September 2011
Job Workday HCM Consultant at Preejay Systems
Industry Information Technology and Services
Experience
eBay September 2011 - Present
Cadence Design Systems June 2011 - September 2011
NETAGE Inc. March 2008 - June 2011
Xansa July 2006 - January 2007
Skills
Workday EIBs, Workday iLoads, Workday Integration, Workday Implementation, ABAP, SAP Implementation, Requirements Analysis, Data Migration, SAP HR, Business Analysis, SAP Netweaver, SAP ERP, SAP R/3, SAP Portal, Integration, Mini-Master..., SAP Integration, Solution Architecture, Business Process, Program Management, Leadership, Workday HCM
Education
Anna University 2002 — 2006
BS
eBay September 2011 - Present
Cadence Design Systems June 2011 - September 2011
NETAGE Inc. March 2008 - June 2011
Xansa July 2006 - January 2007
Skills
Workday EIBs, Workday iLoads, Workday Integration, Workday Implementation, ABAP, SAP Implementation, Requirements Analysis, Data Migration, SAP HR, Business Analysis, SAP Netweaver, SAP ERP, SAP R/3, SAP Portal, Integration, Mini-Master..., SAP Integration, Solution Architecture, Business Process, Program Management, Leadership, Workday HCM
Education
Anna University 2002 — 2006
BS
Andreas Kuehlmann Andreas Kuehlmann's Cadence Design Systems Experience September 2003 - September 2010
Job Senior Vice President and General Manager, Software Integrity Group at Synopsys Inc
Industry Computer Software
Experience
Synopsys Inc May 2015 - Present
UC Berkeley, Department of Electrical Engineering and Computer Science July 2002 - Present
Synopsys Inc March 2014 - April 2015
Coverity October 2010 - March 2014
IEEE Council on Electronic Design Automation January 2010 - December 2012
Cadence Design Systems September 2003 - September 2010
Cadence Berkeley Laboratories July 2000 - August 2003
University of New South Wales September 2002 - December 2002
IBM Thomas J. Watson Research Center March 1993 - June 2000
UC Berkeley, Department of Electrical Engineering and Computer Science January 1998 - May 1999
Skills
C++, EDA, Embedded Systems, Algorithms, Software Engineering
Education
Technische Universität Ilmenau 1986 — 1990
Dr.-Ing. habil, Electrical Engineering
Technische Universität Ilmenau 1981 — 1986
Dipl.-Ing., Electrical Engineering
Synopsys Inc May 2015 - Present
UC Berkeley, Department of Electrical Engineering and Computer Science July 2002 - Present
Synopsys Inc March 2014 - April 2015
Coverity October 2010 - March 2014
IEEE Council on Electronic Design Automation January 2010 - December 2012
Cadence Design Systems September 2003 - September 2010
Cadence Berkeley Laboratories July 2000 - August 2003
University of New South Wales September 2002 - December 2002
IBM Thomas J. Watson Research Center March 1993 - June 2000
UC Berkeley, Department of Electrical Engineering and Computer Science January 1998 - May 1999
Skills
C++, EDA, Embedded Systems, Algorithms, Software Engineering
Education
Technische Universität Ilmenau 1986 — 1990
Dr.-Ing. habil, Electrical Engineering
Technische Universität Ilmenau 1981 — 1986
Dipl.-Ing., Electrical Engineering
Carolyn Casey's Cadence Design Systems Experience August 1999 - April 2003
Job Lawyer. Legal Marketing Strategist. Analyst.
Industry Information Technology and Services
Experience
Consultant / Independent August 2015 - Present
Zapproved February 2015 - August 2015
Iron Mountain January 2011 - February 2015
Iron Mountain July 2010 - March 2011
Fios Inc February 2009 - February 2010
Mentor Graphics April 2003 - April 2007
Cadence Design Systems August 1999 - April 2003
OrCAD June 1998 - August 1999
Oregon Economic Development 1993 - 1997
The Sharper Image (Affiliate) January 1992 - December 1992
Skills
SaaS, Salesforce.com, Enterprise Software, Lead Generation, Product Marketing, Product Management, Professional Services, Business Development, Strategic Planning, Contract Negotiation, Marketing Strategy, Cloud Computing, Cross-functional Team..., Competitive Analysis, Intellectual Property, Sales Operations, Solution Selling, Strategy, CRM, Leadership, Go-to-market Strategy, Management
Education
Stanford University 1976 — 1980
AB, Political Science, studies included Art History, Italian
American University, Washington College of Law 1985 — 1988
J.D., Law, International Business
Consultant / Independent August 2015 - Present
Zapproved February 2015 - August 2015
Iron Mountain January 2011 - February 2015
Iron Mountain July 2010 - March 2011
Fios Inc February 2009 - February 2010
Mentor Graphics April 2003 - April 2007
Cadence Design Systems August 1999 - April 2003
OrCAD June 1998 - August 1999
Oregon Economic Development 1993 - 1997
The Sharper Image (Affiliate) January 1992 - December 1992
Skills
SaaS, Salesforce.com, Enterprise Software, Lead Generation, Product Marketing, Product Management, Professional Services, Business Development, Strategic Planning, Contract Negotiation, Marketing Strategy, Cloud Computing, Cross-functional Team..., Competitive Analysis, Intellectual Property, Sales Operations, Solution Selling, Strategy, CRM, Leadership, Go-to-market Strategy, Management
Education
Stanford University 1976 — 1980
AB, Political Science, studies included Art History, Italian
American University, Washington College of Law 1985 — 1988
J.D., Law, International Business
Christine Cavagnaro Christine Cavagnaro's Cadence Design Systems Experience 1997 - 2004
Job North America Eolas Specialist
Industry Computer Networking
Experience
Juniper Networks June 2010 - Present
Equinix 2005 - 2007
Cadence Design Systems 1997 - 2004
AMD 1989 - 1997
Honeywell Commercial Construction 1983 - 1989
Skills
Cloud Computing, Data Center, Salesforce.com, Management, Business Development, SaaS, Budgets, Network Security, Database Administration, Contracts Administrators, Adobe Connect, Microsoft Excel, PowerPoint, Meeting Scheduling, Meeting Planning, Construction..., Cross-functional Team..., Solution Selling, Product Marketing, Go-to-market Strategy, Enterprise Software, Program Management
Education
Art Institute of Pittsburgh 2008 — 2010
Diploma, Digital Design
El Camino High School
Juniper Networks June 2010 - Present
Equinix 2005 - 2007
Cadence Design Systems 1997 - 2004
AMD 1989 - 1997
Honeywell Commercial Construction 1983 - 1989
Skills
Cloud Computing, Data Center, Salesforce.com, Management, Business Development, SaaS, Budgets, Network Security, Database Administration, Contracts Administrators, Adobe Connect, Microsoft Excel, PowerPoint, Meeting Scheduling, Meeting Planning, Construction..., Cross-functional Team..., Solution Selling, Product Marketing, Go-to-market Strategy, Enterprise Software, Program Management
Education
Art Institute of Pittsburgh 2008 — 2010
Diploma, Digital Design
El Camino High School
Carl Hoxeng Carl Hoxeng's Cadence Design Systems Experience April 2013 - January 2014
Job
Industry Legal Services
Experience
Cadence Design Systems April 2013 - January 2014
Tensilica, Inc. August 2011 - April 2013
Virage Logic Corporation July 2000 - November 2010
Motorola Semiconductor (now Freescale) March 1998 - July 2000
American Express 1996 - 1998
Viewlogic Systems, Inc. 1992 - 1996
Skills
Semiconductors, Intellectual Property, ASIC, Product Management, SoC, EDA, Contract Negotiation, Processors, IC, Cross-functional Team..., Manufacturing, Verilog, VLSI, Wireless, Hardware Architecture, Licensing, Sales, Start-ups, FPGA, Management, Strategic Partnerships, Negotiation, Mergers & Acquisitions, Product Marketing, Enterprise Software, Semiconductor Industry, Contract Law, Embedded Systems, Contract Management, Consulting, International Sales, Leadership
Education
The University of Texas at Austin
Intellectual Property Law Specialist Certificate Program
Suffolk University - Sawyer School of Management
MBA
Arizona State University
BS
University of California, Irvine
Certificate
Thunderbird School of Global Management
Cadence Design Systems April 2013 - January 2014
Tensilica, Inc. August 2011 - April 2013
Virage Logic Corporation July 2000 - November 2010
Motorola Semiconductor (now Freescale) March 1998 - July 2000
American Express 1996 - 1998
Viewlogic Systems, Inc. 1992 - 1996
Skills
Semiconductors, Intellectual Property, ASIC, Product Management, SoC, EDA, Contract Negotiation, Processors, IC, Cross-functional Team..., Manufacturing, Verilog, VLSI, Wireless, Hardware Architecture, Licensing, Sales, Start-ups, FPGA, Management, Strategic Partnerships, Negotiation, Mergers & Acquisitions, Product Marketing, Enterprise Software, Semiconductor Industry, Contract Law, Embedded Systems, Contract Management, Consulting, International Sales, Leadership
Education
The University of Texas at Austin
Intellectual Property Law Specialist Certificate Program
Suffolk University - Sawyer School of Management
MBA
Arizona State University
BS
University of California, Irvine
Certificate
Thunderbird School of Global Management
Bill Jason Tomas Bill Jason Tomas's Cadence Design Systems Experience December 2013 - Present
Job FPGA Prototyping Solutions Engineer II
Industry Computer Software
Experience
Cadence Design Systems December 2013 - Present
Aldec August 2012 - November 2013
University of Nevada Las Vegas August 2011 - November 2013
BMM June 2012 - August 2012
Skills
FPGA, BIST, RTL design, C++, Xilinx ISE, Computer Architecture, VLSI, SoC, Hardware Testing, ASIC, Embedded Systems, C, Xilinx, Testing, VHDL, Simulations, Hardware, Verilog, Altera Quartus, Debugging
Education
University of Nevada-Las Vegas 2011 — 2014
Master's Degree, Electrical and Electronics Engineering, 3.92/4.0
Auburn University 2008 — 2011
Bachelor of Science (B.S.), Computer Engineering
Columbus State University
Hohenfels High School
Cadence Design Systems December 2013 - Present
Aldec August 2012 - November 2013
University of Nevada Las Vegas August 2011 - November 2013
BMM June 2012 - August 2012
Skills
FPGA, BIST, RTL design, C++, Xilinx ISE, Computer Architecture, VLSI, SoC, Hardware Testing, ASIC, Embedded Systems, C, Xilinx, Testing, VHDL, Simulations, Hardware, Verilog, Altera Quartus, Debugging
Education
University of Nevada-Las Vegas 2011 — 2014
Master's Degree, Electrical and Electronics Engineering, 3.92/4.0
Auburn University 2008 — 2011
Bachelor of Science (B.S.), Computer Engineering
Columbus State University
Hohenfels High School
Prameela Ray Prameela Ray's Cadence Design Systems Experience 2000 - 2003
Job Owner at coinLess Laundry and SpinNKleen
Industry Retail
Experience
Spin-N-Kleen December 2010 - Present
coinless Laundry April 2005 - Present
Austin Women in Technology (AWT) June 2010 - June 2013
Cadence Design systems 2000 - 2003
Motorola Mobility September 1999 - December 2000
Skills
Strategic Planning, Marketing Strategy, Cross-functional Team..., Management, Strategy, Integration, IP, Training, Data Analysis, Semiconductors, Team Management, Team Building, Microsoft Excel
Education
Atomic Energy Central School 1974 — 1985
HS
Osmania University
Bachelor of Engineering (BE) in EE
The University of Texas at Arlington
MS. BioMedical Engineering
Spin-N-Kleen December 2010 - Present
coinless Laundry April 2005 - Present
Austin Women in Technology (AWT) June 2010 - June 2013
Cadence Design systems 2000 - 2003
Motorola Mobility September 1999 - December 2000
Skills
Strategic Planning, Marketing Strategy, Cross-functional Team..., Management, Strategy, Integration, IP, Training, Data Analysis, Semiconductors, Team Management, Team Building, Microsoft Excel
Education
Atomic Energy Central School 1974 — 1985
HS
Osmania University
Bachelor of Engineering (BE) in EE
The University of Texas at Arlington
MS. BioMedical Engineering
Raghu Anna Raghu Anna's Cadence Design Systems Experience 1999 - 2000
Job
Industry Semiconductors
Experience
Cirrus Logic 2009 - 2012
IBM 2008 - 2009
IBM 2000 - 2008
Cadence Design Systems 1999 - 2000
Silvaco 1997 - 1999
Auburn University 1997 - 1997
Education
Tuskegee University 1995 — 1997
M.S.
Andhra University 1991 — 1995
B.E.
Cirrus Logic 2009 - 2012
IBM 2008 - 2009
IBM 2000 - 2008
Cadence Design Systems 1999 - 2000
Silvaco 1997 - 1999
Auburn University 1997 - 1997
Education
Tuskegee University 1995 — 1997
M.S.
Andhra University 1991 — 1995
B.E.
Vuong Ho's Cadence Design Systems Experience December 2004 - Present
Job Sr. Web Technologist at Cadence Design Systems
Industry Internet
Experience
Cadence Design Systems December 2004 - Present
A-Tech Consulting, Inc September 2003 - March 2004
Skills
HTML, JavaScript, jQuery, jQuery Mobile, C#, ASP.NET, CSS3, Microsoft SQL Server, Joomla, SharePoint, Adobe AEM, Zimbra Community
Education
San Jose State University 2001 — 2003
BS, Computer Science
Asia-Pacific International University 1997 — 2000
BS, Computer Science
Cadence Design Systems December 2004 - Present
A-Tech Consulting, Inc September 2003 - March 2004
Skills
HTML, JavaScript, jQuery, jQuery Mobile, C#, ASP.NET, CSS3, Microsoft SQL Server, Joomla, SharePoint, Adobe AEM, Zimbra Community
Education
San Jose State University 2001 — 2003
BS, Computer Science
Asia-Pacific International University 1997 — 2000
BS, Computer Science
Peter J. Farrell's Cadence Design Systems Experience June 2011 - September 2011
Job Research Assistant to Prof. Samir Parikh
Industry Law Practice
Experience
Lewis & Clark Law School May 2015 - Present
Gillaspy & Rhode, PLLC November 2014 - August 2015
Steel & Fence Supply June 2004 - August 2013
Cadence Design Systems June 2011 - September 2011
Education
Lewis & Clark Law School 2014 — 2016
Doctor of Law (JD), Law
Santa Clara University - Leavey School of Business 2014 — 2015
Certificate of Advanced Accounting Proficiency, Accounting
American University Washington College of Law 2013 — 2014
First Year of Law School, Law
Santa Clara University 2007 — 2011
Bachelor of Arts (BA), English Language and Literature
Lewis & Clark Law School May 2015 - Present
Gillaspy & Rhode, PLLC November 2014 - August 2015
Steel & Fence Supply June 2004 - August 2013
Cadence Design Systems June 2011 - September 2011
Education
Lewis & Clark Law School 2014 — 2016
Doctor of Law (JD), Law
Santa Clara University - Leavey School of Business 2014 — 2015
Certificate of Advanced Accounting Proficiency, Accounting
American University Washington College of Law 2013 — 2014
First Year of Law School, Law
Santa Clara University 2007 — 2011
Bachelor of Arts (BA), English Language and Literature
Jaime Hernandez Jaime Hernandez's Cadence Design Systems Experience February 2001 - July 2004
Job MidMarket Sales Executive at Saba Software
Industry Computer Software
Experience
Saba Software March 2014 - Present
SkillSoft April 2012 - February 2014
DataSphere Technologies Inc. July 2011 - May 2012
SuperMedia LLC June 2006 - May 2010
Cadence Design Systems February 2001 - July 2004
MicroAge February 1996 - June 1999
Skills
Microsoft Office, Salesforce.com, Bilingual-Spanish, Spanish, SEM, CRM software, Account Management, Customer Relations, Education, Federal Government Sales, Higher Education, military sales, Defense Industry, Fortune 500, Fortune 1000, SEO, Latin America, SaaS, Solution Selling, Sales Management, Team Leadership, E-Learning, CRM, Sales, Management, Customer Service, Online Advertising, Training, Channel Partners, Business Development, Leadership
Education
Arizona State University 1991 — 1995
BS, Sociology
Sleepy Hollow HS
Saba Software March 2014 - Present
SkillSoft April 2012 - February 2014
DataSphere Technologies Inc. July 2011 - May 2012
SuperMedia LLC June 2006 - May 2010
Cadence Design Systems February 2001 - July 2004
MicroAge February 1996 - June 1999
Skills
Microsoft Office, Salesforce.com, Bilingual-Spanish, Spanish, SEM, CRM software, Account Management, Customer Relations, Education, Federal Government Sales, Higher Education, military sales, Defense Industry, Fortune 500, Fortune 1000, SEO, Latin America, SaaS, Solution Selling, Sales Management, Team Leadership, E-Learning, CRM, Sales, Management, Customer Service, Online Advertising, Training, Channel Partners, Business Development, Leadership
Education
Arizona State University 1991 — 1995
BS, Sociology
Sleepy Hollow HS
Eric J Ostrander Eric J Ostrander's Cadence Design Systems Experience September 2006 - October 2008
Job ClearCase/ClearQuest Administrator at Xerox
Industry Computer Software
Experience
Xerox February 2014 - Present
Ostrander Consulting, Inc. September 2011 - Present
Honeywell Aerospace September 2011 - December 2013
Mayo Clinic April 2011 - August 2011
Fannie Mae November 2008 - November 2010
Cadence Design Systems September 2006 - October 2008
Wells Fargo Advisors September 2004 - September 2006
Spectrum Astro, Inc. October 2003 - September 2004
Rational Software May 1999 - October 2003
Skills
Testing, UCM, ClearQuest, Perl, Consulting, Software Development, Requirements Analysis, Solaris, Scripting, Agile Methodologies, ClearCase, Unix, Integration, VBScript, SDLC, Java, Enterprise Architecture, Software Documentation, Architecture, Software Project..., Oracle, Subversion, Software Configuration..., Configuration Management, RequisitePro
Education
Arizona State University 1991 — 1994
Bachelor of Science (BS), Physics
Xerox February 2014 - Present
Ostrander Consulting, Inc. September 2011 - Present
Honeywell Aerospace September 2011 - December 2013
Mayo Clinic April 2011 - August 2011
Fannie Mae November 2008 - November 2010
Cadence Design Systems September 2006 - October 2008
Wells Fargo Advisors September 2004 - September 2006
Spectrum Astro, Inc. October 2003 - September 2004
Rational Software May 1999 - October 2003
Skills
Testing, UCM, ClearQuest, Perl, Consulting, Software Development, Requirements Analysis, Solaris, Scripting, Agile Methodologies, ClearCase, Unix, Integration, VBScript, SDLC, Java, Enterprise Architecture, Software Documentation, Architecture, Software Project..., Oracle, Subversion, Software Configuration..., Configuration Management, RequisitePro
Education
Arizona State University 1991 — 1994
Bachelor of Science (BS), Physics
Puneet Maheshwari's Cadence Design Systems Experience 2000 - 2004
Job CEO, DocASAP
Industry Internet
Experience
DocASAP.com June 2012 - Present
Freescale Semiconductor October 2011 - January 2013
McKinsey & Company October 2009 - October 2011
Coware Inc. January 2004 - July 2007
Cadence Design Systems 2000 - 2004
Infosys 1999 - 2000
Education
University of Pennsylvania - The Wharton School 2007 — 2009
MBA
Aligarh Muslim University 1995 — 1999
B-Tech
St Gabriels Academy 1982 — 1994
St. Gabriel's Academy
DocASAP.com June 2012 - Present
Freescale Semiconductor October 2011 - January 2013
McKinsey & Company October 2009 - October 2011
Coware Inc. January 2004 - July 2007
Cadence Design Systems 2000 - 2004
Infosys 1999 - 2000
Education
University of Pennsylvania - The Wharton School 2007 — 2009
MBA
Aligarh Muslim University 1995 — 1999
B-Tech
St Gabriels Academy 1982 — 1994
St. Gabriel's Academy
Matt Egner Matt Egner's Cadence Design Systems Experience June 2005 - Present
Job Principal Engineer at Cadence
Industry Computer Software
Experience
Cadence Design Systems June 2005 - Present
Canada Border Services Agency January 2003 - May 2005
Independant Consultant September 2002 - December 2003
Chrysalis-ITS January 1999 - September 2001
Skills
Perl, Software Development, Java, Testing, Test Automation, Technical Documentation, Quality Assurance, Web Development, Linux, Software Engineering, C++, C, Software Documentation, Unix, Windows, Test Planning, Debugging, Shell Scripting, Agile Methodologies, Embedded Systems, TCL, Embedded Software, ClearCase, Regression Testing, Mining Exploration, Project Management, ASIC, Device Drivers, IC, EDA, System Architecture, Software Design, Multithreading, RTOS, ARM, FPGA
Education
Algonquin College of Applied Arts and Technology 1997 — 1999
CIS, programming
Carleton University
MSc, Earth Science
Cadence Design Systems June 2005 - Present
Canada Border Services Agency January 2003 - May 2005
Independant Consultant September 2002 - December 2003
Chrysalis-ITS January 1999 - September 2001
Skills
Perl, Software Development, Java, Testing, Test Automation, Technical Documentation, Quality Assurance, Web Development, Linux, Software Engineering, C++, C, Software Documentation, Unix, Windows, Test Planning, Debugging, Shell Scripting, Agile Methodologies, Embedded Systems, TCL, Embedded Software, ClearCase, Regression Testing, Mining Exploration, Project Management, ASIC, Device Drivers, IC, EDA, System Architecture, Software Design, Multithreading, RTOS, ARM, FPGA
Education
Algonquin College of Applied Arts and Technology 1997 — 1999
CIS, programming
Carleton University
MSc, Earth Science
David Varn's Cadence Design Systems Experience June 1992 - November 1998
Job Partner at BetterIP
Industry Law Practice
Experience
Varn Intellectual Property June 2013 - Present
BetterIP December 2011 - Present
Olea Systems, Inc April 2011 - June 2013
Green Vision Cafe January 2009 - January 2012
Computer History Museum June 2006 - December 2011
Fenwick & West LLP October 2004 - June 2006
Pennie & Edmonds LLP June 2003 - August 2003
Morphics Technology, Inc December 1998 - April 2001
Cadence Design Systems June 1992 - November 1998
Technical Applied Signal Technology, Inc January 1987 - January 1992
Skills
Patent Prosecution, Patents, Intellectual Property, Electric Vehicles, Patent Litigation, Licensing, Enterprise Software, Trademarks, Product Marketing, Wireless, Patentability, E-commerce, Invention, Mobile Devices, Integration
Education
Santa Clara University School of Law 2000 — 2004
J.D., Hi-Tech Law, Intellectual Property Law
Arizona State University
M.S.E.E, communications systems
The University of Akron
B.S.E.E, Communications and Controls
Varn Intellectual Property June 2013 - Present
BetterIP December 2011 - Present
Olea Systems, Inc April 2011 - June 2013
Green Vision Cafe January 2009 - January 2012
Computer History Museum June 2006 - December 2011
Fenwick & West LLP October 2004 - June 2006
Pennie & Edmonds LLP June 2003 - August 2003
Morphics Technology, Inc December 1998 - April 2001
Cadence Design Systems June 1992 - November 1998
Technical Applied Signal Technology, Inc January 1987 - January 1992
Skills
Patent Prosecution, Patents, Intellectual Property, Electric Vehicles, Patent Litigation, Licensing, Enterprise Software, Trademarks, Product Marketing, Wireless, Patentability, E-commerce, Invention, Mobile Devices, Integration
Education
Santa Clara University School of Law 2000 — 2004
J.D., Hi-Tech Law, Intellectual Property Law
Arizona State University
M.S.E.E, communications systems
The University of Akron
B.S.E.E, Communications and Controls
Daniel Hinkle Daniel Hinkle's Cadence Design Systems Experience January 1997 - February 2000
Job President & General Manager at The Wellness Hour
Industry Health, Wellness and Fitness
Experience
Wellness HourTV Show May 2015 - Present
ClearChoice Dental Implant Centers October 2013 - May 2015
DFine, Inc. December 2012 - October 2013
DentalMarketingUniverse.com August 2011 - December 2012
Nobel Biocare December 2008 - July 2011
Nobel Biocare January 2008 - December 2008
Nobel Biocare October 2005 - December 2007
Sound Surgical Technologies June 2002 - September 2005
eVoiceVison May 2000 - May 2002
Cadence Design Systems January 1997 - February 2000
Skills
Marketing Strategy, Public Speaking, Brand Development, Healthcare Marketing, Web Strategy, Digital Signage, Video Production, script writing, Web Development, SEO, Business Development, Marketing, Selling Skills, Content Development, Screenwriting, Strategy, Competitive Analysis, Product Marketing, Advertising, Strategic Planning, Sales Management, Entrepreneurship, CRM, E-commerce, Business Strategy, Sales Operations, Digital Media, Leadership, Sales, Training, Management Consulting, Healthcare, Business Planning, Management, Medical Devices, SEM, Product Launch, Solution Selling, Market Development, Capital Equipment, Selling, Trade Shows, Marketing Management, Start-ups, New Business Development, Social Media, Account Management, Direct Sales, Sales Process, Strategic Partnerships
Education
Cumberland College 1980 — 1982
BS, Business Administration
Alma College 1978 — 1980
BS, Business Administration
Jackson High School 1975 — 1978
Wellness HourTV Show May 2015 - Present
ClearChoice Dental Implant Centers October 2013 - May 2015
DFine, Inc. December 2012 - October 2013
DentalMarketingUniverse.com August 2011 - December 2012
Nobel Biocare December 2008 - July 2011
Nobel Biocare January 2008 - December 2008
Nobel Biocare October 2005 - December 2007
Sound Surgical Technologies June 2002 - September 2005
eVoiceVison May 2000 - May 2002
Cadence Design Systems January 1997 - February 2000
Skills
Marketing Strategy, Public Speaking, Brand Development, Healthcare Marketing, Web Strategy, Digital Signage, Video Production, script writing, Web Development, SEO, Business Development, Marketing, Selling Skills, Content Development, Screenwriting, Strategy, Competitive Analysis, Product Marketing, Advertising, Strategic Planning, Sales Management, Entrepreneurship, CRM, E-commerce, Business Strategy, Sales Operations, Digital Media, Leadership, Sales, Training, Management Consulting, Healthcare, Business Planning, Management, Medical Devices, SEM, Product Launch, Solution Selling, Market Development, Capital Equipment, Selling, Trade Shows, Marketing Management, Start-ups, New Business Development, Social Media, Account Management, Direct Sales, Sales Process, Strategic Partnerships
Education
Cumberland College 1980 — 1982
BS, Business Administration
Alma College 1978 — 1980
BS, Business Administration
Jackson High School 1975 — 1978
David Guillou's Cadence Design Systems Experience November 2004 - June 2005
Job CTO/CEO, Cymatics Laboratories Corp.
Industry Semiconductors
Experience
Cymatics Laboratories Corp. March 2009 - Present
Renaissance Wireless Corp. July 2005 - February 2009
Cadence Design Systems November 2004 - June 2005
IC Mechanics, Inc. 2001 - November 2004
PCB Piezotronics July 1991 - August 1993
Skills
Semiconductors, Analog, Mixed Signal, Sensors, IC, Analog Design, MEMS, Circuit Design, Analog Circuit Design, Engineering Management, RF, SoC, Electronics, EDA, Integrated Circuit..., ASIC, Digital Signal..., Hardware Architecture
Education
Carnegie Mellon University 1993 — 2001
Ph.D., Electrical Engineering
University at Buffalo 1991 — 1993
MS EE, Electrical Engineering
Institut national des Sciences appliquées de Rennes 1986 — 1991
BS EE, Electrical Engineering
Cymatics Laboratories Corp. March 2009 - Present
Renaissance Wireless Corp. July 2005 - February 2009
Cadence Design Systems November 2004 - June 2005
IC Mechanics, Inc. 2001 - November 2004
PCB Piezotronics July 1991 - August 1993
Skills
Semiconductors, Analog, Mixed Signal, Sensors, IC, Analog Design, MEMS, Circuit Design, Analog Circuit Design, Engineering Management, RF, SoC, Electronics, EDA, Integrated Circuit..., ASIC, Digital Signal..., Hardware Architecture
Education
Carnegie Mellon University 1993 — 2001
Ph.D., Electrical Engineering
University at Buffalo 1991 — 1993
MS EE, Electrical Engineering
Institut national des Sciences appliquées de Rennes 1986 — 1991
BS EE, Electrical Engineering
Sherrie McCaskey's Cadence Design Systems Experience 1998 - 1998
Job Associate at Booz Allen Hamilton
Industry Defense & Space
Experience
Booz Allen Hamilton September 1998 - Present
Cisco Systems 2000 - 2001
BioSearch July 1995 - January 1998
Cadence Design Systems 1998 - 1998
The University of North Carolina at Chapel Hill October 1991 - June 1995
Education
Appalachian State University 1981 — 1986
Watagua High School 1979 — 1981
Booz Allen Hamilton September 1998 - Present
Cisco Systems 2000 - 2001
BioSearch July 1995 - January 1998
Cadence Design Systems 1998 - 1998
The University of North Carolina at Chapel Hill October 1991 - June 1995
Education
Appalachian State University 1981 — 1986
Watagua High School 1979 — 1981
Chetan Paul's Cadence Design Systems Experience July 1998 - December 1998
Job CTO Business Unit (Health)
Industry Information Technology and Services
Experience
Independent Consultant April 2014 - Present
SRA International December 2011 - April 2014
Acumen Solutions February 2010 - December 2011
Aricent Technologies (Holdings) Ltd, USA November 2003 - August 2011
Hughes Software Systems November 2001 - November 2003
Cadence Design Systems July 1998 - December 1998
Skills
Oracle, XML, ESB, Web Services, Project Management, Project Planning, LDAP, Automation, Analysis, SID, TAM, Oracle Fusion Middleware, Oracle SOA Suite, Oracle BPEL, Oracle Service Bus, Weblogic, JMeter, Oracle ADF, TOGAF, Oracle Business Rules, Oracle BAM, Oracle Identity Manager, Oracle Access Manager, Oracle Entitlement..., REST, SOAP, SoapUI, BPMN 2.0, Oracle Virtual Directory, Oracle Database 11g, Exalogic, Exadata, Identity Management, Single Sign On, Integration, SOA, Spring, Java, Application Architecture, Java Enterprise Edition, Enterprise Software, BPMN, ADF, SSO, UML, WebLogic, SDLC, Requirements Analysis, Agile Methodologies
Education
Birla Institute of Technology and Science, Pilani 1996 — 1998
M. Tech
Amravati University 1990 — 1994
B. Tech
Independent Consultant April 2014 - Present
SRA International December 2011 - April 2014
Acumen Solutions February 2010 - December 2011
Aricent Technologies (Holdings) Ltd, USA November 2003 - August 2011
Hughes Software Systems November 2001 - November 2003
Cadence Design Systems July 1998 - December 1998
Skills
Oracle, XML, ESB, Web Services, Project Management, Project Planning, LDAP, Automation, Analysis, SID, TAM, Oracle Fusion Middleware, Oracle SOA Suite, Oracle BPEL, Oracle Service Bus, Weblogic, JMeter, Oracle ADF, TOGAF, Oracle Business Rules, Oracle BAM, Oracle Identity Manager, Oracle Access Manager, Oracle Entitlement..., REST, SOAP, SoapUI, BPMN 2.0, Oracle Virtual Directory, Oracle Database 11g, Exalogic, Exadata, Identity Management, Single Sign On, Integration, SOA, Spring, Java, Application Architecture, Java Enterprise Edition, Enterprise Software, BPMN, ADF, SSO, UML, WebLogic, SDLC, Requirements Analysis, Agile Methodologies
Education
Birla Institute of Technology and Science, Pilani 1996 — 1998
M. Tech
Amravati University 1990 — 1994
B. Tech
Maq Mannan's Cadence Design Systems Experience February 2002 - January 2009
Job Consultant
Industry Computer Software
Experience
Self November 2014 - Present
Global Foundries June 2009 - October 2014
Cadence Design Systems February 2002 - January 2009
DSM Technologies Inc. November 1997 - January 2002
National Semiconductor 1994 - 1997
Skills
Semiconductors, EDA, ASIC, IC, Product Marketing, SoC, Start-ups, Product Management, Management, Integrated Circuit..., Product, Foundries, Software Development
Education
Arizona State University
Master’s Degree, Computer Engineering
Bangladesh University of Engineering and Technology
Bachelor’s Degree, Electrical Engineering
Self November 2014 - Present
Global Foundries June 2009 - October 2014
Cadence Design Systems February 2002 - January 2009
DSM Technologies Inc. November 1997 - January 2002
National Semiconductor 1994 - 1997
Skills
Semiconductors, EDA, ASIC, IC, Product Marketing, SoC, Start-ups, Product Management, Management, Integrated Circuit..., Product, Foundries, Software Development
Education
Arizona State University
Master’s Degree, Computer Engineering
Bangladesh University of Engineering and Technology
Bachelor’s Degree, Electrical Engineering
Juliana Tou's Cadence Design Systems Experience June 2003 - August 2003
Job Project Management, Communication, Editing, Training
Industry Medical Devices
Experience
Abbott Diabetes Care (Abbott Laboratories) December 2005 - Present
Mervyn's LLC October 2005 - December 2005
Fremont Unified School District August 1997 - June 2005
Cadence Design Systems June 2003 - August 2003
Shanghai Foreign Language School August 1994 - July 1995
Skills
Instructional Design, Technical Skills:..., Training, Leadership, Cross-functional Team..., Editing, Curriculum Design, Teaching, Human Resources, Management, Product Development, Agile Methodologies, E-Learning, Creative Direction, Instructor-led Training, Technical Writing
Education
Central Michigan University 1995 — 1997
M.A.
Arizona State University 1990 — 1994
B.A.
Midland High School 1987 — 1990
High School
Abbott Diabetes Care (Abbott Laboratories) December 2005 - Present
Mervyn's LLC October 2005 - December 2005
Fremont Unified School District August 1997 - June 2005
Cadence Design Systems June 2003 - August 2003
Shanghai Foreign Language School August 1994 - July 1995
Skills
Instructional Design, Technical Skills:..., Training, Leadership, Cross-functional Team..., Editing, Curriculum Design, Teaching, Human Resources, Management, Product Development, Agile Methodologies, E-Learning, Creative Direction, Instructor-led Training, Technical Writing
Education
Central Michigan University 1995 — 1997
M.A.
Arizona State University 1990 — 1994
B.A.
Midland High School 1987 — 1990
High School
Satish D Mani MBA PMP's Cadence Design Systems Experience October 2003 - August 2004
Job Exceptional Business and IT Consulting at Redcloud Systems LLC
Industry Information Technology and Services
Experience
Redcloud Systems LLC December 2012 - Present
Alorica April 2009 - October 2012
National City Bank August 2007 - November 2008
General Electric Co June 2005 - April 2006
Cisco Systems October 2004 - April 2005
Cadence Design Systems October 2003 - August 2004
Oracle Corporation July 2001 - May 2003
Institute of Supply Management (NAPM), August 2000 - May 2001
Apple Computer May 2000 - August 2000
Tata Motors August 1997 - June 1999
Skills
Oracle E-Business Suite, Oracle Discoverer, Oracle Reports, Oracle SQL, MS Reporting Services, Business Intelligence, Cross-functional Team..., Program Management, Project Management, Six Sigma, Software Documentation, Quality Assurance, Product Management, Analysis, Management, ITIL, Training, Testing, Requirements Gathering, Oracle, Vendor Management, SDLC, Business Process..., Workforce Management, Workforce Planning
Education
Arizona State University, W. P. Carey School of Business
Masters in Business Administration
College of Engineering, Guindy
Bachelor of Science (B.S.)
Redcloud Systems LLC December 2012 - Present
Alorica April 2009 - October 2012
National City Bank August 2007 - November 2008
General Electric Co June 2005 - April 2006
Cisco Systems October 2004 - April 2005
Cadence Design Systems October 2003 - August 2004
Oracle Corporation July 2001 - May 2003
Institute of Supply Management (NAPM), August 2000 - May 2001
Apple Computer May 2000 - August 2000
Tata Motors August 1997 - June 1999
Skills
Oracle E-Business Suite, Oracle Discoverer, Oracle Reports, Oracle SQL, MS Reporting Services, Business Intelligence, Cross-functional Team..., Program Management, Project Management, Six Sigma, Software Documentation, Quality Assurance, Product Management, Analysis, Management, ITIL, Training, Testing, Requirements Gathering, Oracle, Vendor Management, SDLC, Business Process..., Workforce Management, Workforce Planning
Education
Arizona State University, W. P. Carey School of Business
Masters in Business Administration
College of Engineering, Guindy
Bachelor of Science (B.S.)
Frank Zavosh's Cadence Design Systems Experience January 2007 - December 2008
Job Staff Application Engineer
Industry Computer Software
Experience
Cadence Design Systems (through Sigrity acquisition) July 2012 - Present
Sigrity March 2011 - July 2012
Antennovation January 2009 - February 2011
Cadence Design Systems January 2007 - December 2008
NXP Semiconductors August 2006 - December 2006
Philips Electronics April 2002 - July 2006
E-Tenna Corporation January 2001 - March 2002
Motorola Semiconductor July 1997 - December 2000
Paranet November 1995 - June 1997
Skills
Signal Integrity, Electromagnetics, Agilent ADS, HFSS, CST Microwave Studio, Antenna Design, Circuit Simulation, Cadence Virtuoso, RF systems, RF design, Matlab, eda, Red Hat Linux, HP-UX, Unix Administration, Unix Shell Scripting, System Administration, Perl, Fortran, C, Database Administration, Web Design, Scilab, EDA, Simulations, Antennas, Smith Chart, Transmission Lines, Microwave, Cadence, ANSYS, Unix, Billing Systems
Education
Arizona State University 1993 — 1995
PhD, Electrical Engineering
Arizona State University 1991 — 1993
M.S., Electrical Engineering
Arizona State University 1988 — 1990
B.S., Electrical Engineering
Cadence Design Systems (through Sigrity acquisition) July 2012 - Present
Sigrity March 2011 - July 2012
Antennovation January 2009 - February 2011
Cadence Design Systems January 2007 - December 2008
NXP Semiconductors August 2006 - December 2006
Philips Electronics April 2002 - July 2006
E-Tenna Corporation January 2001 - March 2002
Motorola Semiconductor July 1997 - December 2000
Paranet November 1995 - June 1997
Skills
Signal Integrity, Electromagnetics, Agilent ADS, HFSS, CST Microwave Studio, Antenna Design, Circuit Simulation, Cadence Virtuoso, RF systems, RF design, Matlab, eda, Red Hat Linux, HP-UX, Unix Administration, Unix Shell Scripting, System Administration, Perl, Fortran, C, Database Administration, Web Design, Scilab, EDA, Simulations, Antennas, Smith Chart, Transmission Lines, Microwave, Cadence, ANSYS, Unix, Billing Systems
Education
Arizona State University 1993 — 1995
PhD, Electrical Engineering
Arizona State University 1991 — 1993
M.S., Electrical Engineering
Arizona State University 1988 — 1990
B.S., Electrical Engineering
Jay Sweeney's Cadence Design Systems Experience 1989 - 2004
Job Principal at Advanced Math and Science Academy Charter School skilled at turn around and change management
Industry Executive Office
Experience
Advanced Math and Science Academy Charter School December 2005 - Present
Self employed January 2005 - November 2011
Takumi Technologies January 2005 - December 2005
Think3 2004 - 2005
Cadence Design System 1989 - 2004
Cadence Design Systems 1989 - 2004
Cadence 1989 - 2004
DEC 1983 - 1989
Digital Equipment Corporation 1983 - 1989
Skills
SaaS, Enterprise Software, Sales, Business Strategy, Leadership, Curriculum Design, Strategic Planning, Public Speaking, Management, Strategic Partnerships, Go-to-market Strategy, Start-ups, Sales Operations, Solution Selling, Project Management, Curriculum Development, Consulting, Marketing, Teaching, Research
Education
Northeastern University 1983 — 1985
BSEE, Electrical Engineering
Assumption College 1976 — 1980
BAEC, Economics
Advanced Math and Science Academy Charter School December 2005 - Present
Self employed January 2005 - November 2011
Takumi Technologies January 2005 - December 2005
Think3 2004 - 2005
Cadence Design System 1989 - 2004
Cadence Design Systems 1989 - 2004
Cadence 1989 - 2004
DEC 1983 - 1989
Digital Equipment Corporation 1983 - 1989
Skills
SaaS, Enterprise Software, Sales, Business Strategy, Leadership, Curriculum Design, Strategic Planning, Public Speaking, Management, Strategic Partnerships, Go-to-market Strategy, Start-ups, Sales Operations, Solution Selling, Project Management, Curriculum Development, Consulting, Marketing, Teaching, Research
Education
Northeastern University 1983 — 1985
BSEE, Electrical Engineering
Assumption College 1976 — 1980
BAEC, Economics
Akhtar Mahmood's Cadence Design Systems Experience September 1997 - August 1998
Job Experienced IC Designer & Product Planner
Industry Semiconductors
Experience
Intel Corporation May 2013 - Present
Intel Corporation October 2005 - May 2013
Intel Capital March 2011 - December 2012
Cirrus Logic / Magnum Semiconductor December 2001 - October 2005
Stream Machine April 1999 - December 2001
Atmel Corporation August 1998 - April 1999
Cadence Design Systems September 1997 - August 1998
White Eagle Systems Technology, Inc 1995 - 1997
Education
Arizona State University, W. P. Carey School of Business 2008 — 2010
Master of Business Administration (MBA)
San Jose State University 1994 — 1997
MSEE
NED University of Engineering and Technology 1989 — 1993
BE
Cadet College Hasanabdal 1983 — 1988
High School
Intel Corporation May 2013 - Present
Intel Corporation October 2005 - May 2013
Intel Capital March 2011 - December 2012
Cirrus Logic / Magnum Semiconductor December 2001 - October 2005
Stream Machine April 1999 - December 2001
Atmel Corporation August 1998 - April 1999
Cadence Design Systems September 1997 - August 1998
White Eagle Systems Technology, Inc 1995 - 1997
Education
Arizona State University, W. P. Carey School of Business 2008 — 2010
Master of Business Administration (MBA)
San Jose State University 1994 — 1997
MSEE
NED University of Engineering and Technology 1989 — 1993
BE
Cadet College Hasanabdal 1983 — 1988
High School
Farhan Mansuri's Cadence Design Systems Experience April 2012 - September 2014
Job
Industry Computer Hardware
Experience
Microchip Technology February 2015 - Present
Cadence Design Systems April 2012 - September 2014
Emulex (formerly a startup ServerEngines) August 2009 - April 2012
ServerEngines November 2003 - August 2009
Banderacom April 2000 - November 2003
Compaq 1997 - 2000
Texas Instruments May 1995 - September 1997
Skills
SystemVerilog, ASIC, PCIe, RTL design, Verilog, FPGA, SoC, Static Timing Analysis, Embedded Systems, Semiconductors, Functional Verification, Timing Closure, Primetime, Logic Design, Debugging, RTL Design
Education
Arizona State University 1993 — 1995
M.S.
The University of Texas at Austin 1989 — 1992
B.S.
Microchip Technology February 2015 - Present
Cadence Design Systems April 2012 - September 2014
Emulex (formerly a startup ServerEngines) August 2009 - April 2012
ServerEngines November 2003 - August 2009
Banderacom April 2000 - November 2003
Compaq 1997 - 2000
Texas Instruments May 1995 - September 1997
Skills
SystemVerilog, ASIC, PCIe, RTL design, Verilog, FPGA, SoC, Static Timing Analysis, Embedded Systems, Semiconductors, Functional Verification, Timing Closure, Primetime, Logic Design, Debugging, RTL Design
Education
Arizona State University 1993 — 1995
M.S.
The University of Texas at Austin 1989 — 1992
B.S.
Sushobhit Gupt's Cadence Design Systems Experience September 2006 - February 2009
Job Software Development Manager at ANSYS, Inc
Industry Computer Software
Experience
ANSYS, Inc. February 2009 - Present
Cadence Design Systems September 2006 - February 2009
Arizona State University August 2004 - August 2006
Cadence Design Systems July 2002 - July 2004
Skills
C++, Algorithms, EDA, Debugging, Graph Theory, Data Structures, Software Architectural..., Software Project..., Team Leadership, Technical Hiring, Performance Appraisal, Technical Presentations, Professional Mentoring, MFC, MS VC++, C, Windows Programming, Perl, VLSI, Simulations, VHDL, Computational Geometry, Meshing, Logic Synthesis, Verilog, Distributed Systems, Embedded Systems, Linux, High Performance..., Ruby on Rails, wxWidgets, SQL, Ruby, Threads, FPGA, Circuit Design, IC layout, Electromagnetic..., jQuery UI, Cadence Skill, AJAX, Programming, Integrated Circuit..., Software Development
Education
Arizona State University 2004 — 2006
MS, Electrical & Computer Engineering
Delhi College of Engineering 1998 — 2002
BE, Electronics & Communications Engineering
Modern School Barakhamba Road
ANSYS, Inc. February 2009 - Present
Cadence Design Systems September 2006 - February 2009
Arizona State University August 2004 - August 2006
Cadence Design Systems July 2002 - July 2004
Skills
C++, Algorithms, EDA, Debugging, Graph Theory, Data Structures, Software Architectural..., Software Project..., Team Leadership, Technical Hiring, Performance Appraisal, Technical Presentations, Professional Mentoring, MFC, MS VC++, C, Windows Programming, Perl, VLSI, Simulations, VHDL, Computational Geometry, Meshing, Logic Synthesis, Verilog, Distributed Systems, Embedded Systems, Linux, High Performance..., Ruby on Rails, wxWidgets, SQL, Ruby, Threads, FPGA, Circuit Design, IC layout, Electromagnetic..., jQuery UI, Cadence Skill, AJAX, Programming, Integrated Circuit..., Software Development
Education
Arizona State University 2004 — 2006
MS, Electrical & Computer Engineering
Delhi College of Engineering 1998 — 2002
BE, Electronics & Communications Engineering
Modern School Barakhamba Road
Stephane Laurent-Michel's Cadence Design Systems Experience March 2002 - December 2002
Job Communications and RF Systems Architecture Professional
Industry Semiconductors
Experience
MaxLinear August 2013 - Present
Spectra 7 Microsystems June 2010 - July 2013
Microtune May 2010 - May 2010
Microtune September 2006 - May 2010
Digeo January 2003 - August 2006
cadence design systems March 2002 - December 2002
Symbionics 1999 - 2002
Tality 1999 - 2002
synopsys 1998 - 1999
Skills
ASIC, DSP, RF, Wireless, Broadcast, Signal Processing, System Architecture, Digital Signal..., FPGA, IC, Digital TV, OFDM, SoC, Digital Signal..., PHY, DOCSIS, Cross-functional Team..., VLSI, C, Processors, C, Simulations, System Design, Systems Engineering, Embedded Systems, Integrated Circuit..., Mixed Signal, Bluetooth, LTE, WiFi, RF Engineering, CMOS, Semiconductors
Education
Telecom ParisTech 1996 — 1997
mastere, VLSI
Institut national polytechnique de Toulouse 1995 — 1996
DEA, signal and image processing
ENSEEIHT - Ecole Nationale Supérieure d'Electrotechnique, d'Electronique, d'Informatique, d'Hydraulique et des Télécommunications 1993 — 1996
Engineering degree, signal and image processing
MaxLinear August 2013 - Present
Spectra 7 Microsystems June 2010 - July 2013
Microtune May 2010 - May 2010
Microtune September 2006 - May 2010
Digeo January 2003 - August 2006
cadence design systems March 2002 - December 2002
Symbionics 1999 - 2002
Tality 1999 - 2002
synopsys 1998 - 1999
Skills
ASIC, DSP, RF, Wireless, Broadcast, Signal Processing, System Architecture, Digital Signal..., FPGA, IC, Digital TV, OFDM, SoC, Digital Signal..., PHY, DOCSIS, Cross-functional Team..., VLSI, C, Processors, C, Simulations, System Design, Systems Engineering, Embedded Systems, Integrated Circuit..., Mixed Signal, Bluetooth, LTE, WiFi, RF Engineering, CMOS, Semiconductors
Education
Telecom ParisTech 1996 — 1997
mastere, VLSI
Institut national polytechnique de Toulouse 1995 — 1996
DEA, signal and image processing
ENSEEIHT - Ecole Nationale Supérieure d'Electrotechnique, d'Electronique, d'Informatique, d'Hydraulique et des Télécommunications 1993 — 1996
Engineering degree, signal and image processing
Clara Teufel Anderson's Cadence Design Systems Experience December 2007 - December 2007
Job Sr Designer, Creative Solutions at Kaiser Permanente, Event Marketing
Industry Graphic Design
Experience
Kaiser Permanente October 2008 - Present
GA Communications January 2008 - June 2008
Teufel Design Studio 2004 - 2008
Cadence Design Systems December 2007 - December 2007
CNET April 2007 - June 2007
Ellie Mae May 2007 - May 2007
Modem Media 2005 - 2005
Hub Strategy and Communication 2005 - 2005
Skills
Web Design, Corporate Identity, Catalogs, Brochures, Direct Mail, Packaging, Newsletters, Invitations, SEO, Stationery, E-commerce, Graphic Design, Creative Direction, User Interface Design, Art Direction
Education
Academy of Art University 2000 — 2004
BFA, Computer Arts, New Media
Hampshire College 1994 — 1996
Interlochen Arts Academy 1991 — 1994
Bachelor of Arts (BA), Computer Arts, New Media
Kaiser Permanente October 2008 - Present
GA Communications January 2008 - June 2008
Teufel Design Studio 2004 - 2008
Cadence Design Systems December 2007 - December 2007
CNET April 2007 - June 2007
Ellie Mae May 2007 - May 2007
Modem Media 2005 - 2005
Hub Strategy and Communication 2005 - 2005
Skills
Web Design, Corporate Identity, Catalogs, Brochures, Direct Mail, Packaging, Newsletters, Invitations, SEO, Stationery, E-commerce, Graphic Design, Creative Direction, User Interface Design, Art Direction
Education
Academy of Art University 2000 — 2004
BFA, Computer Arts, New Media
Hampshire College 1994 — 1996
Interlochen Arts Academy 1991 — 1994
Bachelor of Arts (BA), Computer Arts, New Media
Jean-Marc ricatte's Cadence Design Systems Experience March 2013 - May 2015
Job Senior Staff Engineer
Industry Semiconductors
Experience
Qualcomm June 2015 - Present
Cadence Design Systems March 2013 - May 2015
Synopsys July 2008 - March 2013
Synopsys September 2001 - June 2008
Alcatel Business Systems September 1999 - September 2001
Alcatel 1998 - 2001
Skills
Static Timing Analysis, EDA, SoC, TCL, ASIC
Education
Institut supérieur d'Electronique de Paris 1994 — 1997
Ingineer, Micro-electronic
Qualcomm June 2015 - Present
Cadence Design Systems March 2013 - May 2015
Synopsys July 2008 - March 2013
Synopsys September 2001 - June 2008
Alcatel Business Systems September 1999 - September 2001
Alcatel 1998 - 2001
Skills
Static Timing Analysis, EDA, SoC, TCL, ASIC
Education
Institut supérieur d'Electronique de Paris 1994 — 1997
Ingineer, Micro-electronic
John Lupienski's Cadence Design Systems Experience January 2013 - Present
Job Director, Product Engineering at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems January 2013 - Present
Cadence Design Systems November 2005 - January 2013
Broadcom November 1999 - October 2005
Motorola July 1996 - November 1999
Skills
Semiconductors, High Speed Interfaces, Mixed-Signal IC Design, High-speed Digital..., Semiconductor Device, Digital Designs, Product Development, Mixed Signal, VLSI, Processors, IC, Verilog
Education
Arizona State University 1998 — 2000
MSEE, Semiconductor, Solid-State Electronics
University at Buffalo 1992 — 1996
BSEE, Microelectronic Engineering
University of Santa Clara
Mini MBA, Business Classes
Cadence Design Systems January 2013 - Present
Cadence Design Systems November 2005 - January 2013
Broadcom November 1999 - October 2005
Motorola July 1996 - November 1999
Skills
Semiconductors, High Speed Interfaces, Mixed-Signal IC Design, High-speed Digital..., Semiconductor Device, Digital Designs, Product Development, Mixed Signal, VLSI, Processors, IC, Verilog
Education
Arizona State University 1998 — 2000
MSEE, Semiconductor, Solid-State Electronics
University at Buffalo 1992 — 1996
BSEE, Microelectronic Engineering
University of Santa Clara
Mini MBA, Business Classes
PradeepKumar Damera's Cadence Design Systems Experience 1995 - 2003
Job US P&R Product Specialist Manager at Mentor Graphics
Industry Computer Software
Experience
Mentor Graphics June 2007 - Present
Sierra Design Automation September 2003 - June 2007
Cadence Design Systems 1995 - 2003
Skills
EDA, ASIC, Product Management, TCL, Perl, Debugging, Physical Design, Semiconductors, VLSI, SoC, Software Engineering, Linux, Verilog, Algorithms, Embedded Systems, Static Timing Analysis, IC
Education
The University of Texas at Arlington 1995 — 1996
M.S, Computer Science
Arizona State University 1994 — 1995
M.S, VLSI, Computer Science
Mentor Graphics June 2007 - Present
Sierra Design Automation September 2003 - June 2007
Cadence Design Systems 1995 - 2003
Skills
EDA, ASIC, Product Management, TCL, Perl, Debugging, Physical Design, Semiconductors, VLSI, SoC, Software Engineering, Linux, Verilog, Algorithms, Embedded Systems, Static Timing Analysis, IC
Education
The University of Texas at Arlington 1995 — 1996
M.S, Computer Science
Arizona State University 1994 — 1995
M.S, VLSI, Computer Science
Kester Allen's Cadence Design Systems Experience March 1999 - July 2000
Job Software Engineer 5 at Amyris Inc
Industry Computer Software
Experience
Amyris Inc September 2013 - Present
Vigilent October 2011 - August 2013
Orbital Sciences Corporation January 2005 - October 2011
Lawrence Livermore National Laboratory August 2004 - January 2005
Smithsonian Astrophysical Observatory July 2002 - July 2004
Hewlett-Packard Company July 2000 - June 2002
Cadence Design Systems March 1999 - July 2000
Smithsonian Astrophysical Observatory January 1997 - February 1999
Skills
Python, Java, C, Perl, C++, Matlab, Testing, Software Development, Databases
Education
Amherst College
Physics; Astronomy
Harvard Extension School
Amyris Inc September 2013 - Present
Vigilent October 2011 - August 2013
Orbital Sciences Corporation January 2005 - October 2011
Lawrence Livermore National Laboratory August 2004 - January 2005
Smithsonian Astrophysical Observatory July 2002 - July 2004
Hewlett-Packard Company July 2000 - June 2002
Cadence Design Systems March 1999 - July 2000
Smithsonian Astrophysical Observatory January 1997 - February 1999
Skills
Python, Java, C, Perl, C++, Matlab, Testing, Software Development, Databases
Education
Amherst College
Physics; Astronomy
Harvard Extension School
Adrian Kwong's Cadence Design Systems Experience July 1997 - March 2000
Job Telecom Network Architect at West Wireless Health Institute
Industry Semiconductors
Experience
West Health Institute February 2011 - Present
Trident Microsystems February 2010 - February 2011
NXP August 2008 - February 2010
Conexant Systems, Inc. March 2000 - August 2008
Cadence Design Systems July 1997 - March 2000
Skills
RTOS, Embedded Systems, Embedded Software, C, C++, ARM, Device Drivers, Debugging, Linux Kernel, Embedded Linux, Firmware, I2C, Windows, Linux, Software Engineering, Microcontrollers, System Architecture, Software Development, Architecture, Android Development, Android, PHP, Java, Wireless, USB, Assembly, Microprocessors, Ethernet, Algorithms, HTML, Set Top Box, FPGA, ClearCase, Signal Processing, Perl, TCP/IP, Hardware, Python, Digital Signal..., Eclipse, Multithreading, Programming, Object Oriented Design, Testing, Visual Studio, SoC, Semiconductors, Software Design, Electronics
Education
National University 2003 — 2010
Bachelor, Computer Science
Algonquin College of Applied Arts and Technology 1994 — 1997
Technologist, Computer Engineering
Carleton University
West Health Institute February 2011 - Present
Trident Microsystems February 2010 - February 2011
NXP August 2008 - February 2010
Conexant Systems, Inc. March 2000 - August 2008
Cadence Design Systems July 1997 - March 2000
Skills
RTOS, Embedded Systems, Embedded Software, C, C++, ARM, Device Drivers, Debugging, Linux Kernel, Embedded Linux, Firmware, I2C, Windows, Linux, Software Engineering, Microcontrollers, System Architecture, Software Development, Architecture, Android Development, Android, PHP, Java, Wireless, USB, Assembly, Microprocessors, Ethernet, Algorithms, HTML, Set Top Box, FPGA, ClearCase, Signal Processing, Perl, TCP/IP, Hardware, Python, Digital Signal..., Eclipse, Multithreading, Programming, Object Oriented Design, Testing, Visual Studio, SoC, Semiconductors, Software Design, Electronics
Education
National University 2003 — 2010
Bachelor, Computer Science
Algonquin College of Applied Arts and Technology 1994 — 1997
Technologist, Computer Engineering
Carleton University
Ed Musall's Cadence Design Systems Experience May 1996 - Present
Job Lead Consulting Engineer at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems May 1996 - Present
Skills
EDA, ASIC, TCL, SoC, Verilog, Functional Verification, Perl, Debugging, SystemVerilog, IC, Semiconductors, Simulations, VHDL, Linux, Hardware Architecture, RTL design, Static Timing Analysis, Integrated Circuit..., Timing Closure, VLSI, Physical Design, Formal Verification, Cadence
Education
Southern Methodist University 1988 — 1990
MSEE, Control Systems
Auburn University 1982 — 1986
EE
Cadence Design Systems May 1996 - Present
Skills
EDA, ASIC, TCL, SoC, Verilog, Functional Verification, Perl, Debugging, SystemVerilog, IC, Semiconductors, Simulations, VHDL, Linux, Hardware Architecture, RTL design, Static Timing Analysis, Integrated Circuit..., Timing Closure, VLSI, Physical Design, Formal Verification, Cadence
Education
Southern Methodist University 1988 — 1990
MSEE, Control Systems
Auburn University 1982 — 1986
EE
Phani Suresh P's Cadence Design Systems Experience April 2014 - Present
Job Principal Engineer at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems April 2014 - Present
SmartPlay Inc April 2013 - March 2014
SmartPlay Technologies December 2010 - March 2013
ST Microelectronics August 2007 - December 2010
Ample Communications July 2006 - August 2007
Future Techno Designs January 2004 - July 2006
Skills
Validation, Project Management, Analog, Analog Circuit Design, PCIe, Display Port, ASIC, PLL, Project Proposals, Technical Recruiting, Project Coordination, SERDES, Power Management, Jitter, Physical Design, CMOS, Static Timing Analysis, VLSI, Cadence, Proposal Writing, Semiconductors, Verilog, VHDL, SystemVerilog, SoC, RTL design, Functional Verification, DRC, EDA, LVS, Integrated Circuit..., Mixed Signal, Spectre, RTL coding, IC, ModelSim
Education
National Institute of Technology, Warangal 2002 — 2003
M.Tech, VLSI System Design
Andhra University 1998 — 2002
B.E, Electronics & Communication Engg
Cadence Design Systems April 2014 - Present
SmartPlay Inc April 2013 - March 2014
SmartPlay Technologies December 2010 - March 2013
ST Microelectronics August 2007 - December 2010
Ample Communications July 2006 - August 2007
Future Techno Designs January 2004 - July 2006
Skills
Validation, Project Management, Analog, Analog Circuit Design, PCIe, Display Port, ASIC, PLL, Project Proposals, Technical Recruiting, Project Coordination, SERDES, Power Management, Jitter, Physical Design, CMOS, Static Timing Analysis, VLSI, Cadence, Proposal Writing, Semiconductors, Verilog, VHDL, SystemVerilog, SoC, RTL design, Functional Verification, DRC, EDA, LVS, Integrated Circuit..., Mixed Signal, Spectre, RTL coding, IC, ModelSim
Education
National Institute of Technology, Warangal 2002 — 2003
M.Tech, VLSI System Design
Andhra University 1998 — 2002
B.E, Electronics & Communication Engg
Siddharth Vishwanath's Cadence Design Systems Experience May 2014 - Present
Job Lead Design Engineer at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems May 2014 - Present
Uniquify November 2007 - April 2014
Skills
ASIC, Static Timing Analysis, IC, Mixed Signal, Physical Verification, Verilog, Power Analysis, Physical Design, Semiconductors, Integrated Circuit..., Debugging
Education
Arizona State University 2005 — 2007
Master's, Electrical
Visvesvaraya Technological University 2001 — 2005
Bachelor of Engineering, Telecommunications
Cadence Design Systems May 2014 - Present
Uniquify November 2007 - April 2014
Skills
ASIC, Static Timing Analysis, IC, Mixed Signal, Physical Verification, Verilog, Power Analysis, Physical Design, Semiconductors, Integrated Circuit..., Debugging
Education
Arizona State University 2005 — 2007
Master's, Electrical
Visvesvaraya Technological University 2001 — 2005
Bachelor of Engineering, Telecommunications
Jilin Tan's Cadence Design Systems Experience ArchitectCadence2000 - Present
Job Architect at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems ArchitectCadence2000 - Present
Education
Arizona State University 1995 — 1996
Post Doctor, Electromagnetic simulation and modeling
University of Wisconsin-Milwaukee 1991 — 1995
Ph.D, Electrical Engineering
Cadence Design Systems ArchitectCadence2000 - Present
Education
Arizona State University 1995 — 1996
Post Doctor, Electromagnetic simulation and modeling
University of Wisconsin-Milwaukee 1991 — 1995
Ph.D, Electrical Engineering
Htet Win's Cadence Design Systems Experience January 2005 - December 2006
Job Web UI Engineer at Apple
Industry Computer Software
Experience
Apple October 2012 - Present
Academy of Art University August 2011 - May 2014
Gensler September 2011 - October 2012
Qbranch January 2010 - September 2010
Syncira January 2007 - June 2007
Cadence Design Systems January 2005 - December 2006
Cadence Design Systems March 2002 - December 2004
JTA Research Inc. January 2002 - February 2002
JTA Research Inc. June 2001 - December 2001
Skills
PHP, HTML, HTML5, CSS, Zend Framework, ActionScript, C++, JavaScript, jQuery, Python, SQL, PL/SQL, Objective-C, Photoshop, Illustrator, MVC, REST, AJAX, Agile, Drupal, Wordpress, JavaScriptMVC, Web Development
Education
Academy of Art University 2008 — 2011
MFA, Web Design And New Media
California State University-Long Beach - College of Business Administration 2002 — 2007
MBA
California State University-Long Beach 1997 — 2001
BS, Computer Science
Apple October 2012 - Present
Academy of Art University August 2011 - May 2014
Gensler September 2011 - October 2012
Qbranch January 2010 - September 2010
Syncira January 2007 - June 2007
Cadence Design Systems January 2005 - December 2006
Cadence Design Systems March 2002 - December 2004
JTA Research Inc. January 2002 - February 2002
JTA Research Inc. June 2001 - December 2001
Skills
PHP, HTML, HTML5, CSS, Zend Framework, ActionScript, C++, JavaScript, jQuery, Python, SQL, PL/SQL, Objective-C, Photoshop, Illustrator, MVC, REST, AJAX, Agile, Drupal, Wordpress, JavaScriptMVC, Web Development
Education
Academy of Art University 2008 — 2011
MFA, Web Design And New Media
California State University-Long Beach - College of Business Administration 2002 — 2007
MBA
California State University-Long Beach 1997 — 2001
BS, Computer Science
Gunter Fuchs's Cadence Design Systems Experience January 2000 - July 2000
Job firmware / software developer
Industry Industrial Automation
Experience
AMCi-Wireless November 2014 - Present
contractor July 2014 - October 2014
Atmel March 2008 - June 2014
Davis Instruments June 2006 - March 2008
Cadence Design Systems January 2000 - July 2000
Skills
Embedded Systems, Firmware, Embedded Software, FPGA, Testing, IC, Hardware, Software Design, Hardware Architecture, PCB design, Debugging, SoC, Device Drivers, C
Education
Georg-Simon-Ohm-Fachhochschule Nürnberg 1976 — 1980
Diplom Ingenier (FH), telecommunications
Technische Hochschule Nürnberg Georg Simon Ohm
Master's degree EE, Telecommunications Engineering
AMCi-Wireless November 2014 - Present
contractor July 2014 - October 2014
Atmel March 2008 - June 2014
Davis Instruments June 2006 - March 2008
Cadence Design Systems January 2000 - July 2000
Skills
Embedded Systems, Firmware, Embedded Software, FPGA, Testing, IC, Hardware, Software Design, Hardware Architecture, PCB design, Debugging, SoC, Device Drivers, C
Education
Georg-Simon-Ohm-Fachhochschule Nürnberg 1976 — 1980
Diplom Ingenier (FH), telecommunications
Technische Hochschule Nürnberg Georg Simon Ohm
Master's degree EE, Telecommunications Engineering
Vidhyadharan Jayapal's Cadence Design Systems Experience July 2011 - June 2013
Job CPU Design Engineer at Apple
Industry Computer Hardware
Experience
Apple July 2013 - Present
Cadence Design Systems July 2011 - June 2013
Broadcom October 2010 - July 2011
Cadence Design Systems September 2001 - October 2010
Skills
Physical Design, Static Timing Analysis, CPF, Low-power Design, TCL, Physical Synthesis, Place & Route, Clock Tree Synthesis, Timing Closure, Optimization, EDA
Education
Southern Illinois University, Edwardsville 2000 — 2001
M.S., Electrical and Computer Engineering
Annamalai University 1994 — 1998
B.S., Electronics Engineering
Apple July 2013 - Present
Cadence Design Systems July 2011 - June 2013
Broadcom October 2010 - July 2011
Cadence Design Systems September 2001 - October 2010
Skills
Physical Design, Static Timing Analysis, CPF, Low-power Design, TCL, Physical Synthesis, Place & Route, Clock Tree Synthesis, Timing Closure, Optimization, EDA
Education
Southern Illinois University, Edwardsville 2000 — 2001
M.S., Electrical and Computer Engineering
Annamalai University 1994 — 1998
B.S., Electronics Engineering
Narender Hanchate's Cadence Design Systems Experience February 2015 - Present
Job Sr. Principal Software Engineer
Industry Semiconductors
Experience
Cadence Design Systems February 2015 - Present
Tabula November 2012 - February 2015
Samsung Semiconductor May 2011 - November 2012
Synopsys June 2006 - May 2011
University of South Florida January 2002 - May 2006
HCL Technologies June 2000 - July 2001
Skills
EDA, Static Timing Analysis, Circuits, VLSI, ASIC, Algorithms, Signal Integrity, TCL, Physical Design, Verilog, FPGA, SoC, Timing Closure, RTL design, RTL Design, Semiconductors
Education
University of South Florida 2003 — 2006
Ph.D., Computer Engineering
University of South Florida 2001 — 2003
M.S, Computer Engineering
Osmania University 1996 — 2000
Bachelor of Engineering, Electronics and Communications
Atomic Energy Central School 1984 — 1994
Cadence Design Systems February 2015 - Present
Tabula November 2012 - February 2015
Samsung Semiconductor May 2011 - November 2012
Synopsys June 2006 - May 2011
University of South Florida January 2002 - May 2006
HCL Technologies June 2000 - July 2001
Skills
EDA, Static Timing Analysis, Circuits, VLSI, ASIC, Algorithms, Signal Integrity, TCL, Physical Design, Verilog, FPGA, SoC, Timing Closure, RTL design, RTL Design, Semiconductors
Education
University of South Florida 2003 — 2006
Ph.D., Computer Engineering
University of South Florida 2001 — 2003
M.S, Computer Engineering
Osmania University 1996 — 2000
Bachelor of Engineering, Electronics and Communications
Atomic Energy Central School 1984 — 1994
Stavros Tripakis's Cadence Design Systems Experience February 2006 - November 2008
Job at University of California, Berkeley
Industry Research
Experience
University of California, Berkeley 2009 - Present
Verimag / Universite Joseph Fourier 2000 - Present
Cadence Design Systems February 2006 - November 2008
VERIMAG 2000 - 2006
California PATH, University of California at Berkeley 2000 - 2001
UC Berkeley 1999 - 2001
ICS-FORTH 1988 - 1993
Education
Universite de Grenoble 1996 — 1998
PhD, Computer Science
Panepistimio Kritis 1988 — 1993
BSc, Computer Science
University of California, Berkeley 2009 - Present
Verimag / Universite Joseph Fourier 2000 - Present
Cadence Design Systems February 2006 - November 2008
VERIMAG 2000 - 2006
California PATH, University of California at Berkeley 2000 - 2001
UC Berkeley 1999 - 2001
ICS-FORTH 1988 - 1993
Education
Universite de Grenoble 1996 — 1998
PhD, Computer Science
Panepistimio Kritis 1988 — 1993
BSc, Computer Science
Sachi Subramanian, PMP's Cadence Design Systems Experience June 2006 - March 2007
Job Project Management and BI Architect
Industry Computer Software
Experience
Innoventis inc January 2012 - Present
SanDisk September 2010 - January 2012
Unilever June 2010 - September 2010
Sony Pictures Entertainment March 2010 - May 2010
Innoventis January 2007 - February 2010
Chevron June 2007 - December 2009
Chevron Production Company January 2007 - June 2007
Cadence Design Systems June 2006 - March 2007
MyITgroup February 2002 - December 2006
ChevronTexaco June 2001 - May 2006
Skills
SAP BW, SAP R/3, ECC, Planning, Consolidation, Business Intelligence, SAP Netweaver, BPC
Education
Anna University 1984 — 1990
Masters Degree, Industrial Engineering & Management
Anna University 1984 — 1989
Master of engineering, Industrial Engineering
Innoventis inc January 2012 - Present
SanDisk September 2010 - January 2012
Unilever June 2010 - September 2010
Sony Pictures Entertainment March 2010 - May 2010
Innoventis January 2007 - February 2010
Chevron June 2007 - December 2009
Chevron Production Company January 2007 - June 2007
Cadence Design Systems June 2006 - March 2007
MyITgroup February 2002 - December 2006
ChevronTexaco June 2001 - May 2006
Skills
SAP BW, SAP R/3, ECC, Planning, Consolidation, Business Intelligence, SAP Netweaver, BPC
Education
Anna University 1984 — 1990
Masters Degree, Industrial Engineering & Management
Anna University 1984 — 1989
Master of engineering, Industrial Engineering
Devi Kumarappan's Cadence Design Systems Experience November 2003 - Present
Job Sr Architect Current Focus BigData
Industry Information Technology and Services
Igor Keller's Cadence Design Systems Experience
Job Architect at Cadence Design Systems
Industry Electrical/Electronic Manufacturing
Experience
Cadence Design Systems
Education
Perm State University (PSU) 1984 — 1994
Cadence Design Systems
Education
Perm State University (PSU) 1984 — 1994
Sally Wolfert's Cadence Design Systems Experience December 2014 - Present
Job EDA Applications Engineer
Industry Semiconductors
Experience
Cadence Design Systems December 2014 - Present
Cadence Design Systems 1996 - November 2014
Motorola Semiconductor July 1990 - April 1995
Skills
IC, Mixed Signal, Semiconductors, Cadence Virtuoso, Analog, SoC, Verilog, Semiconductor Industry, Integrated Circuit..., Debugging, CMOS, FPGA, EDA, Physical Design
Education
Arizona State University, W. P. Carey School of Business 1991 — 1995
MBA
Rochester Institute of Technology 1985 — 1990
BS, Microelectronic Engineering
Cadence Design Systems December 2014 - Present
Cadence Design Systems 1996 - November 2014
Motorola Semiconductor July 1990 - April 1995
Skills
IC, Mixed Signal, Semiconductors, Cadence Virtuoso, Analog, SoC, Verilog, Semiconductor Industry, Integrated Circuit..., Debugging, CMOS, FPGA, EDA, Physical Design
Education
Arizona State University, W. P. Carey School of Business 1991 — 1995
MBA
Rochester Institute of Technology 1985 — 1990
BS, Microelectronic Engineering
Rahul Shringarpure's Cadence Design Systems Experience April 1997 - May 2002
Job Principal Design Engineer at Inphi Corporation
Industry Defense & Space
Experience
Inphi Corporation April 2014 - November 2014
Inphi Corporation May 2012 - March 2014
HRL Laboratories, LLC May 2002 - May 2012
Cadence Design Systems April 1997 - May 2002
Motorola 1996 - 1997
Skills
IC, Firmware, Cadence, Analog, Sensors, CMOS, Testing, Virtuoso, PLL, Simulations
Education
Arizona State University 2004 — 2008
PhD, Electrical Engineering
Oregon Health and Science University 1998 — 2001
MS, Electrical, Electronics and Communications Engineering
Wayne State University 1992 — 1995
M.S., Computer Engineering
Besser Associates
Inphi Corporation April 2014 - November 2014
Inphi Corporation May 2012 - March 2014
HRL Laboratories, LLC May 2002 - May 2012
Cadence Design Systems April 1997 - May 2002
Motorola 1996 - 1997
Skills
IC, Firmware, Cadence, Analog, Sensors, CMOS, Testing, Virtuoso, PLL, Simulations
Education
Arizona State University 2004 — 2008
PhD, Electrical Engineering
Oregon Health and Science University 1998 — 2001
MS, Electrical, Electronics and Communications Engineering
Wayne State University 1992 — 1995
M.S., Computer Engineering
Besser Associates
Kanhaiya Jha's Cadence Design Systems Experience May 2003 - October 2003
Job Tech Manager at Tech Mahindra
Industry Information Technology and Services
Experience
Tech Mahindra January 2015 - Present
Tech Mahindra Americas Inc December 2010 - January 2015
Mercer January 2009 - December 2010
Mphasis,(EDS an HP Company) December 2007 - December 2008
Steria Group April 2004 - November 2007
Cadence Design Systems May 2003 - October 2003
Skills
Solaris, Unix, Weblogic, SDLC, Requirements Analysis, Shell Scripting, Oracle, Software Project..., Java Enterprise Edition, Linux, SQL, Solution Architecture, Web Services, Agile Methodologies, WebLogic, Testing, VMware, iPlanet Web Server
Education
CDAC,Govt. of India 2000 — 2003
Masters Diploma in Computer application, Computer Science
Delhi University 1997 — 2000
Graduate
Central Board of Secondary Education 1993 — 1995
10+2
Tech Mahindra January 2015 - Present
Tech Mahindra Americas Inc December 2010 - January 2015
Mercer January 2009 - December 2010
Mphasis,(EDS an HP Company) December 2007 - December 2008
Steria Group April 2004 - November 2007
Cadence Design Systems May 2003 - October 2003
Skills
Solaris, Unix, Weblogic, SDLC, Requirements Analysis, Shell Scripting, Oracle, Software Project..., Java Enterprise Edition, Linux, SQL, Solution Architecture, Web Services, Agile Methodologies, WebLogic, Testing, VMware, iPlanet Web Server
Education
CDAC,Govt. of India 2000 — 2003
Masters Diploma in Computer application, Computer Science
Delhi University 1997 — 2000
Graduate
Central Board of Secondary Education 1993 — 1995
10+2
Aalap Patel's Cadence Design Systems Experience January 2002 - January 2003
Job Senior Staff Engineer at Qualcomm
Industry Semiconductors
Experience
Qualcomm June 2015 - Present
Advanced Micro Devices November 2003 - May 2015
Silicon Canvas January 2003 - November 2003
Cadence Design Systems January 2002 - January 2003
Skills
EDA, Physical Design
Education
Arizona State University 2000 — 2002
MS, Electrical Engineering
Nirma Institute of Technology 1996 — 2000
BS, Electrical Engineering
Qualcomm June 2015 - Present
Advanced Micro Devices November 2003 - May 2015
Silicon Canvas January 2003 - November 2003
Cadence Design Systems January 2002 - January 2003
Skills
EDA, Physical Design
Education
Arizona State University 2000 — 2002
MS, Electrical Engineering
Nirma Institute of Technology 1996 — 2000
BS, Electrical Engineering
Kathy Milburn (Work)'s Cadence Design Systems Experience Training CoordinatorUniCad Canada1994 - 1997
Job Education Services System Analyst at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems Training CoordinatorUniCad Canada1994 - 1997
Education
Algonquin College of Applied Arts and Technology 1976 — 1978
Executive Secretarial
Cadence Design Systems Training CoordinatorUniCad Canada1994 - 1997
Education
Algonquin College of Applied Arts and Technology 1976 — 1978
Executive Secretarial
Max Kao's Cadence Design Systems Experience
Job Staff Field Service Engineer at Cadence Design Systems
Industry Electrical/Electronic Manufacturing
Experience
Cadence Design Systems
Skills
ASIC, Debugging, Semiconductors, Engineering, Simulations, EDA, Linux, Verilog, Electronics, Cross-functional Team...
Education
California State University Stanislaus 1998 — 2000
National Kaohsiung First University of Science and Technology 1972 — 1974
Cadence Design Systems
Skills
ASIC, Debugging, Semiconductors, Engineering, Simulations, EDA, Linux, Verilog, Electronics, Cross-functional Team...
Education
California State University Stanislaus 1998 — 2000
National Kaohsiung First University of Science and Technology 1972 — 1974
Nilesh Telkikar's Cadence Design Systems Experience 2001 - 2001
Job Sr SAP ABAP/Workflow/Web Services/Web Dynpro/EHSM Developer
Industry Computer Software
Experience
1325320 Alberta Inc. May 2007 - Present
AltaLink May 2014 - June 2015
NOVA Chemicals May 2013 - March 2014
Agrium June 2012 - December 2012
Urban Barn October 2011 - September 2012
City of Edmonton September 2010 - September 2011
AltaLink March 2008 - August 2010
CP Rail May 2007 - January 2008
Gamma Enterprise Technologies Inc. January 2001 - May 2007
Cadence Design Systems 2001 - 2001
Skills
ABAP, SAP, SAPScript, BAPI, Business Intelligence, Business Analysis, ERP, SAP R/3, Business Process, Requirements Analysis, Integration, Oracle, Project Management, SAP Netweaver, SAP BW, Materials Management, SAP Implementation, ECC, SAP ERP, SAP XI, Smartforms, SD, IDOC, WebDynpro, SAP BI, ALV, SAP Portal, Requirements Gathering, Web Services, SAP FI, Business Process Design, IDoc
Education
Aspen University 2010 — 2014
Master of Business Administration (M.B.A.), Project Management
Doctor Babasaheb Ambedkar Marathwada University 1993 — 1996
Master of Computer Applications, Computer Applications
1325320 Alberta Inc. May 2007 - Present
AltaLink May 2014 - June 2015
NOVA Chemicals May 2013 - March 2014
Agrium June 2012 - December 2012
Urban Barn October 2011 - September 2012
City of Edmonton September 2010 - September 2011
AltaLink March 2008 - August 2010
CP Rail May 2007 - January 2008
Gamma Enterprise Technologies Inc. January 2001 - May 2007
Cadence Design Systems 2001 - 2001
Skills
ABAP, SAP, SAPScript, BAPI, Business Intelligence, Business Analysis, ERP, SAP R/3, Business Process, Requirements Analysis, Integration, Oracle, Project Management, SAP Netweaver, SAP BW, Materials Management, SAP Implementation, ECC, SAP ERP, SAP XI, Smartforms, SD, IDOC, WebDynpro, SAP BI, ALV, SAP Portal, Requirements Gathering, Web Services, SAP FI, Business Process Design, IDoc
Education
Aspen University 2010 — 2014
Master of Business Administration (M.B.A.), Project Management
Doctor Babasaheb Ambedkar Marathwada University 1993 — 1996
Master of Computer Applications, Computer Applications
Brett Neal's Cadence Design Systems Experience January 2007 - Present
Job Member of Consulting Staff at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems January 2007 - Present
Intel Corporation 1999 - 2006
Motorola SPS 1997 - 1999
Skills
EDA, TCL, ASIC, Perl, C++, Semiconductors, Software Engineering, IC, C, Software Development, Algorithms, Debugging, SoC, Physical Design
Education
Arizona State University
Cadence Design Systems January 2007 - Present
Intel Corporation 1999 - 2006
Motorola SPS 1997 - 1999
Skills
EDA, TCL, ASIC, Perl, C++, Semiconductors, Software Engineering, IC, C, Software Development, Algorithms, Debugging, SoC, Physical Design
Education
Arizona State University
Michael Engh's Cadence Design Systems Experience March 1995 - Present
Job Simulation & Acceleration / Electronic Design Automation Engineer
Industry Computer Hardware
Experience
Cadence Design Systems March 1995 - Present
The Gilbert and Sullivan Very Light Opera Company 1996 - 2015
Unisys August 1982 - February 1995
Our Redeemer Lutheran Church 1988 - 1995
Pacific Lutheran University August 1985 - May 1986
Augustana College (SD) September 1980 - May 1981
IBM 1979 - 1981
Augustana College (SD) June 1975 - May 1979
South Dakota Symphony 1977 - 1979
Education
University of Wisconsin-Madison 1979 — 1982
MSEE, Computer Engineering
Augustana University (SD) 1975 — 1979
BA (Summa Cum Laude), Math, Physics
Cadence Design Systems March 1995 - Present
The Gilbert and Sullivan Very Light Opera Company 1996 - 2015
Unisys August 1982 - February 1995
Our Redeemer Lutheran Church 1988 - 1995
Pacific Lutheran University August 1985 - May 1986
Augustana College (SD) September 1980 - May 1981
IBM 1979 - 1981
Augustana College (SD) June 1975 - May 1979
South Dakota Symphony 1977 - 1979
Education
University of Wisconsin-Madison 1979 — 1982
MSEE, Computer Engineering
Augustana University (SD) 1975 — 1979
BA (Summa Cum Laude), Math, Physics
Aditi Deshpande's Cadence Design Systems Experience August 2007 - August 2011
Job Technical Recruiter Intersil Corporation
Industry Computer Software
Experience
Intersil Corporation September 2014 - Present
Sunsson LLC August 2011 - August 2014
Cadence Design Systems August 2007 - August 2011
Intel 2005 - 2007
Skills
RF, Testing, Python, Analog, Debugging, SoC, Mixed Signal
Education
Arizona State University 2001 — 2002
MS, Electrical Engineering
University of Mumbai
BS, Electronics Engineering
Intersil Corporation September 2014 - Present
Sunsson LLC August 2011 - August 2014
Cadence Design Systems August 2007 - August 2011
Intel 2005 - 2007
Skills
RF, Testing, Python, Analog, Debugging, SoC, Mixed Signal
Education
Arizona State University 2001 — 2002
MS, Electrical Engineering
University of Mumbai
BS, Electronics Engineering
Mandana Martin's Cadence Design Systems Experience 1994 - 1996
Job Senior Technical Writer
Industry Computer Software
Experience
FileMaker June 2008 - Present
Adobe Systems 2006 - 2008
Microsoft 2000 - 2006
Network Associates May 2000 - December 2000
Fujitsu Network Communications 1998 - 2000
TIBCO Finance Technology 1996 - 1998
Cadence Design Systems 1994 - 1996
IBM 1993 - 1994
Skills
Technical Documentation, Visio, Technical Communication, FrameMaker, Information Architecture, Online Help, Agile Methodologies, Software Documentation, Technical Writing, RoboHelp, Structured Authoring, Information Design, Usability Testing, Single Sourcing, DITA
Education
New Mexico State University 1991 — 1993
MA, Technical Communication
Kobe College
Roya High School
Sharif University of Technology
FileMaker June 2008 - Present
Adobe Systems 2006 - 2008
Microsoft 2000 - 2006
Network Associates May 2000 - December 2000
Fujitsu Network Communications 1998 - 2000
TIBCO Finance Technology 1996 - 1998
Cadence Design Systems 1994 - 1996
IBM 1993 - 1994
Skills
Technical Documentation, Visio, Technical Communication, FrameMaker, Information Architecture, Online Help, Agile Methodologies, Software Documentation, Technical Writing, RoboHelp, Structured Authoring, Information Design, Usability Testing, Single Sourcing, DITA
Education
New Mexico State University 1991 — 1993
MA, Technical Communication
Kobe College
Roya High School
Sharif University of Technology
Daniel Pollock's Cadence Design Systems Experience February 2001 - Present
Job Product Validation Engineer. at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems February 2001 - Present
Mentor Graphics October 1993 - February 2001
Stanford Telecommunications Inc January 1983 - October 1993
Skills
EDA, Requirements Analysis, Testing, Test Automation, Quality Assurance, Perl, TCL, IC, RF, Cadence Virtuoso, Test Planning, PCB design, ASIC, SoC, Debugging
Education
DeAnza College 2003 — 2004
Asia-Pacific International University
Cadence Design Systems February 2001 - Present
Mentor Graphics October 1993 - February 2001
Stanford Telecommunications Inc January 1983 - October 1993
Skills
EDA, Requirements Analysis, Testing, Test Automation, Quality Assurance, Perl, TCL, IC, RF, Cadence Virtuoso, Test Planning, PCB design, ASIC, SoC, Debugging
Education
DeAnza College 2003 — 2004
Asia-Pacific International University
Arthur Sandy McElfresh's Cadence Design Systems Experience May 2000 - January 2002
Job VP / Director of Sales and Marketing
Industry Consumer Goods
Experience
Manna Development Group July 2008 - May 2015
Seaside Flooring and Interiors February 2006 - August 2008
K2 Inc. 2002 - 2005
Cadence Design Systems May 2000 - January 2002
Nike January 1993 - May 2000
Skills
Strategic Partnerships, Product Marketing, New Business Development, Marketing Strategy, Start-ups, Go-to-market Strategy, Sales Management, Strategy, P&L Management, Selling, Business Planning, Market Planning, Product Development, Competitive Analysis, Sales Operations, Product Management, Product Launch, Cross-functional Team..., Brand Management, Account Management, Marketing Management, Sales, Consumer Products, Direct Sales, Marketing, Key Account Management, Business Development
Education
Albion College
Bachelor's Degree, English, Economics & Bus. Admin
Manna Development Group July 2008 - May 2015
Seaside Flooring and Interiors February 2006 - August 2008
K2 Inc. 2002 - 2005
Cadence Design Systems May 2000 - January 2002
Nike January 1993 - May 2000
Skills
Strategic Partnerships, Product Marketing, New Business Development, Marketing Strategy, Start-ups, Go-to-market Strategy, Sales Management, Strategy, P&L Management, Selling, Business Planning, Market Planning, Product Development, Competitive Analysis, Sales Operations, Product Management, Product Launch, Cross-functional Team..., Brand Management, Account Management, Marketing Management, Sales, Consumer Products, Direct Sales, Marketing, Key Account Management, Business Development
Education
Albion College
Bachelor's Degree, English, Economics & Bus. Admin
Dinesh Behl's Cadence Design Systems Experience September 2006 - January 2010
Job Senior Consultant at SWIFT
Industry Banking
Experience
SWIFT February 2010 - Present
Cadence Design Systems September 2006 - January 2010
CA Technologies October 2004 - August 2006
Eclipse Systems Pvt. Ltd. 2002 - 2004
Skills
Unix, Software Project..., Requirements Analysis, Agile Methodologies, SDLC, Java Enterprise Edition, C++, Boost C++, WebSphere MQ, HP-UX, ClearCase, Oracle
Education
Doctor Bhim Rao Ambedkar University 1999 — 2002
MCA, Computer Application
Ramjas College 1995 — 1998
Bachelor's of Science
SWIFT February 2010 - Present
Cadence Design Systems September 2006 - January 2010
CA Technologies October 2004 - August 2006
Eclipse Systems Pvt. Ltd. 2002 - 2004
Skills
Unix, Software Project..., Requirements Analysis, Agile Methodologies, SDLC, Java Enterprise Edition, C++, Boost C++, WebSphere MQ, HP-UX, ClearCase, Oracle
Education
Doctor Bhim Rao Ambedkar University 1999 — 2002
MCA, Computer Application
Ramjas College 1995 — 1998
Bachelor's of Science
Aleta Dozier's Cadence Design Systems Experience May 1996 - November 2008
Job APR Engineer at Intel Corp
Industry Consumer Electronics
Experience
Intel August 2010 - Present
Cadence Design Systems May 1996 - November 2008
Mitsubishi Semiconductor July 1994 - May 1996
IBM August 1991 - December 1993
Skills
Physical Design, ASIC, EDA, TCL, SoC, IC, Semiconductors
Education
Arizona State University 2009 — 2010
PSM, Nanoscience
North Carolina State University 1990 — 1994
Bachelor, Electical Enginnering
North Carolina School of Science and Mathematics 1988 — 1990
Bachelor's degree, Electrical and Electronics Engineering
Intel August 2010 - Present
Cadence Design Systems May 1996 - November 2008
Mitsubishi Semiconductor July 1994 - May 1996
IBM August 1991 - December 1993
Skills
Physical Design, ASIC, EDA, TCL, SoC, IC, Semiconductors
Education
Arizona State University 2009 — 2010
PSM, Nanoscience
North Carolina State University 1990 — 1994
Bachelor, Electical Enginnering
North Carolina School of Science and Mathematics 1988 — 1990
Bachelor's degree, Electrical and Electronics Engineering
Harry Yu's Cadence Design Systems Experience September 2013 - Present
Job Materials Manager at Cadence Design Systems
Industry Computer Hardware
Experience
Cadence Design Systems September 2013 - Present
Linear Technology July 2010 - September 2013
AsteelFlash Group September 2007 - July 2010
Skills
Supply Chain Operations, Demand Supply Planning, Materials Management, MRP, Six Sigma, Demand Planning, Inventory Control, Product Development, Project Planning, Supply Chain Management, Lean Manufacturing, Logistics
Education
University of Southern California 2006 — 2007
M.S., Industrial and System Engineering - Minor: Engineering Management
Arizona State University 2005 — 2006
M.S., Industrial Engineering
Cadence Design Systems September 2013 - Present
Linear Technology July 2010 - September 2013
AsteelFlash Group September 2007 - July 2010
Skills
Supply Chain Operations, Demand Supply Planning, Materials Management, MRP, Six Sigma, Demand Planning, Inventory Control, Product Development, Project Planning, Supply Chain Management, Lean Manufacturing, Logistics
Education
University of Southern California 2006 — 2007
M.S., Industrial and System Engineering - Minor: Engineering Management
Arizona State University 2005 — 2006
M.S., Industrial Engineering
Alex Arkhipov's Cadence Design Systems Experience January 2011 - Present
Job Senior Member of Consulting Staff at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems January 2011 - Present
BAE Systems November 2008 - December 2010
Insight EDA July 2008 - September 2008
Sagantec April 2005 - June 2008
BindKey Technologies, Inc. January 2004 - February 2005
Synopsys (Numerical Technologies) September 1999 - January 2004
Cadexterity Inc September 1996 - September 1999
Education
Moscow State University of Environmental Engineering (MGUP) 1985 — 1987
Ph.D, Applied Mathematics
Moscow State University of Transport (MIIT) 1976 — 1981
M.S., Computer Science
Cadence Design Systems January 2011 - Present
BAE Systems November 2008 - December 2010
Insight EDA July 2008 - September 2008
Sagantec April 2005 - June 2008
BindKey Technologies, Inc. January 2004 - February 2005
Synopsys (Numerical Technologies) September 1999 - January 2004
Cadexterity Inc September 1996 - September 1999
Education
Moscow State University of Environmental Engineering (MGUP) 1985 — 1987
Ph.D, Applied Mathematics
Moscow State University of Transport (MIIT) 1976 — 1981
M.S., Computer Science
Bill Orton's Cadence Design Systems Experience 1996 - 2004
Job CAD Engineer at Qualcomm
Industry Semiconductors
Experience
Qualcomm March 2014 - Present
IDT November 2011 - March 2013
Nethra Imaging June 2010 - November 2011
ARM June 2004 - June 2010
Cadence Design Systems 1996 - 2004
Hughes Aircraft Company October 1983 - September 1993
Skills
EDA
Education
University of Southern California 1987 — 1989
Masters, Electrical Engineering
California State University-Long Beach 1984 — 1987
Bachelor of Science, Electrical Engineering
Alfred State College - SUNY College of Technology 1981 — 1983
Associates in Applied Science, Computer Graphics
Qualcomm March 2014 - Present
IDT November 2011 - March 2013
Nethra Imaging June 2010 - November 2011
ARM June 2004 - June 2010
Cadence Design Systems 1996 - 2004
Hughes Aircraft Company October 1983 - September 1993
Skills
EDA
Education
University of Southern California 1987 — 1989
Masters, Electrical Engineering
California State University-Long Beach 1984 — 1987
Bachelor of Science, Electrical Engineering
Alfred State College - SUNY College of Technology 1981 — 1983
Associates in Applied Science, Computer Graphics
Steven Dovich's Cadence Design Systems Experience November 1998 - November 2013
Job Software Systems, Process Improvement, and Industry Standards
Industry Computer Software
Experience
MediaTek USA Inc. August 2014 - Present
Cadence Design Systems November 1998 - November 2013
Data General April 1997 - November 1998
Sequoia Systems, Inc April 1993 - April 1997
Cadence Design Systems January 1990 - April 1993
Gateway Design Automation August 1989 - January 1990
General Electric December 1984 - June 1989
Skills
Software Engineering, C++, Perl, Software Development, Operating Systems, Integration, ClearCase, EDA, C, Verilog, Process Improvement, Distributed Systems, Embedded Systems, Unix, Debugging, TCL, Linux, Shell Scripting, Technical Leadership, System Architecture, VHDL, Object Oriented Design, Software Design, Compilers, Software Project..., Architecture, Hardware, Simulations, Cloud Computing, Standards Development, IEEE standards, CVS, System Administration, Python, SQL, Coverity, Static Analysis, Code Coverage, Eclipse, Network Administration, Network Architecture, Apache, MySQL, PHP, PostgreSQL, DevOps
Education
Georgia Institute of Technology 1983 — 1984
MS, Information and Computer Science
Andrews University 1979 — 1983
BS, Computer Science
MediaTek USA Inc. August 2014 - Present
Cadence Design Systems November 1998 - November 2013
Data General April 1997 - November 1998
Sequoia Systems, Inc April 1993 - April 1997
Cadence Design Systems January 1990 - April 1993
Gateway Design Automation August 1989 - January 1990
General Electric December 1984 - June 1989
Skills
Software Engineering, C++, Perl, Software Development, Operating Systems, Integration, ClearCase, EDA, C, Verilog, Process Improvement, Distributed Systems, Embedded Systems, Unix, Debugging, TCL, Linux, Shell Scripting, Technical Leadership, System Architecture, VHDL, Object Oriented Design, Software Design, Compilers, Software Project..., Architecture, Hardware, Simulations, Cloud Computing, Standards Development, IEEE standards, CVS, System Administration, Python, SQL, Coverity, Static Analysis, Code Coverage, Eclipse, Network Administration, Network Architecture, Apache, MySQL, PHP, PostgreSQL, DevOps
Education
Georgia Institute of Technology 1983 — 1984
MS, Information and Computer Science
Andrews University 1979 — 1983
BS, Computer Science
Krishna Uppuluri's Cadence Design Systems Experience October 1989 - May 1995
Job Strategic Product Marketing at GE Software
Industry Computer Software
Experience
GE Software August 2013 - Present
Consulting Services May 2012 - Present
Interra Systems February 2009 - April 2012
Atrenta August 2005 - February 2009
InterWeave Tech Corporation March 2000 - July 2005
InterWeave Tech May 1995 - March 2000
Cadence Design Systems October 1989 - May 1995
Daisy Systems July 1986 - October 1989
Education
Louisiana State University 1983 — 1985
MS, CS
Andhra University 1978 — 1983
BS, EE
GE Software August 2013 - Present
Consulting Services May 2012 - Present
Interra Systems February 2009 - April 2012
Atrenta August 2005 - February 2009
InterWeave Tech Corporation March 2000 - July 2005
InterWeave Tech May 1995 - March 2000
Cadence Design Systems October 1989 - May 1995
Daisy Systems July 1986 - October 1989
Education
Louisiana State University 1983 — 1985
MS, CS
Andhra University 1978 — 1983
BS, EE
Chuck Storvik's Cadence Design Systems Experience 1996 - 1999
Job MixedSignal IC Design Engineer
Industry Semiconductors
Experience
Cirrus Logic February 2009 - Present
Silicon Laboratories December 2003 - January 2009
Cygnal Integrated Products June 1999 - December 2003
Cadence Design Systems 1996 - 1999
Texas Instruments 1980 - 1996
Skills
RTL design, DFT, ATPG, Static Timing Analysis, Verilog, Emulation, Low Power Design, Timing Closure, Circuit Design, JTAG, Clock Tree Synthesis, ASIC, SoC, Logic Design, Floorplanning, Physical Design, Power Analysis, Physical Verification, Power Management, FPGA, Primetime, SystemVerilog, Signal Integrity, Altera, Semiconductor Design, Xilinx, Mixed Signal, Low-power Design, Microprocessors, Logic Synthesis, Cadence, RTL Design, Semiconductors
Education
Minnesota State University, Mankato 1976 — 1980
BSEE, Electrical Engineering
Austin Community College 1981 — 1982
GPA: 4.0
Cirrus Logic February 2009 - Present
Silicon Laboratories December 2003 - January 2009
Cygnal Integrated Products June 1999 - December 2003
Cadence Design Systems 1996 - 1999
Texas Instruments 1980 - 1996
Skills
RTL design, DFT, ATPG, Static Timing Analysis, Verilog, Emulation, Low Power Design, Timing Closure, Circuit Design, JTAG, Clock Tree Synthesis, ASIC, SoC, Logic Design, Floorplanning, Physical Design, Power Analysis, Physical Verification, Power Management, FPGA, Primetime, SystemVerilog, Signal Integrity, Altera, Semiconductor Design, Xilinx, Mixed Signal, Low-power Design, Microprocessors, Logic Synthesis, Cadence, RTL Design, Semiconductors
Education
Minnesota State University, Mankato 1976 — 1980
BSEE, Electrical Engineering
Austin Community College 1981 — 1982
GPA: 4.0
Michael Chern's Cadence Design Systems Experience December 2014 - Present
Job Sr. Engineering Manager Mechanical & Thermal
Industry Information Technology and Services
Experience
Cadence Design Systems December 2014 - Present
Cisco Systems, Inc. June 1995 - October 2014
Kubota Graphics Corp. October 1991 - May 1995
Cellnet January 1990 - September 1991
Skills
Data Center, Product Management, Cross-functional Team..., Mechanical Engineering, Windows, Integration, Project Management, Engineering Management, Testing, Product Development, Manufacturing, Design for Manufacturing, Thermal Engineering, Liquid Cooling, Management
Education
Oregon State University
Master's Degree, Mechanical Engineering
National Taiwan Ocean University
Bachelor's Degree, Mechanical Engineering
Cadence Design Systems December 2014 - Present
Cisco Systems, Inc. June 1995 - October 2014
Kubota Graphics Corp. October 1991 - May 1995
Cellnet January 1990 - September 1991
Skills
Data Center, Product Management, Cross-functional Team..., Mechanical Engineering, Windows, Integration, Project Management, Engineering Management, Testing, Product Development, Manufacturing, Design for Manufacturing, Thermal Engineering, Liquid Cooling, Management
Education
Oregon State University
Master's Degree, Mechanical Engineering
National Taiwan Ocean University
Bachelor's Degree, Mechanical Engineering
Rahul Daraad's Cadence Design Systems Experience August 2009 - July 2014
Job Masters Degree
Industry Electrical/Electronic Manufacturing
Experience
Cadence Design Systems August 2009 - July 2014
HCL Technologies October 2008 - August 2009
Wipro January 2007 - August 2008
CMC LTD November 2004 - December 2006
Skills
PCB Design, Signal Integrity, Hardware Architecture, Board Bring-up, Testing, Debugging, EDA, Requirements Analysis, Allegro, Board Station, Agile Methodologies, TCL, C, Embedded Systems, SDLC, Product Development, DFT, Functional Verification, ASIC, Distributed Systems, AMBA AHB, Business Analysis, Unix, Schematic Capture, Altium Designer, CST Microwave Studio, Software Project..., Electronics Hardware...
Education
National Institute of Technology Jamshedpur 1999 — 2003
Bachelor of Technology (B.Tech.), Electrical and Electronics Engineering
Cadence Design Systems August 2009 - July 2014
HCL Technologies October 2008 - August 2009
Wipro January 2007 - August 2008
CMC LTD November 2004 - December 2006
Skills
PCB Design, Signal Integrity, Hardware Architecture, Board Bring-up, Testing, Debugging, EDA, Requirements Analysis, Allegro, Board Station, Agile Methodologies, TCL, C, Embedded Systems, SDLC, Product Development, DFT, Functional Verification, ASIC, Distributed Systems, AMBA AHB, Business Analysis, Unix, Schematic Capture, Altium Designer, CST Microwave Studio, Software Project..., Electronics Hardware...
Education
National Institute of Technology Jamshedpur 1999 — 2003
Bachelor of Technology (B.Tech.), Electrical and Electronics Engineering
Sivakumar Kandappan Singaravadivelu's Cadence Design Systems Experience November 2011 - May 2014
Job Product Engineer at OmniVision
Industry Electrical/Electronic Manufacturing
Experience
OmniVision Technologies, Inc. October 2013 - Present
Cadence Design Systems November 2011 - May 2014
University at Buffalo August 2010 - April 2012
Cognizant Technology Solutions October 2008 - July 2009
Skills
Spice, T-Spice, Cadence Virtuoso, Cadence Spectre, Multisim, LTSpice, PSpice, Tanner EDA, Magic, C, C++, Microchip PIC, MPLAB, Pspice, SPICE, Semiconductors
Education
University at Buffalo, The State University of New York 2009 — 2011
M.S, Electrical Engineering
Anna University 2004 — 2008
Bachelors of Engineering, Electrical & Electronics engineering
OmniVision Technologies, Inc. October 2013 - Present
Cadence Design Systems November 2011 - May 2014
University at Buffalo August 2010 - April 2012
Cognizant Technology Solutions October 2008 - July 2009
Skills
Spice, T-Spice, Cadence Virtuoso, Cadence Spectre, Multisim, LTSpice, PSpice, Tanner EDA, Magic, C, C++, Microchip PIC, MPLAB, Pspice, SPICE, Semiconductors
Education
University at Buffalo, The State University of New York 2009 — 2011
M.S, Electrical Engineering
Anna University 2004 — 2008
Bachelors of Engineering, Electrical & Electronics engineering
Chi-Hung Wang's Cadence Design Systems Experience July 1998 - March 2007
Job R&D Engineer, Senior Staff at Synopsys
Industry
Experience
Synopsys 2012 - Present
Magma Design Automation March 2007 - Present
Magma 2007 - Present
Cadence Design Systems July 1998 - March 2007
Cooper & Chyan Technology July 1995 - July 1998
Synopsys December 1993 - July 1995
Arcsys, inc July 1992 - December 1993
Arcsys, inc December 1992 - March 1993
LSI Corporation July 1990 - July 1992
Skills
ASIC, TCL, SoC, Algorithms, EDA, Linux, C++, C, Perl, Debugging, Software Engineering, Embedded Systems, Python, Software Development, Verilog, Simulations
Education
Syracuse University 1988 — 1990
Master of Science, Computer Engineering
National Chiao Tung University 1982 — 1986
Bachelor of Science, Computer Engineering
Chien Kuo highschool 1979 — 1982
Diploma
Austin Community College
Synopsys 2012 - Present
Magma Design Automation March 2007 - Present
Magma 2007 - Present
Cadence Design Systems July 1998 - March 2007
Cooper & Chyan Technology July 1995 - July 1998
Synopsys December 1993 - July 1995
Arcsys, inc July 1992 - December 1993
Arcsys, inc December 1992 - March 1993
LSI Corporation July 1990 - July 1992
Skills
ASIC, TCL, SoC, Algorithms, EDA, Linux, C++, C, Perl, Debugging, Software Engineering, Embedded Systems, Python, Software Development, Verilog, Simulations
Education
Syracuse University 1988 — 1990
Master of Science, Computer Engineering
National Chiao Tung University 1982 — 1986
Bachelor of Science, Computer Engineering
Chien Kuo highschool 1979 — 1982
Diploma
Austin Community College
Peter Felton's Cadence Design Systems Experience January 2010 - March 2010
Job Attorney licensed in New York and California.
Industry Law Practice
Experience
Santa Clara Law Review April 2011 - June 2012
Santa Clara University, Center for Science, Technology, and Society August 2011 - November 2011
World Vision June 2011 - August 2011
Cerrahoglu Law Firm July 2010 - August 2010
Katharine and George Alexander Law Clinic January 2010 - May 2010
Cadence Design Systems January 2010 - March 2010
Hong Kong Court of Appeal of the High Court July 2009 - August 2009
District of Columbia Law Students in Court Program August 2007 - December 2007
Santa Clara County Office of the Public Defender January 2007 - June 2007
Skills
Corporate Law, Trials, Criminal Law, Courts, Legal Issues
Education
Santa Clara University - Leavey School of Business 2009 — 2012
M.B.A., Concentration in Finance
Santa Clara University School of Law 2008 — 2012
J.D., Law
2010 — 2010
Middle Eastern Law
The University of Hong Kong 2009 — 2009
Chinese Business Law
Santa Clara University 2004 — 2008
B.S., Political Science, Economics
American University 2007 — 2007
International Law and Organizations
Santa Clara Law Review April 2011 - June 2012
Santa Clara University, Center for Science, Technology, and Society August 2011 - November 2011
World Vision June 2011 - August 2011
Cerrahoglu Law Firm July 2010 - August 2010
Katharine and George Alexander Law Clinic January 2010 - May 2010
Cadence Design Systems January 2010 - March 2010
Hong Kong Court of Appeal of the High Court July 2009 - August 2009
District of Columbia Law Students in Court Program August 2007 - December 2007
Santa Clara County Office of the Public Defender January 2007 - June 2007
Skills
Corporate Law, Trials, Criminal Law, Courts, Legal Issues
Education
Santa Clara University - Leavey School of Business 2009 — 2012
M.B.A., Concentration in Finance
Santa Clara University School of Law 2008 — 2012
J.D., Law
2010 — 2010
Middle Eastern Law
The University of Hong Kong 2009 — 2009
Chinese Business Law
Santa Clara University 2004 — 2008
B.S., Political Science, Economics
American University 2007 — 2007
International Law and Organizations
Yu-Kuang Chang's Cadence Design Systems Experience March 2000 - April 2004
Job Software Engineer
Industry Computer Software
Experience
Intel Corporation April 2012 - Present
Nokia January 2011 - June 2011
NASA Ames Research Center June 2007 - May 2010
SGI January 2005 - February 2006
Cadence Design Systems March 2000 - April 2004
Raytheon June 1997 - March 2000
Advanced Rotorcraft Technology, Inc. June 1996 - June 1997
Arizona State University January 1995 - December 1995
Skills
Software Engineering, C, C++, Linux, OSX, Windows, Embedded Systems, Algorithms, Object Oriented Design, Java, Python
Education
Arizona State University 1989 — 1994
Doctor of Philosophy (PhD), Computer Science
National Tsing Hua University 1984 — 1986
Master's Degree, Computer Science
Intel Corporation April 2012 - Present
Nokia January 2011 - June 2011
NASA Ames Research Center June 2007 - May 2010
SGI January 2005 - February 2006
Cadence Design Systems March 2000 - April 2004
Raytheon June 1997 - March 2000
Advanced Rotorcraft Technology, Inc. June 1996 - June 1997
Arizona State University January 1995 - December 1995
Skills
Software Engineering, C, C++, Linux, OSX, Windows, Embedded Systems, Algorithms, Object Oriented Design, Java, Python
Education
Arizona State University 1989 — 1994
Doctor of Philosophy (PhD), Computer Science
National Tsing Hua University 1984 — 1986
Master's Degree, Computer Science
Reginald Thomas Jr.'s Cadence Design Systems Experience May 1997 - July 2001
Job Agency Owner at Allstate Insurance Agency
Industry Insurance
Experience
Allstate Insurance Agency August 2015 - Present
Intel Corporation December 2014 - July 2015
Rand Worldwide Inc. February 2014 - November 2014
Ricoh Americas Corporation May 2012 - February 2014
University of North Texas January 2011 - January 2014
Healthways December 2008 - May 2010
AMD November 2003 - July 2007
Motorola Solutions August 2001 - November 2003
Cadence Design Systems May 1997 - July 2001
Skills
Leadership, Training, Performance Management, Management, Program Management, Customer Service, Consulting, Cold Calling, Sales, Adobe Acrobat, Cross-functional Team..., Call Centers, Account Management, Team Building, Quality Assurance, Microsoft Excel, Cadence Virtuoso, AutoCAD, MS Office, Word,..., Unix, Microsoft Word, Troubleshooting, Process Improvement, Project Management, Microsoft Office, Strategic Planning, CRM, Assura, Calibre, PeopleSoft, Strategy, Salesforce Training, Lean Six Sigma, Cloud Computing, Solution Selling, Semiconductors
Education
University of North Texas 2011 — 2014
Bachelor of Applied Science (BASc), Psychology/Sociology
Austin Community College 1980 — 1987
Associates of Science, Engineering Graphics & Design
Allstate Insurance Agency August 2015 - Present
Intel Corporation December 2014 - July 2015
Rand Worldwide Inc. February 2014 - November 2014
Ricoh Americas Corporation May 2012 - February 2014
University of North Texas January 2011 - January 2014
Healthways December 2008 - May 2010
AMD November 2003 - July 2007
Motorola Solutions August 2001 - November 2003
Cadence Design Systems May 1997 - July 2001
Skills
Leadership, Training, Performance Management, Management, Program Management, Customer Service, Consulting, Cold Calling, Sales, Adobe Acrobat, Cross-functional Team..., Call Centers, Account Management, Team Building, Quality Assurance, Microsoft Excel, Cadence Virtuoso, AutoCAD, MS Office, Word,..., Unix, Microsoft Word, Troubleshooting, Process Improvement, Project Management, Microsoft Office, Strategic Planning, CRM, Assura, Calibre, PeopleSoft, Strategy, Salesforce Training, Lean Six Sigma, Cloud Computing, Solution Selling, Semiconductors
Education
University of North Texas 2011 — 2014
Bachelor of Applied Science (BASc), Psychology/Sociology
Austin Community College 1980 — 1987
Associates of Science, Engineering Graphics & Design
Bradly Setering's Cadence Design Systems Experience November 1997 - Present
Job Staff Applications Eng. at Cadence Design Systems
Industry Computer Software
Dayu Yang's Cadence Design Systems Experience January 2015 - Present
Job Analog Design Engineer at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems January 2015 - Present
IDT June 2011 - January 2015
Lattice Semiconductor August 2006 - June 2011
Radio Frequency IC Lab, Auburn University January 2003 - July 2006
Pericom Technology January 2002 - December 2002
Skills
Cadence Virtuoso..., Analog Artist, Diva, Mentor Calibre, Synopsys DC, Primetime, Tetramax, Agilent ADS, Verdi/Debussy/DVE, Synchronicity, SmartSpice, HSPICE, Finesim, Spectre, AFS, VCS, NC-Sim, Nanosim, ICX, Momentum, Perl, K/B/C Shell, Tcl/tk, Matlab/Simulink, Verilog, Verilog-A, C++, SPICE, TCL, Circuit Design, Analog, CMOS, Mixed Signal
Education
Auburn University 2003 — 2006
Doctor of Philosophy (Ph.D.), Electrical Engineering
Shanghai Jiao Tong University 1999 — 2002
Master of Science (M.S.), Electrical Engineering
Shanghai Jiao Tong University 1995 — 1999
Bachelor of Science (B.S.), Communication Engineering
Cadence Design Systems January 2015 - Present
IDT June 2011 - January 2015
Lattice Semiconductor August 2006 - June 2011
Radio Frequency IC Lab, Auburn University January 2003 - July 2006
Pericom Technology January 2002 - December 2002
Skills
Cadence Virtuoso..., Analog Artist, Diva, Mentor Calibre, Synopsys DC, Primetime, Tetramax, Agilent ADS, Verdi/Debussy/DVE, Synchronicity, SmartSpice, HSPICE, Finesim, Spectre, AFS, VCS, NC-Sim, Nanosim, ICX, Momentum, Perl, K/B/C Shell, Tcl/tk, Matlab/Simulink, Verilog, Verilog-A, C++, SPICE, TCL, Circuit Design, Analog, CMOS, Mixed Signal
Education
Auburn University 2003 — 2006
Doctor of Philosophy (Ph.D.), Electrical Engineering
Shanghai Jiao Tong University 1999 — 2002
Master of Science (M.S.), Electrical Engineering
Shanghai Jiao Tong University 1995 — 1999
Bachelor of Science (B.S.), Communication Engineering
Hewlett-Packard
SAP
Symantec
Intuit
HP
salesforce.com
Bloomberg LP
Autodesk