Samsung Austin R&D Center
Address: 3900 N Capital of Texas Hwy, Austin, TX 78746 Hours: Closed ⋅ Opens 8AM Mon SundayClosedMonday(Martin Luther King Jr. Day)8AM–6PMHours might differTuesday8AM–6PMWednesday8AM–6PMThursday8AM–6PMFriday8AM–6PMSaturdayClosedSuggest an edit Unable to add this file. Please check that it is a valid photo. Phone: (512) 425-2500: : Website: Place name: : : Category: : : Website: http://www.samsung.com/us/careers/ Category: Research and product development Suggest an editUnable to add this file. Please check that it is a valid photo. Unable to add this file. Please check that it is a valid photo. Questions & answers Ask a questionBe the first to ask a questionPopular times Sundays MondaysTuesdaysWednesdaysThursdaysFridaysSaturdaysSundaysBased on visits to this place.Closed Sundays—pick another day : 12a3a6a9a12p3p6p9p12a3a6aPlan your visitClosed Sundays—pick another dayClosed Saturdays—pick another dayHistogram showing popular times on MondaysHistogram showing popular times on TuesdaysHistogram showing popular times on WednesdaysHistogram showing popular times on ThursdaysHistogram showing popular times on FridaysPeople typically spend 1-5 hours here Add a photoThanks for sharing!Your photo will be posted publicly on Google.Contribute MoreDoneUpload public photos of Samsung SARC Posting publicly on the Web Write a review Reviews"Good place to work :)" "I install the cubicle Furniture and they all are some Great People." "No help in fixing my Samsung galaxy note 4!!" View all Google reviews
Samsung Austin R&D Center List of Employees There's an exhaustive list of past and present employees! Get comprehensive information on the number of employees at Samsung Austin R&D Center. You can filter them based on skills, years of employment, job, education, department, and prior employment.
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Samsung Austin R&D Center Employees
Aroop Sail Samsung Austin R&D Center May 2015 - Present
Cypress Semiconductor Corporation June 2013 - July 2014
Cypress Semiconductor Corporation June 2011 - June 2013
Skills
Semiconductors, LabVIEW, VLSI, C, C++, Device Characterization, Testing, Failure Analysis, Silicon, Firmware, Debugging, Product Engineering, Hardware, cmos, Test Automation, Cadence Virtuoso, Cadence Virtuoso Layout..., Perl, Verilog, USB, CMOS
Education
University of Minnesota-Twin Cities 2014 — 2015
Master's Degree, Electrical and Computer Engineering (VLSI)
R. V. College of Engineering, Bangalore 2007 — 2011
Bachelor of Engineering (B.E.), Electronics and Communications Engineering
Sheldon Cheng Samsung Austin R&D Center May 2012 - Present
Freescale Semiconductor September 2010 - May 2012
Obsidian Software July 2001 - September 2010
Qualcomm 2004 - 2005
Skills
Perl, SystemVerilog, Functional Verification, TCL, Shell Scripting, C, C++, Debugging, Unix, Scripting, System Architecture, Linux, Software Engineering, ARM, Processors, Software Development, Programming
Education
University of Michigan 1998 — 2000
Bachelor of Science (B.S.), Computer Science & Linguistics
Nischit Bharadwaj Samsung Austin R&D Center May 2013 - August 2013
CVC Pvt Ltd April 2012 - July 2012
Skills
Verilog, Pspice, ModelSim, NCVerilog, Cadence Virtuoso, Cadence Schematic..., Cadence Virtuoso Layout..., C, C++, VHDL, Labview, Matlab, SPICE, Digital Circuit Design, Simulations, Perl
Education
University of Michigan 2012 — 2013
Electrical Engineering, VLSI, 3.77
R. V. College of Engineering, Bangalore 2008 — 2012
Bachelor of Engineering (B.E.), Instrumentation Technology, 9.65
The Frank Anthony Public School
High school
Joseph Mathews AMD June 2014 - Present
University of Southern California August 2012 - July 2014
Samsung Austin R&D Center January 2014 - May 2014
University of Southern California, School Of Pharmacy September 2013 - January 2014
Stealth Mode Startup June 2013 - August 2013
USC Regulatory Science dept. August 2012 - June 2013
Microsoft Corporation July 2010 - July 2012
ROBERT BOSCH ENGINEERING INDIA January 2010 - July 2010
Skills
VLSI, Verilog, C, VHDL, Matlab, Embedded Systems, Perl, FPGA, Embedded C, Cadence Virtuoso, ModelSim, Shell Scripting, Simulations, Computer Architecture, Unix, IIS, Active Directory, Microsoft Exchange, Network Monitoring Tools, Xilinx ISE, Keil, Algorithms, Hyper-V, Python, Debugging, Hardware Architecture, Assembly Language, Microcontrollers, Cadence, Xilinx, Active Directory..., Questa, NCSim, Cadence Spectre, Ultrasim, Cadence Liberate, LEC, Wireshark, SystemVerilog, SimpleScalar, Cacti, Real Estimator, Synopsis, DesignCompiler, Primetime, TCL, System Verilog, C++, Ruby on Rails, Formality
Education
Visvesvaraya Technological University 2006 — 2010
Bachelor's of Engineering, Electronics & Communication
University of Southern California
Ashutosh Moghe Samsung Austin R&D Center September 2012 - Present
Freescale Semiconductor June 2010 - September 2012
Iris Technologies December 2009 - May 2010
University of Southern California June 2009 - August 2009
Qualcomm January 2009 - May 2009
Skills
Verilog, SystemVerilog, ModelSim, Cadence Virtuoso, Quartus, Perl, C, C++, Assertion Based..., PowerPC, Linux, Computer Architecture, VHDL, Microprocessors, Processors, ARM, Vera, Logic Design, Assembly Language, Multithreading, Open Verification..., Hardware Architecture
Education
University of Mumbai 2003 — 2007
B.E, Electronics
University of Southern California 2007 — 2009
MS, Computer Engineering
Nithesh Kurella Samsung Austin R&D Center July 2015 - Present
Samsung Austin R&D Center January 2015 - May 2015
University of Massachusetts Amherst June 2013 - December 2014
University of Massachusetts Amherst February 2014 - May 2014
University of Massachusetts Amherst September 2013 - January 2014
Skills
Verilog, C++, Computer Architecture, C, Matlab, Cadence Virtuoso, VLSI, Microprocessors, Perl, Python, Linux, LaTeX, Performance and Power..., Power-Thermal...
Education
University of Massachusetts, Amherst 2012 — 2014
Master's degree, Computer Engineering
BNM Institute of Technology 2008 — 2012
Bachelor of Engineering (B.E.), Electrical, Electronics and Communications Engineering
SBMJC
James Dundas Samsung Austin R&D Center December 2012 - Present
AMD February 2005 - December 2012
Intel Corporation July 1999 - February 2005
Intel Corporation February 1998 - July 1999
Skills
Verilog, RTL Development, Computer Architecture, RTL Design, Low Power Design, Microprocessors, Processors, Logic Design, Microarchitecture, RTL design, ASIC, Low-power Design, Functional Verification, X86
Education
University of Michigan 1993 — 1998
Ph.D., Electrical Engineering
University of Michigan 1993 — 1998
Master of Science (M.S.), Electrical Engineering
University of Michigan-Dearborn 1987 — 1992
Bachelor of Science (B.S.), Electrical Engineering