Jasper Design Automation
Industry: Software company
DescriptionHeadquarters: Mountain View, CA Founded: 1999 Parent organization: Cadence Design Systems
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Jasper Design Automation Employees
Employee
Years
Job
Industry
Marcus da Mata Marcus da Mata's Jasper Design Automation Experience February 2014 - August 2014
Job Lead Application Engineer at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems July 2015 - Present
Cadence Design Systems September 2014 - June 2015
Jasper Design Automation February 2014 - August 2014
Jasper Design Automation September 2013 - January 2014
Jasper Design Automation March 2012 - August 2013
Skills
Formal Verification, Verilog, Hardware, TCL, Bash, C++, Programming, C, Java, Linux, Matlab, LaTeX, Python, Debugging, Software Engineering
Education
Centro Federal de Educação Tecnológica de Minas Gerais 2008 — 2013
Bachelor's degree, Computer Engineering
Cadence Design Systems July 2015 - Present
Cadence Design Systems September 2014 - June 2015
Jasper Design Automation February 2014 - August 2014
Jasper Design Automation September 2013 - January 2014
Jasper Design Automation March 2012 - August 2013
Skills
Formal Verification, Verilog, Hardware, TCL, Bash, C++, Programming, C, Java, Linux, Matlab, LaTeX, Python, Debugging, Software Engineering
Education
Centro Federal de Educação Tecnológica de Minas Gerais 2008 — 2013
Bachelor's degree, Computer Engineering
Frederico Yoshida Frederico Yoshida's Jasper Design Automation Experience August 2013 - June 2014
Job Lead Application Engineer at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems June 2014 - Present
Jasper Design Automation August 2013 - June 2014
Jasper Design Automation January 2012 - July 2013
Instituto de Cultura Oriental April 2010 - September 2012
Lightning Research Center - CEMIG/UFMG September 2011 - December 2011
Global Ciência e Tecnologia Bio S/A September 2007 - February 2010
Skills
Verilog, Formal Verification, TCL, C++, Software Engineering, Programming, SystemVerilog, Simulations, AMBA, Matlab, FPGA, C, Embedded Systems
Education
Universidade Federal de Minas Gerais 2007 — 2013
B.S., Control & Automation Engineering
Cadence Design Systems June 2014 - Present
Jasper Design Automation August 2013 - June 2014
Jasper Design Automation January 2012 - July 2013
Instituto de Cultura Oriental April 2010 - September 2012
Lightning Research Center - CEMIG/UFMG September 2011 - December 2011
Global Ciência e Tecnologia Bio S/A September 2007 - February 2010
Skills
Verilog, Formal Verification, TCL, C++, Software Engineering, Programming, SystemVerilog, Simulations, AMBA, Matlab, FPGA, C, Embedded Systems
Education
Universidade Federal de Minas Gerais 2007 — 2013
B.S., Control & Automation Engineering
Rajeev Ranjan Rajeev Ranjan's Jasper Design Automation Experience April 2006 - June 2014
Job Sr. Group Director at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems June 2014 - Present
Jasper Design Automation April 2006 - June 2014
Jasper Design Automation September 2003 - March 2006
Real Intent May 1999 - September 2003
Synopsys October 1997 - May 1999
Cadence Design Systems, Berkeley Labs 1997 - 1997
Skills
Formal Verification, Semiconductors, SystemVerilog, Simulations, Functional Verification, Debugging, Logic Synthesis, FPGA, ASIC, Optimization, Testing, Optimizations, EDA, SoC, Verilog, Product Management, Start-ups, Engineering Management
Education
University of Pennsylvania - The Wharton School 2013 — 2015
Master of Business Administration (M.B.A.), Entrepreneurship/Entrepreneurial Studies, Management
University of California, Berkeley 1992 — 1997
Ph.D., Electricial Engineering and Computer Science
University of Illinois at Urbana-Champaign 1991 — 1992
M.S., Electrical Engineering
Indian Institute of Technology, Kanpur 1986 — 1990
B. Tech., Electrical Engineering, 9.8/10.0
Science College, Patna University 1984 — 1986
Intermediate of Science, Mathematics
Cadence Design Systems June 2014 - Present
Jasper Design Automation April 2006 - June 2014
Jasper Design Automation September 2003 - March 2006
Real Intent May 1999 - September 2003
Synopsys October 1997 - May 1999
Cadence Design Systems, Berkeley Labs 1997 - 1997
Skills
Formal Verification, Semiconductors, SystemVerilog, Simulations, Functional Verification, Debugging, Logic Synthesis, FPGA, ASIC, Optimization, Testing, Optimizations, EDA, SoC, Verilog, Product Management, Start-ups, Engineering Management
Education
University of Pennsylvania - The Wharton School 2013 — 2015
Master of Business Administration (M.B.A.), Entrepreneurship/Entrepreneurial Studies, Management
University of California, Berkeley 1992 — 1997
Ph.D., Electricial Engineering and Computer Science
University of Illinois at Urbana-Champaign 1991 — 1992
M.S., Electrical Engineering
Indian Institute of Technology, Kanpur 1986 — 1990
B. Tech., Electrical Engineering, 9.8/10.0
Science College, Patna University 1984 — 1986
Intermediate of Science, Mathematics
Mark Firstenberg Mark Firstenberg's Jasper Design Automation Experience September 2013 - June 2014
Job Staff Engineer at Intel Corporation
Industry Computer Hardware
Experience
Intel Corporation November 2014 - Present
Jasper Design Automation September 2013 - June 2014
IBM July 2004 - July 2013
Sun Microsystems March 1998 - June 2004
Stratus Computer, Inc. February 1996 - February 1998
Viewlogic Systems, Inc. November 1994 - January 1996
Digital Equipment Corporation April 1991 - October 1994
Digital Equipment Corporation March 1985 - March 1991
Digital Equipment Corporation September 1982 - April 1985
Digital Equipment Corporation June 1981 - August 1982
Skills
Hardware Architecture, Microprocessors, Computer Architecture, VHDL, Perl, Verilog, Functional Verification, Logic Design, SoC, Processors, Hardware, Unix, Formal Verification, Embedded Systems, Software Engineering, Equivalence Checking, Simulations, C++, High Performance...
Education
Cornell University 1977 — 1981
B.S.E.E. Degree
Worcester Polytechnic Institute
Intel Corporation November 2014 - Present
Jasper Design Automation September 2013 - June 2014
IBM July 2004 - July 2013
Sun Microsystems March 1998 - June 2004
Stratus Computer, Inc. February 1996 - February 1998
Viewlogic Systems, Inc. November 1994 - January 1996
Digital Equipment Corporation April 1991 - October 1994
Digital Equipment Corporation March 1985 - March 1991
Digital Equipment Corporation September 1982 - April 1985
Digital Equipment Corporation June 1981 - August 1982
Skills
Hardware Architecture, Microprocessors, Computer Architecture, VHDL, Perl, Verilog, Functional Verification, Logic Design, SoC, Processors, Hardware, Unix, Formal Verification, Embedded Systems, Software Engineering, Equivalence Checking, Simulations, C++, High Performance...
Education
Cornell University 1977 — 1981
B.S.E.E. Degree
Worcester Polytechnic Institute
João Palotti João Palotti's Jasper Design Automation Experience December 2009 - April 2010
Job PhD candidate at Vienna University of Technology
Industry Information Technology and Services
Experience
Vienna University of Technology October 2011 - Present
Infosys January 2011 - April 2011
Jasper Design Automation December 2009 - April 2010
Samba Tech August 2009 - November 2009
Skills
Machine Learning, Information Retrieval, Python, C++, Computer Science, Programming, Linux, Java, Algorithms, C, Natural Language..., Artificial Intelligence, LaTeX, Software Engineering, Data Mining, Android, Cooking, Data Analysis, Comedy, Research, Log Analysis, Lucene, Road Biking, Billiards, Swimming, Table Tennis, Football, Running, Soccer
Education
Vienna University of Technology 2011 — 2015
Doctor of Philosophy (Ph.D.), Computer Science
Universidade Federal de Minas Gerais 2010 — 2011
Master's degree, Computer Science
Universidade Federal de Minas Gerais 2005 — 2009
Bachelor's degree, Computer science, 4.83/5
Vienna University of Technology October 2011 - Present
Infosys January 2011 - April 2011
Jasper Design Automation December 2009 - April 2010
Samba Tech August 2009 - November 2009
Skills
Machine Learning, Information Retrieval, Python, C++, Computer Science, Programming, Linux, Java, Algorithms, C, Natural Language..., Artificial Intelligence, LaTeX, Software Engineering, Data Mining, Android, Cooking, Data Analysis, Comedy, Research, Log Analysis, Lucene, Road Biking, Billiards, Swimming, Table Tennis, Football, Running, Soccer
Education
Vienna University of Technology 2011 — 2015
Doctor of Philosophy (Ph.D.), Computer Science
Universidade Federal de Minas Gerais 2010 — 2011
Master's degree, Computer Science
Universidade Federal de Minas Gerais 2005 — 2009
Bachelor's degree, Computer science, 4.83/5
Danielle Arnold Danielle Arnold's Jasper Design Automation Experience 2014 - 2014
Job Marketing Specialist at Synopsys Inc
Industry Marketing and Advertising
Experience
Synopsys Inc July 2015 - Present
Atrenta 2014 - August 2015
Jasper Design Automation 2014 - 2014
Chili's 2008 - 2014
Senior American Funding 2007 - 2008
Chili's 2002 - 2007
Skills
Management, Restaurants, Leadership, Food, Event Planning, Training, Process Scheduler, Marketing Strategy, Team Building, Sales, Fundraising, Customer Service, Scheduling, Social Media Marketing, Trade Shows, Google Analytics, Google Adwords, Photoshop, Marketing, Social Media, Microsoft Office, Strategy, Facebook
Education
San Jose State University 2004 — 2007
BACHELOR OF SCIENCE, MARKETING
Synopsys Inc July 2015 - Present
Atrenta 2014 - August 2015
Jasper Design Automation 2014 - 2014
Chili's 2008 - 2014
Senior American Funding 2007 - 2008
Chili's 2002 - 2007
Skills
Management, Restaurants, Leadership, Food, Event Planning, Training, Process Scheduler, Marketing Strategy, Team Building, Sales, Fundraising, Customer Service, Scheduling, Social Media Marketing, Trade Shows, Google Analytics, Google Adwords, Photoshop, Marketing, Social Media, Microsoft Office, Strategy, Facebook
Education
San Jose State University 2004 — 2007
BACHELOR OF SCIENCE, MARKETING
Nafees Qureshy Nafees Qureshy's Jasper Design Automation Experience October 2004 - February 2006
Job Senior Engineering Executive
Industry Computer Software
Experience
Berkeley Design Automation March 2011 - Present
Nusym Technology September 2008 - June 2010
Arteris June 2006 - May 2008
Jasper Design Automation October 2004 - February 2006
CoWare Inc. January 2002 - September 2004
TechnoStride Software Inc. May 1999 - January 2002
IKOS System Inc. 1989 - 1999
Skills
EDA, Semiconductors, Simulations, Software Development, Functional Verification, Agile Methodologies, Computer Architecture, Perl, Algorithms, Engineering Management, Debugging, SystemC, VHDL, Software Engineering, VLSI, Compilers, Engineering, Linux, Unix, Project Management
Education
Arizona State University
MS, Computer Science
Indian Institute of Technology, Bombay
B. Tech, Electrical Engineering
Berkeley Design Automation March 2011 - Present
Nusym Technology September 2008 - June 2010
Arteris June 2006 - May 2008
Jasper Design Automation October 2004 - February 2006
CoWare Inc. January 2002 - September 2004
TechnoStride Software Inc. May 1999 - January 2002
IKOS System Inc. 1989 - 1999
Skills
EDA, Semiconductors, Simulations, Software Development, Functional Verification, Agile Methodologies, Computer Architecture, Perl, Algorithms, Engineering Management, Debugging, SystemC, VHDL, Software Engineering, VLSI, Compilers, Engineering, Linux, Unix, Project Management
Education
Arizona State University
MS, Computer Science
Indian Institute of Technology, Bombay
B. Tech, Electrical Engineering
Brian Bailey Brian Bailey's Jasper Design Automation Experience 2005 - June 2014
Job Technology Editor / EDA at SemiEngineering.com
Industry Computer Software
Experience
SemiEngineering.com October 2013 - Present
Zocalo-Tech November 2010 - Present
Brian Bailey Consulting July 2004 - Present
Accellera Systems Initiative September 2000 - Present
Jasper Design Automation 2005 - June 2014
UBM Electronics September 2011 - September 2013
Poseidon Design Systems February 2006 - February 2007
Mentor Graphics January 1992 - July 2004
Synopsys June 1990 - December 1992
Zycad Corp April 1988 - June 1990
Skills
Functional Verification, Business Development, Strategy, Statistical Tools, Due Diligence, Market Development, ESL, Start-ups, EDA, SoC, FPGA, Verilog, Writing, Simulations, Electronics, Embedded Systems, ModelSim, ASIC, Semiconductors, RTL design, Computer Architecture, IC, Debugging, Algorithms, Integrated Circuit..., VHDL, Integration, VLSI, SystemVerilog, Hardware Architecture, Product Marketing, Mixed Signal, Digital Signal..., ARM, Embedded Software, Processors, Product Development, System Architecture, Hardware, Microprocessors, Software Design, Software Engineering, Microcontrollers, Firmware, System Design, Analog, Xilinx, Device Drivers, C
Education
Brunel University 1977 — 1981
BSc, Electrical and Electronic Engineering
SemiEngineering.com October 2013 - Present
Zocalo-Tech November 2010 - Present
Brian Bailey Consulting July 2004 - Present
Accellera Systems Initiative September 2000 - Present
Jasper Design Automation 2005 - June 2014
UBM Electronics September 2011 - September 2013
Poseidon Design Systems February 2006 - February 2007
Mentor Graphics January 1992 - July 2004
Synopsys June 1990 - December 1992
Zycad Corp April 1988 - June 1990
Skills
Functional Verification, Business Development, Strategy, Statistical Tools, Due Diligence, Market Development, ESL, Start-ups, EDA, SoC, FPGA, Verilog, Writing, Simulations, Electronics, Embedded Systems, ModelSim, ASIC, Semiconductors, RTL design, Computer Architecture, IC, Debugging, Algorithms, Integrated Circuit..., VHDL, Integration, VLSI, SystemVerilog, Hardware Architecture, Product Marketing, Mixed Signal, Digital Signal..., ARM, Embedded Software, Processors, Product Development, System Architecture, Hardware, Microprocessors, Software Design, Software Engineering, Microcontrollers, Firmware, System Design, Analog, Xilinx, Device Drivers, C
Education
Brunel University 1977 — 1981
BSc, Electrical and Electronic Engineering
Sergey Khaikin Sergey Khaikin's Jasper Design Automation Experience March 2011 - June 2014
Job Staff Applications Engineer at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems June 2014 - Present
Jasper Design Automation March 2011 - June 2014
Intel January 2008 - March 2011
Intel July 2002 - January 2008
Atid Computers LTD October 1995 - March 2000
Skills
EDA, TCL, Debugging, Verilog, Perl, SystemVerilog, Processors, SoC, C, C++, Functional Verification, Formal Verification, Intel, Computer Architecture, Microprocessors, Software Engineering, ASIC, Simulations, VLSI, RTL design, Hardware Architecture, Volleyball
Education
Technion - Israel Institute of Technology 2000 — 2004
B.Sc, Computer Science
Cadence Design Systems June 2014 - Present
Jasper Design Automation March 2011 - June 2014
Intel January 2008 - March 2011
Intel July 2002 - January 2008
Atid Computers LTD October 1995 - March 2000
Skills
EDA, TCL, Debugging, Verilog, Perl, SystemVerilog, Processors, SoC, C, C++, Functional Verification, Formal Verification, Intel, Computer Architecture, Microprocessors, Software Engineering, ASIC, Simulations, VLSI, RTL design, Hardware Architecture, Volleyball
Education
Technion - Israel Institute of Technology 2000 — 2004
B.Sc, Computer Science
David Hoenig David Hoenig's Jasper Design Automation Experience April 2011 - June 2014
Job Staff Application Engineer at Cadence Design Systems
Industry Computer Hardware
Experience
Cadence Design Systems June 2014 - Present
Jasper Design Automation April 2011 - June 2014
NVIDIA February 2009 - April 2011
Intel Corporation June 1998 - February 2009
Intel Corporation January 1997 - August 1997
Skills
Functional Verification, SystemVerilog, Verilog, TCL, Perl, Hardware, Formal Verification, EDA, Processors, ASIC, RTL design, Semiconductors, Computer Architecture, Debugging, SoC, RTL Design
Education
University of Michigan 1993 — 1998
BS, Computer Engineering
Cadence Design Systems June 2014 - Present
Jasper Design Automation April 2011 - June 2014
NVIDIA February 2009 - April 2011
Intel Corporation June 1998 - February 2009
Intel Corporation January 1997 - August 1997
Skills
Functional Verification, SystemVerilog, Verilog, TCL, Perl, Hardware, Formal Verification, EDA, Processors, ASIC, RTL design, Semiconductors, Computer Architecture, Debugging, SoC, RTL Design
Education
University of Michigan 1993 — 1998
BS, Computer Engineering
Craig Cochran Craig Cochran's Jasper Design Automation Experience August 2004 - March 2008
Job
Industry Computer Software
Experience
Cadence Design Systems January 2012 - Present
Real Intent January 2011 - January 2012
ChipVision Design Systems AG July 2008 - January 2011
Jasper Design Automation August 2004 - March 2008
Synopsys January 2004 - August 2004
Synopsys January 2000 - December 2003
Synopsys March 1997 - December 1999
Synopsys 1995 - 1997
Synopsys 1991 - 1995
Valid Logic Systems January 1989 - December 1990
Skills
Product Management, Integrated Marketing, Product Marketing, Cross-functional Team..., Start-ups, Corporate Branding, Leadership, Marketing, Marketing Communications, Product Launch, Marketing Strategy, Product Development, EDA, Go-to-market Strategy, Management, Semiconductors, Competitive Analysis, SaaS, Strategy, Marketing Management, Positioning, ASIC, Market Research, Program Management, Strategic Planning, Business Development, Trade Shows, Corporate Communications, Mergers, Strategic Partnerships
Education
Stanford University Graduate School of Business
Stanford University Graduate School of Business
Georgia Institute of Technology 1982 — 1986
BSEE
Cadence Design Systems January 2012 - Present
Real Intent January 2011 - January 2012
ChipVision Design Systems AG July 2008 - January 2011
Jasper Design Automation August 2004 - March 2008
Synopsys January 2004 - August 2004
Synopsys January 2000 - December 2003
Synopsys March 1997 - December 1999
Synopsys 1995 - 1997
Synopsys 1991 - 1995
Valid Logic Systems January 1989 - December 1990
Skills
Product Management, Integrated Marketing, Product Marketing, Cross-functional Team..., Start-ups, Corporate Branding, Leadership, Marketing, Marketing Communications, Product Launch, Marketing Strategy, Product Development, EDA, Go-to-market Strategy, Management, Semiconductors, Competitive Analysis, SaaS, Strategy, Marketing Management, Positioning, ASIC, Market Research, Program Management, Strategic Planning, Business Development, Trade Shows, Corporate Communications, Mergers, Strategic Partnerships
Education
Stanford University Graduate School of Business
Stanford University Graduate School of Business
Georgia Institute of Technology 1982 — 1986
BSEE
Atlas Yeo Atlas Yeo's Jasper Design Automation Experience November 2003 - June 2006
Job IT Manager West Coast USA Region at ANSYS, Inc.
Industry Computer Software
Experience
ANSYS, Inc. April 2014 - Present
Apache Design Solutions October 2007 - April 2014
Magma Design Automation June 2006 - October 2007
Jasper Design Automation November 2003 - June 2006
Cadence Design System July 2003 - November 2003
Verplex Systems November 2000 - July 2003
GWCom 2000 - 2000
Skills
Unix, Linux, Solaris, Bash, C, VMware, Perl, Project Management, IT Operations, IT Management, Vendor Management, Network Administration, Apache, Software Development, Shell Scripting, Strategy, Start-ups, Networking, Operating Systems, EDA, Debugging, Cloud Computing, Wireless, System Architecture, C++
Education
Iowa State University 1995 — 1998
Bsc Electrical Engineering, Electrical Engineering
Iowa State University 1995 — 1998
Bachelor of Science (B.S.), Electrical and Electronics Engineering
ANSYS, Inc. April 2014 - Present
Apache Design Solutions October 2007 - April 2014
Magma Design Automation June 2006 - October 2007
Jasper Design Automation November 2003 - June 2006
Cadence Design System July 2003 - November 2003
Verplex Systems November 2000 - July 2003
GWCom 2000 - 2000
Skills
Unix, Linux, Solaris, Bash, C, VMware, Perl, Project Management, IT Operations, IT Management, Vendor Management, Network Administration, Apache, Software Development, Shell Scripting, Strategy, Start-ups, Networking, Operating Systems, EDA, Debugging, Cloud Computing, Wireless, System Architecture, C++
Education
Iowa State University 1995 — 1998
Bsc Electrical Engineering, Electrical Engineering
Iowa State University 1995 — 1998
Bachelor of Science (B.S.), Electrical and Electronics Engineering
Thiago Radicchi Thiago Radicchi's Jasper Design Automation Experience January 2012 - June 2014
Job Senior Principal Software Engineer na Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems June 2014 - Present
Jasper Design Automation January 2012 - June 2014
Jasper Design Automation July 2004 - January 2012
UFMG February 2001 - November 2004
Skills
Linux, Solaris, Verilog, Java, Perl, Shell Scripting, TCL, Bash, Algorithms, C, C++, Unix, Computer Science, Software Engineering, Programming, Software Development, VHDL, Debugging, Formal Verification, RTL design, Computer Architecture, Embedded Systems, Object Oriented Design, EDA, DNS, Network Administration, OOP, Operating Systems, SystemVerilog, Functional Verification, Hardware, Unix Shell Scripting, Hardware Architecture, CentOS, Multithreading, Distributed Systems, Shell script
Education
Universidade Federal de Minas Gerais 2004 — 2007
MSc, Computer Science, Formal Verification
Universidade Federal de Minas Gerais 2000 — 2003
BSc, Computer Science
Cadence Design Systems June 2014 - Present
Jasper Design Automation January 2012 - June 2014
Jasper Design Automation July 2004 - January 2012
UFMG February 2001 - November 2004
Skills
Linux, Solaris, Verilog, Java, Perl, Shell Scripting, TCL, Bash, Algorithms, C, C++, Unix, Computer Science, Software Engineering, Programming, Software Development, VHDL, Debugging, Formal Verification, RTL design, Computer Architecture, Embedded Systems, Object Oriented Design, EDA, DNS, Network Administration, OOP, Operating Systems, SystemVerilog, Functional Verification, Hardware, Unix Shell Scripting, Hardware Architecture, CentOS, Multithreading, Distributed Systems, Shell script
Education
Universidade Federal de Minas Gerais 2004 — 2007
MSc, Computer Science, Formal Verification
Universidade Federal de Minas Gerais 2000 — 2003
BSc, Computer Science
Nicole Kyle Nicole Kyle's Jasper Design Automation Experience May 2013 - August 2013
Job Mailroom Assistant at Harvey Mudd College
Industry
Experience
Seagate Technology May 2015 - August 2015
Harvey Mudd College January 2014 - May 2014
Harvey Mudd College September 2013 - December 2013
Jasper Design Automation May 2013 - August 2013
Skills
Microsoft Word, Microsoft Excel, PowerPoint, Social Media, Event Planning, Research, Windows, English, MATLAB, Linux, Bash
Education
Harvey Mudd College 2012 — 2016
Bachelor of Science (B.S.), Engineering
Mercy High School 2008 — 2012
Seagate Technology May 2015 - August 2015
Harvey Mudd College January 2014 - May 2014
Harvey Mudd College September 2013 - December 2013
Jasper Design Automation May 2013 - August 2013
Skills
Microsoft Word, Microsoft Excel, PowerPoint, Social Media, Event Planning, Research, Windows, English, MATLAB, Linux, Bash
Education
Harvey Mudd College 2012 — 2016
Bachelor of Science (B.S.), Engineering
Mercy High School 2008 — 2012
Lili Bowers Lili Bowers's Jasper Design Automation Experience March 2013 - June 2014
Job Operations Manager at SCRAP USA
Industry Environmental Services
Experience
SCRAP USA May 2014 - Present
Jasper Design Automation March 2013 - June 2014
Jasper Design Automation May 2009 - March 2013
City of Sunnyvale June 2005 - August 2007
Westminster Woods March 2005 - July 2005
Skills
Event Management, Budgets, Microsoft Excel, Customer Service, Microsoft Office, Event Planning, Outlook, Microsoft Word, PowerPoint, Confidentiality, Administrative..., Marketing
Education
Sonoma State University 2004 — 2008
B.A., Energy Management and Design
SCRAP USA May 2014 - Present
Jasper Design Automation March 2013 - June 2014
Jasper Design Automation May 2009 - March 2013
City of Sunnyvale June 2005 - August 2007
Westminster Woods March 2005 - July 2005
Skills
Event Management, Budgets, Microsoft Excel, Customer Service, Microsoft Office, Event Planning, Outlook, Microsoft Word, PowerPoint, Confidentiality, Administrative..., Marketing
Education
Sonoma State University 2004 — 2008
B.A., Energy Management and Design
Oz Levia Oz Levia's Jasper Design Automation Experience March 2011 - June 2014
Job Business Development Professional; Attorney
Industry Computer Software
Experience
Cadence Design Systems September 2014 - Present
Jasper Design Automation March 2011 - June 2014
SpringSoft (Acquired Novas in 2008) September 2006 - July 2010
Crane Design, Inc. February 2003 - January 2010
Synopsys September 2003 - September 2006
Improv July 1997 - February 2003
Cadence Design Systems 1996 - 1997
Skills
Business Strategy, IP, EDA, DSP, M&A experience, Contract Negotiation, Software Licensing, Product Marketing, Corporate Communications, Functional Verification, Digital Signal..., Licensing, ASIC, Semiconductors, Strategic Partnerships, Product Management, Mergers & Acquisitions, Start-ups, Strategy, Entrepreneurship, SoC, Enterprise Software, Marketing Strategy, Business Development, IC, Microprocessors, Embedded Systems, Go-to-market Strategy, Management, Leadership
Education
Santa Clara University School of Law 2006 — 2010
JD, LAW
Boston College 1989 — 1992
MS, CS
University of Minnesota-Twin Cities 1985 — 1988
BS, CS
Cadence Design Systems September 2014 - Present
Jasper Design Automation March 2011 - June 2014
SpringSoft (Acquired Novas in 2008) September 2006 - July 2010
Crane Design, Inc. February 2003 - January 2010
Synopsys September 2003 - September 2006
Improv July 1997 - February 2003
Cadence Design Systems 1996 - 1997
Skills
Business Strategy, IP, EDA, DSP, M&A experience, Contract Negotiation, Software Licensing, Product Marketing, Corporate Communications, Functional Verification, Digital Signal..., Licensing, ASIC, Semiconductors, Strategic Partnerships, Product Management, Mergers & Acquisitions, Start-ups, Strategy, Entrepreneurship, SoC, Enterprise Software, Marketing Strategy, Business Development, IC, Microprocessors, Embedded Systems, Go-to-market Strategy, Management, Leadership
Education
Santa Clara University School of Law 2006 — 2010
JD, LAW
Boston College 1989 — 1992
MS, CS
University of Minnesota-Twin Cities 1985 — 1988
BS, CS
Andy Stein's Jasper Design Automation Experience December 2011 - October 2014
Job VP of North America Sales at Avery Design Systems
Industry Electrical/Electronic Manufacturing
Experience
Avery Design Systems October 2014 - Present
Jasper Design Automation December 2011 - October 2014
NextOp Software February 2009 - December 2011
Montage Technology Group, Inc March 2009 - October 2009
Alchip Technologies February 2009 - October 2009
Wind River February 2008 - February 2009
Synopsys 2002 - 2007
Co-design Automation 2000 - 2002
Frequency Technology 1999 - 2000
Cadence Design Systems 1998 - 1999
Skills
Mobile Devices, Semiconductors, Embedded Systems, Selling, ASIC, Business Development, Hardware, Integration, Sales Operations, EDA, Strategy, Enterprise Software, Start-ups, Consulting, Entrepreneurship, Leadership, Product Marketing, Product Management, Sales, Wireless, IC, Professional Services
Education
University of Illinois at Urbana-Champaign 1980 — 1986
MSEE, Electrical Engineering
Avery Design Systems October 2014 - Present
Jasper Design Automation December 2011 - October 2014
NextOp Software February 2009 - December 2011
Montage Technology Group, Inc March 2009 - October 2009
Alchip Technologies February 2009 - October 2009
Wind River February 2008 - February 2009
Synopsys 2002 - 2007
Co-design Automation 2000 - 2002
Frequency Technology 1999 - 2000
Cadence Design Systems 1998 - 1999
Skills
Mobile Devices, Semiconductors, Embedded Systems, Selling, ASIC, Business Development, Hardware, Integration, Sales Operations, EDA, Strategy, Enterprise Software, Start-ups, Consulting, Entrepreneurship, Leadership, Product Marketing, Product Management, Sales, Wireless, IC, Professional Services
Education
University of Illinois at Urbana-Champaign 1980 — 1986
MSEE, Electrical Engineering
Vigyan Singhal Vigyan Singhal's Jasper Design Automation Experience March 2003 - October 2005
Job CEO at Oski Technology
Industry Semiconductors
Experience
Oski Technology October 2005 - Present
Elastix September 2006 - December 2008
Jasper Design Automation March 2003 - October 2005
Jasper Design Automation October 1999 - March 2003
Cadence Design Systems August 1995 - August 1999
University of California at Berkeley August 1990 - July 1995
Skills
Formal Verification, Functional Verification, Leadership, Training, Entrepreneurship, EDA, Simulations, Verilog, SoC, ASIC, Hardware, Algorithms, Semiconductors, Start-ups, IC, Embedded Systems, FPGA, Debugging, C, Microprocessors, Python, Software Development, TCL, Software Engineering, Product Management, C++, Low-power Design, Embedded Software, SystemVerilog, SystemC, VLSI, Machine Learning, Linux, Digital Signal..., Processors, Logic Synthesis, System Architecture
Education
University of California at Berkeley 1992 — 1995
PhD, Computer Science
University of California at Berkeley 1989 — 1992
MS, Computer Science
Indian Institute of Technology, Kanpur 1985 — 1989
BTech, Computer Science and Engineering
The Mother's International School, New Delhi 1975 — 1985
High School
Oski Technology October 2005 - Present
Elastix September 2006 - December 2008
Jasper Design Automation March 2003 - October 2005
Jasper Design Automation October 1999 - March 2003
Cadence Design Systems August 1995 - August 1999
University of California at Berkeley August 1990 - July 1995
Skills
Formal Verification, Functional Verification, Leadership, Training, Entrepreneurship, EDA, Simulations, Verilog, SoC, ASIC, Hardware, Algorithms, Semiconductors, Start-ups, IC, Embedded Systems, FPGA, Debugging, C, Microprocessors, Python, Software Development, TCL, Software Engineering, Product Management, C++, Low-power Design, Embedded Software, SystemVerilog, SystemC, VLSI, Machine Learning, Linux, Digital Signal..., Processors, Logic Synthesis, System Architecture
Education
University of California at Berkeley 1992 — 1995
PhD, Computer Science
University of California at Berkeley 1989 — 1992
MS, Computer Science
Indian Institute of Technology, Kanpur 1985 — 1989
BTech, Computer Science and Engineering
The Mother's International School, New Delhi 1975 — 1985
High School
Diana Feng Raggett Diana Feng Raggett's Jasper Design Automation Experience September 2009 - June 2010
Job Experienced Sales, Marketing, Business Development, Consultant Startups to large Companies in EDA, Semiconductors
Industry Computer Software
Experience
Feng Raggett International September 2009 - Present
CLK Design Automation April 2011 - March 2014
Jasper Design Automation September 2009 - June 2010
Javelin Design Automation June 2004 - July 2009
Cadence Design Systems November 2000 - March 2002
Cadence Design Systems 1994 - October 2000
Cadence Design Systems April 1992 - 1993
LSI Logic April 1988 - April 1992
Fairchild / National Semi July 1986 - March 1988
Skills
Greater China, Semiconductors, EDA, Start-ups, Strategy, ASIC, Strategic Partnerships, New Business Development, Sales Operations, SoC, Business Development, International Sales, Business Alliances, Product Launch, Product Management, Go-to-market Strategy, Channel Partners, Executive Management, Selling, Product Marketing, Sales, Management
Education
University of California, Berkeley 1981 — 1986
BS
Feng Raggett International September 2009 - Present
CLK Design Automation April 2011 - March 2014
Jasper Design Automation September 2009 - June 2010
Javelin Design Automation June 2004 - July 2009
Cadence Design Systems November 2000 - March 2002
Cadence Design Systems 1994 - October 2000
Cadence Design Systems April 1992 - 1993
LSI Logic April 1988 - April 1992
Fairchild / National Semi July 1986 - March 1988
Skills
Greater China, Semiconductors, EDA, Start-ups, Strategy, ASIC, Strategic Partnerships, New Business Development, Sales Operations, SoC, Business Development, International Sales, Business Alliances, Product Launch, Product Management, Go-to-market Strategy, Channel Partners, Executive Management, Selling, Product Marketing, Sales, Management
Education
University of California, Berkeley 1981 — 1986
BS
Joe Hupcey III Joe Hupcey III's Jasper Design Automation Experience May 2013 - June 2014
Job Global Software Product Management Executive
Industry Computer Software
Experience
Mentor Graphics July 2014 - Present
Jasper Design Automation May 2013 - June 2014
Cadence Design Systems, Inc. January 2003 - April 2013
IDEO June 2000 - November 2001
Cornell JGSM 2000 - 2000
Iron Bridge Networks December 1998 - May 1999
Morphologic, Inc. October 1996 - December 1998
Sanders - A Lockheed Martin Company January 1993 - October 1996
Collaborations In Engineering June 1991 - December 1992
Skills
Global Product..., Product Marketing, Cross-functional Team..., Product Development, Product Management, EDA, Engineering, R&D, Product Lifecycle..., Strategic Partnerships, Mobile Devices, Go-to-market Strategy, Enterprise Software, Semiconductors, Product Launch, Program Management, IC, Business Development, CRM, Debugging, SoC, Electronics, ASIC, Simulations, Processors, Verilog, FPGA, Social Media
Education
Cornell University - Johnson Graduate School of Management 1999 — 2000
MBA, Marketing & Entrepreneurship
Cornell University 1990 — 1991
MENG, Electrical Engineering
Cornell University 1986 — 1990
BSEE, Electrical Engineering
Delbarton School 1982 — 1986
Mentor Graphics July 2014 - Present
Jasper Design Automation May 2013 - June 2014
Cadence Design Systems, Inc. January 2003 - April 2013
IDEO June 2000 - November 2001
Cornell JGSM 2000 - 2000
Iron Bridge Networks December 1998 - May 1999
Morphologic, Inc. October 1996 - December 1998
Sanders - A Lockheed Martin Company January 1993 - October 1996
Collaborations In Engineering June 1991 - December 1992
Skills
Global Product..., Product Marketing, Cross-functional Team..., Product Development, Product Management, EDA, Engineering, R&D, Product Lifecycle..., Strategic Partnerships, Mobile Devices, Go-to-market Strategy, Enterprise Software, Semiconductors, Product Launch, Program Management, IC, Business Development, CRM, Debugging, SoC, Electronics, ASIC, Simulations, Processors, Verilog, FPGA, Social Media
Education
Cornell University - Johnson Graduate School of Management 1999 — 2000
MBA, Marketing & Entrepreneurship
Cornell University 1990 — 1991
MENG, Electrical Engineering
Cornell University 1986 — 1990
BSEE, Electrical Engineering
Delbarton School 1982 — 1986
Kevin Leong's Jasper Design Automation Experience 2004 - 2007
Job Product Marketing, Big Data as a Service, at Altiscale
Industry Computer Software
Experience
Altiscale 2015 - Present
Cray Inc. 2014 - 2015
VMware 2012 - 2014
MarkLogic 2011 - 2012
SAP 2009 - 2011
Google 2008 - 2008
Jasper Design Automation 2004 - 2007
Synopsys Inc 2002 - 2004
SandCraft 2001 - 2002
Education
Stanford University
BS, Electrical Engineering
Stanford University
MS, Electrical Engineering
The University of Chicago Booth School of Business
MBA, Marketing, Finance, Strategy, Entrepreneurship
Altiscale 2015 - Present
Cray Inc. 2014 - 2015
VMware 2012 - 2014
MarkLogic 2011 - 2012
SAP 2009 - 2011
Google 2008 - 2008
Jasper Design Automation 2004 - 2007
Synopsys Inc 2002 - 2004
SandCraft 2001 - 2002
Education
Stanford University
BS, Electrical Engineering
Stanford University
MS, Electrical Engineering
The University of Chicago Booth School of Business
MBA, Marketing, Finance, Strategy, Entrepreneurship
Saurav Gorai's Jasper Design Automation Experience January 2012 - June 2014
Job SoC Formal Verification Engineer at Apple
Industry Semiconductors
Experience
Apple July 2014 - Present
Cadence Design Systems June 2014 - July 2014
Jasper Design Automation January 2012 - June 2014
Jasper Design Automation May 2010 - December 2011
Mentor Graphics January 2008 - May 2010
Mentor Graphics April 2006 - December 2007
Texas Instruments March 2005 - April 2006
Synopsys June 2004 - February 2005
Skills
Functional Verification, EDA, Formal Verification, SystemVerilog, Verilog, SoC, RTL design, TCL, Algorithms, Simulations, Logic Synthesis, C++, Debugging, VLSI, Semiconductors, RTL Design, ASIC
Education
Indian Institute of Technology, Kharagpur 2000 — 2004
Bachelor of Technology (Honours), Electronics & Electrical Communication Engineering with Minor in Computer Science & Engineering
Apple July 2014 - Present
Cadence Design Systems June 2014 - July 2014
Jasper Design Automation January 2012 - June 2014
Jasper Design Automation May 2010 - December 2011
Mentor Graphics January 2008 - May 2010
Mentor Graphics April 2006 - December 2007
Texas Instruments March 2005 - April 2006
Synopsys June 2004 - February 2005
Skills
Functional Verification, EDA, Formal Verification, SystemVerilog, Verilog, SoC, RTL design, TCL, Algorithms, Simulations, Logic Synthesis, C++, Debugging, VLSI, Semiconductors, RTL Design, ASIC
Education
Indian Institute of Technology, Kharagpur 2000 — 2004
Bachelor of Technology (Honours), Electronics & Electrical Communication Engineering with Minor in Computer Science & Engineering
Anthony Hare's Jasper Design Automation Experience February 2012 - June 2014
Job System/Network Administrator at Jasper Design Automation
Industry Computer Networking
Experience
EPC IT Solutions June 2014 - Present
Jasper Design Automation February 2012 - June 2014
Brocade January 2005 - February 2012
Verisity 2004 - 2005
Verisity 2004 - 2005
Asyst Technologies 2001 - 2004
Education
San Jose State University 1992 — 1997
EPC IT Solutions June 2014 - Present
Jasper Design Automation February 2012 - June 2014
Brocade January 2005 - February 2012
Verisity 2004 - 2005
Verisity 2004 - 2005
Asyst Technologies 2001 - 2004
Education
San Jose State University 1992 — 1997
Alain Labat's Jasper Design Automation Experience January 2002 - October 2008
Job Managing Director at Harvest Management Partners
Industry Investment Banking
Experience
Aintu, Inc. October 2013 - Present
ASELTA Nanographics May 2012 - Present
FCA Fiat Chrysler Automobiles June 2011 - Present
Harvest Management Partners, LLC June 2010 - Present
French American School of Silicon Valley 1992 - Present
Marseille Networks September 2006 - 2012
VaST Systems December 2004 - May 2010
Jasper Design Automation January 2002 - October 2008
Tera Systems July 2002 - November 2004
Sequence Design January 1998 - May 2002
Skills
EDA, M&A experience, Capital Raising, Executive Management, Strategic Partnerships, Corporate Development, ASIC, Angel Investing, Early Stage Companies, Venture Financing, Enterprise Software, Go-to-market Strategy, SaaS, New Venture Development, Product Launch, Business Alliances, Business Modeling, Venture Capital, Start-up Ventures, New Ventures, Virtualization, Start-ups, Product Marketing, Semiconductors, Global Business..., IC, Private Equity, Mobile Devices, Cleantech, Strategic Alliances, Wireless, Growth Capital, IPO, Divestitures, Investment Banking
Education
Thunderbird School of Global Management 1980 — 1980
MBA, Marketing, Global Business
INSEEC 1975 — 1978
Bachelor's degree, Economics and Finance
Aintu, Inc. October 2013 - Present
ASELTA Nanographics May 2012 - Present
FCA Fiat Chrysler Automobiles June 2011 - Present
Harvest Management Partners, LLC June 2010 - Present
French American School of Silicon Valley 1992 - Present
Marseille Networks September 2006 - 2012
VaST Systems December 2004 - May 2010
Jasper Design Automation January 2002 - October 2008
Tera Systems July 2002 - November 2004
Sequence Design January 1998 - May 2002
Skills
EDA, M&A experience, Capital Raising, Executive Management, Strategic Partnerships, Corporate Development, ASIC, Angel Investing, Early Stage Companies, Venture Financing, Enterprise Software, Go-to-market Strategy, SaaS, New Venture Development, Product Launch, Business Alliances, Business Modeling, Venture Capital, Start-up Ventures, New Ventures, Virtualization, Start-ups, Product Marketing, Semiconductors, Global Business..., IC, Private Equity, Mobile Devices, Cleantech, Strategic Alliances, Wireless, Growth Capital, IPO, Divestitures, Investment Banking
Education
Thunderbird School of Global Management 1980 — 1980
MBA, Marketing, Global Business
INSEEC 1975 — 1978
Bachelor's degree, Economics and Finance
Kevin C. Casey Eichler's Jasper Design Automation Experience June 2012 - June 2014
Job President and Chief Financial Officer
Industry Semiconductors
Experience
Saint Mary's College of California May 2015 - Present
Ultra Clean Technology July 2009 - Present
Jasper Design Automation June 2012 - June 2014
Crossing Automation January 2010 - November 2012
Magma Design Automation December 2003 - February 2012
support.com 2003 - July 2010
Ultra Clean Technology March 2004 - July 2009
Credence Systems January 2008 - March 2009
Markettools March 2006 - December 2007
MIPS Technologies May 1998 - February 2006
Skills
Revenue Recognition, SEC filings, Sarbanes-Oxley Act, Mergers, Venture Capital, Start-ups, Financial Modeling, Financial Analysis, IPO, Due Diligence, Auditing, Mergers & Acquisitions, Finance, Strategy, Strategic Partnerships, Investor Relations, Strategic Planning, Financial Reporting, Executive Management, Acquisition Integration, Corporate Finance, Entrepreneurship, Competitive Analysis, Corporate Development, Valuation, US GAAP, Private Equity, Forecasting, GAAP, Internal Controls, Accounting, Managerial Finance, Strategic Financial..., Cross-functional Team..., Consolidation, Cost Accounting, Public Companies, Leadership, Divestitures, Restructuring, Sarbanes-Oxley, Internal Audit, Variance Analysis, M&A experience, Business Process..., Financial Audits, CPA, Financial Planning
Education
Saint John's University 1978 — 1982
BS, Accounting
Mount Michael Benedictine High School 1974 — 1978
Saint Mary's College of California May 2015 - Present
Ultra Clean Technology July 2009 - Present
Jasper Design Automation June 2012 - June 2014
Crossing Automation January 2010 - November 2012
Magma Design Automation December 2003 - February 2012
support.com 2003 - July 2010
Ultra Clean Technology March 2004 - July 2009
Credence Systems January 2008 - March 2009
Markettools March 2006 - December 2007
MIPS Technologies May 1998 - February 2006
Skills
Revenue Recognition, SEC filings, Sarbanes-Oxley Act, Mergers, Venture Capital, Start-ups, Financial Modeling, Financial Analysis, IPO, Due Diligence, Auditing, Mergers & Acquisitions, Finance, Strategy, Strategic Partnerships, Investor Relations, Strategic Planning, Financial Reporting, Executive Management, Acquisition Integration, Corporate Finance, Entrepreneurship, Competitive Analysis, Corporate Development, Valuation, US GAAP, Private Equity, Forecasting, GAAP, Internal Controls, Accounting, Managerial Finance, Strategic Financial..., Cross-functional Team..., Consolidation, Cost Accounting, Public Companies, Leadership, Divestitures, Restructuring, Sarbanes-Oxley, Internal Audit, Variance Analysis, M&A experience, Business Process..., Financial Audits, CPA, Financial Planning
Education
Saint John's University 1978 — 1982
BS, Accounting
Mount Michael Benedictine High School 1974 — 1978
Craig Deaton's Jasper Design Automation Experience April 2011 - Present
Job Global Account Technical Manager at Jasper Design Automation
Industry Semiconductors
Experience
Jasper Design Automation April 2011 - Present
Jasper Design Automation July 2008 - April 2011
Jasper Design Automation April 2005 - July 2008
Texas Instruments 2000 - 2005
Texas Instruments, Dallas, TX 1989 - 2005
Skills
EDA, Verilog, Functional Verification, SoC, TCL, Testing, Processors, Semiconductors, VHDL, Debugging
Education
University of Arkansas 1987 — 1993
Jasper Design Automation April 2011 - Present
Jasper Design Automation July 2008 - April 2011
Jasper Design Automation April 2005 - July 2008
Texas Instruments 2000 - 2005
Texas Instruments, Dallas, TX 1989 - 2005
Skills
EDA, Verilog, Functional Verification, SoC, TCL, Testing, Processors, Semiconductors, VHDL, Debugging
Education
University of Arkansas 1987 — 1993
Allen Tabbert's Jasper Design Automation Experience February 2011 - August 2012
Job Senior Technical Consultant
Industry Computer Hardware
Experience
Independant Consultant October 2014 - Present
(confidential) September 2014 - November 2014
Mathnasium - The Math Learning Center July 2014 - October 2014
Posedge Software, Inc May 2014 - July 2014
Posedge Software, Inc January 2013 - July 2013
Posedge Software, Inc January 2013 - July 2013
Self September 2012 - February 2013
Jasper Design Automation February 2011 - August 2012
Network Executive Software, Inc January 2009 - February 2011
Unisys 1999 - 2007
Skills
Software Engineering, Requirements Analysis, Software Development, Problem Analysis, Documentation, Linux, Unix, EDA, C, Python, MySQL, Neo4j, Cypher, OrientDB, Multithreading, TCL, Java, Simulation, Software Configuration..., Cryptography, C++, ClearCase, Verilog, Solaris, Bash, Computer Hardware, Ksh, Object Oriented Design, Perl, TCP/IP, Mercurial, GIT, Pseudorandom Number..., HW/SW co-simulation, Software Documentation, Testing
Education
Bemidji State University
Bachelor of Science (BS), Mathematics and Computer Science
University of Minnesota-Twin Cities
Calculus and Physics
Independant Consultant October 2014 - Present
(confidential) September 2014 - November 2014
Mathnasium - The Math Learning Center July 2014 - October 2014
Posedge Software, Inc May 2014 - July 2014
Posedge Software, Inc January 2013 - July 2013
Posedge Software, Inc January 2013 - July 2013
Self September 2012 - February 2013
Jasper Design Automation February 2011 - August 2012
Network Executive Software, Inc January 2009 - February 2011
Unisys 1999 - 2007
Skills
Software Engineering, Requirements Analysis, Software Development, Problem Analysis, Documentation, Linux, Unix, EDA, C, Python, MySQL, Neo4j, Cypher, OrientDB, Multithreading, TCL, Java, Simulation, Software Configuration..., Cryptography, C++, ClearCase, Verilog, Solaris, Bash, Computer Hardware, Ksh, Object Oriented Design, Perl, TCP/IP, Mercurial, GIT, Pseudorandom Number..., HW/SW co-simulation, Software Documentation, Testing
Education
Bemidji State University
Bachelor of Science (BS), Mathematics and Computer Science
University of Minnesota-Twin Cities
Calculus and Physics
Eric Hundertmark's Jasper Design Automation Experience January 2013 - June 2014
Job Project Manager and Quality Assurance Engineer at CoreFlex, Inc.
Industry Computer Hardware
Experience
CoreFlex, Inc. June 2014 - Present
Jasper Design Automation January 2013 - June 2014
Avanceon 2010 - 2011
Unisys November 2002 - November 2008
Unisys November 2001 - October 2002
Unisys July 1997 - October 2001
Unisys January 1993 - June 1997
Unisys 1987 - 1991
Skills
Project Management, FPGA Design, ASIC Design, Microprocessors, Technical Project..., Technical Documentation, PLC Programming, Electronics, PCB design, Mentoring, ASIC, FPGA, System Architecture, DFT, Software Design, IC, Hardware, Automation, Verilog, Engineering, Scrum, Hardware Architecture, Architecture, Simulations, Software Development, RTL design, Debugging, Testing, VHDL, Agile Methodologies, TCL, Embedded Systems, Functional Verification, PCIe, System Design, Manufacturing, Electrical Engineering, SystemVerilog, Computer Architecture, Systems Engineering, C, Device Drivers, Xilinx, Formal Verification, Perl, Software Engineering, Processors, EDA, Firmware, Semiconductors
Education
Penn State University
BS, Electrical Engineering
Virginia Polytechnic Institute and State University
MS, Electrical Engineering
CoreFlex, Inc. June 2014 - Present
Jasper Design Automation January 2013 - June 2014
Avanceon 2010 - 2011
Unisys November 2002 - November 2008
Unisys November 2001 - October 2002
Unisys July 1997 - October 2001
Unisys January 1993 - June 1997
Unisys 1987 - 1991
Skills
Project Management, FPGA Design, ASIC Design, Microprocessors, Technical Project..., Technical Documentation, PLC Programming, Electronics, PCB design, Mentoring, ASIC, FPGA, System Architecture, DFT, Software Design, IC, Hardware, Automation, Verilog, Engineering, Scrum, Hardware Architecture, Architecture, Simulations, Software Development, RTL design, Debugging, Testing, VHDL, Agile Methodologies, TCL, Embedded Systems, Functional Verification, PCIe, System Design, Manufacturing, Electrical Engineering, SystemVerilog, Computer Architecture, Systems Engineering, C, Device Drivers, Xilinx, Formal Verification, Perl, Software Engineering, Processors, EDA, Firmware, Semiconductors
Education
Penn State University
BS, Electrical Engineering
Virginia Polytechnic Institute and State University
MS, Electrical Engineering
Azita MOFIDIAN's Jasper Design Automation Experience September 2008 - November 2009
Job Contract Specialist: IT Procurement at SYMPHONY CONSULTING, INC.
Industry Semiconductors
Experience
SYMPHONY CONSULTING, INC June 2013 - Present
City of Mountain View Performing Art Committee 2009 - 2010
Jasper Design Automation September 2008 - November 2009
Synopsys 2000 - 2003
Synopsys 1998 - 2000
Quality Semiconductor (now IDT) 1994 - 1998
Skills
Verilog, Integrated Circuit..., EDA, SystemVerilog, VHDL, ASIC, Semiconductors, SoC, Formal Verification, Low-power Design, Functional Verification, Product Management, Testing, Unix, RTL design, Debugging, Management, Embedded Systems
Education
San Diego City College 2004 — 2006
Certificate of Achievement
University of California, Berkeley 1990 — 1994
EECS
Academy of Art University
Certificate of Completion
SYMPHONY CONSULTING, INC June 2013 - Present
City of Mountain View Performing Art Committee 2009 - 2010
Jasper Design Automation September 2008 - November 2009
Synopsys 2000 - 2003
Synopsys 1998 - 2000
Quality Semiconductor (now IDT) 1994 - 1998
Skills
Verilog, Integrated Circuit..., EDA, SystemVerilog, VHDL, ASIC, Semiconductors, SoC, Formal Verification, Low-power Design, Functional Verification, Product Management, Testing, Unix, RTL design, Debugging, Management, Embedded Systems
Education
San Diego City College 2004 — 2006
Certificate of Achievement
University of California, Berkeley 1990 — 1994
EECS
Academy of Art University
Certificate of Completion
Deepa magge sampathu's Jasper Design Automation Experience April 2013 - May 2014
Job Lead Applications Engineer at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems July 2015 - Present
Cadence Design Systems June 2014 - July 2015
Jasper Design Automation April 2013 - May 2014
Jasper Design Automation December 2011 - March 2013
Celula, Inc July 2010 - April 2011
Motorola Mobility 2011 - 2011
Skills
Formal Verification, Verilog, VHDL, SystemVerilog, ModelSim, TCL, Matlab, ASIC, FPGA, VLSI, Xilinx, Embedded Systems, Digital Signal..., RTL design, EDA, SoC
Education
San Diego State University-California State University 2008 — 2011
Master of Science (M.S.), Electrical Engineering
Visvesvaraya Technological University 2004 — 2008
BE, Instrumentation Technology
Cadence Design Systems July 2015 - Present
Cadence Design Systems June 2014 - July 2015
Jasper Design Automation April 2013 - May 2014
Jasper Design Automation December 2011 - March 2013
Celula, Inc July 2010 - April 2011
Motorola Mobility 2011 - 2011
Skills
Formal Verification, Verilog, VHDL, SystemVerilog, ModelSim, TCL, Matlab, ASIC, FPGA, VLSI, Xilinx, Embedded Systems, Digital Signal..., RTL design, EDA, SoC
Education
San Diego State University-California State University 2008 — 2011
Master of Science (M.S.), Electrical Engineering
Visvesvaraya Technological University 2004 — 2008
BE, Instrumentation Technology
Victor Markus Purri's Jasper Design Automation Experience April 2012 - June 2014
Job Formal Verification Expert
Industry Semiconductors
Experience
Cadence Design Systems June 2014 - Present
Jasper Design Automation April 2012 - June 2014
Jasper Design Automation November 2008 - April 2012
Consultoria e Projetos Elétricos Júnior April 2006 - September 2008
Skills
C, Python, Hardware, XML, Software Development, Testing, Bash, Debugging, PHP, TCL, SQL, Formal Verification, C++, Linux, Verilog
Education
Universidade Federal de Minas Gerais 2005 — 2010
BEE, Electrical Engineering
Cadence Design Systems June 2014 - Present
Jasper Design Automation April 2012 - June 2014
Jasper Design Automation November 2008 - April 2012
Consultoria e Projetos Elétricos Júnior April 2006 - September 2008
Skills
C, Python, Hardware, XML, Software Development, Testing, Bash, Debugging, PHP, TCL, SQL, Formal Verification, C++, Linux, Verilog
Education
Universidade Federal de Minas Gerais 2005 — 2010
BEE, Electrical Engineering
Antonio Caldeira's Jasper Design Automation Experience November 2010 - June 2014
Job Verification Engineer at Apple
Industry Computer Software
Experience
Apple February 2015 - Present
Cadence Design Systems June 2014 - February 2015
Jasper Design Automation November 2010 - June 2014
Jasper Design Automation April 2008 - November 2010
Universidade Federal de Minas Gerais June 2006 - July 2008
Open Systems Engineering - OSE September 2005 - May 2006
Universidade Federal de Minas Gerais - Laboratory of Computer Engineering June 2004 - August 2005
Skills
EDA, Formal Verification, Creative Problem Solving, Team Leadership, Low-power Design, Cross-cultural..., TCL, Debugging, Verilog, Perl, Bash, Algorithms, Linux, Java, Shell Scripting, Testing, SystemVerilog, C, C++, XML, VHDL, Python, Software Development, Subversion, Eclipse, Functional Verification, Architecture, Innovation, Semiconductors, Web Development, SoC, Low Power Design
Education
Universidade Federal de Minas Gerais 2007 — 2009
Master of Science (M.Sc.), Computer Science
Universidade Federal de Minas Gerais 2003 — 2006
Bachelor of Science (B.Sc.), Computer Science
Escola Tecnica de Formacao Gerencial - SEBRAE-MG 1999 — 2002
Technician, Business Administration and Management, General
Apple February 2015 - Present
Cadence Design Systems June 2014 - February 2015
Jasper Design Automation November 2010 - June 2014
Jasper Design Automation April 2008 - November 2010
Universidade Federal de Minas Gerais June 2006 - July 2008
Open Systems Engineering - OSE September 2005 - May 2006
Universidade Federal de Minas Gerais - Laboratory of Computer Engineering June 2004 - August 2005
Skills
EDA, Formal Verification, Creative Problem Solving, Team Leadership, Low-power Design, Cross-cultural..., TCL, Debugging, Verilog, Perl, Bash, Algorithms, Linux, Java, Shell Scripting, Testing, SystemVerilog, C, C++, XML, VHDL, Python, Software Development, Subversion, Eclipse, Functional Verification, Architecture, Innovation, Semiconductors, Web Development, SoC, Low Power Design
Education
Universidade Federal de Minas Gerais 2007 — 2009
Master of Science (M.Sc.), Computer Science
Universidade Federal de Minas Gerais 2003 — 2006
Bachelor of Science (B.Sc.), Computer Science
Escola Tecnica de Formacao Gerencial - SEBRAE-MG 1999 — 2002
Technician, Business Administration and Management, General
Hewlett-Packard
SAP
Symantec
Intuit
HP
salesforce.com
Bloomberg LP
Autodesk