Ansys- Apache
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Ansys- Apache Employees
Employee
Years
Job
Industry
Alan Stigliani Alan Stigliani's Ansys- Apache Experience December 2013 - Present
Job Senior Application Engineer at ANSYS Apache
Industry Computer Hardware
Experience
ANSYS Apache December 2013 - Present
International Business Machines December 2005 - September 2013
Skills
Signal Integrity, ASIC, Hardware Architecture, EDA, Debugging, PCB design, Semiconductors, Simulations, IC, Circuit Design, SoC, SPICE, FPGA, Perl, Hardware, Static Timing Analysis, VLSI, Embedded Systems, Mixed Signal
Education
University of Massachusetts, Amherst 2002 — 2004
Master of Science in Electrical Engineering, Microwave Engineering
Rensselaer Polytechnic Institute 1998 — 2002
Bachelors of Science, Electrical Engineering and Computer Systems Engineering
ANSYS Apache December 2013 - Present
International Business Machines December 2005 - September 2013
Skills
Signal Integrity, ASIC, Hardware Architecture, EDA, Debugging, PCB design, Semiconductors, Simulations, IC, Circuit Design, SoC, SPICE, FPGA, Perl, Hardware, Static Timing Analysis, VLSI, Embedded Systems, Mixed Signal
Education
University of Massachusetts, Amherst 2002 — 2004
Master of Science in Electrical Engineering, Microwave Engineering
Rensselaer Polytechnic Institute 1998 — 2002
Bachelors of Science, Electrical Engineering and Computer Systems Engineering
Aveek Sarkar Aveek Sarkar's Ansys- Apache Experience 2003 - Present
Job Semiconductor/EDA executive with worldwide sales, support and product management roles in startup to $8B public company
Industry Semiconductors
Experience
ANSYS Apache 2003 - Present
Sun Microsystems 1998 - 2003
Skills
EDA, ASIC, Semiconductors, IC, VLSI, TCL, Verilog, SystemVerilog, Circuit Design, FPGA, SoC, Engineering Management, Product Development, Start-ups, Simulations
Education
Santa Clara University - Leavey School of Business 2001 — 2003
MBA, Finance and Marketing
Oregon State University 1996 — 1998
M.S., ECE
Indian Institute of Technology, Kanpur 1992 — 1996
BS, EE
Ram Krishna Mission Narendrapur 1990 — 1992
St Partricks
ANSYS Apache 2003 - Present
Sun Microsystems 1998 - 2003
Skills
EDA, ASIC, Semiconductors, IC, VLSI, TCL, Verilog, SystemVerilog, Circuit Design, FPGA, SoC, Engineering Management, Product Development, Start-ups, Simulations
Education
Santa Clara University - Leavey School of Business 2001 — 2003
MBA, Finance and Marketing
Oregon State University 1996 — 1998
M.S., ECE
Indian Institute of Technology, Kanpur 1992 — 1996
BS, EE
Ram Krishna Mission Narendrapur 1990 — 1992
St Partricks
kanishka De kanishka De's Ansys- Apache Experience July 2015 - Present
Job Corporate Application Engineer at ANSYS Apache
Industry Semiconductors
Experience
ANSYS Apache July 2015 - Present
Oklahoma State University August 2012 - February 2015
Cognizant Technology Solutions November 2010 - August 2012
Skills
Verilog, Simulations, Microsoft Office, magic, HSPICE, Perl Script, Encounter Library..., Cadence Abstract..., RTL compiler, Conformal-LEC, NC launch, Soc Encounter, Encounter Timing System, Xilinx ISE, Matlab, ModelSim, SoC, Circuit Design, Perl
Education
Oklahoma State University 2012 — 2014
Master of Science(MSEE), Electrical and Electronics Engineering, 3.8
West Bengal University of Technology 2006 — 2010
Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering, 4
ANSYS Apache July 2015 - Present
Oklahoma State University August 2012 - February 2015
Cognizant Technology Solutions November 2010 - August 2012
Skills
Verilog, Simulations, Microsoft Office, magic, HSPICE, Perl Script, Encounter Library..., Cadence Abstract..., RTL compiler, Conformal-LEC, NC launch, Soc Encounter, Encounter Timing System, Xilinx ISE, Matlab, ModelSim, SoC, Circuit Design, Perl
Education
Oklahoma State University 2012 — 2014
Master of Science(MSEE), Electrical and Electronics Engineering, 3.8
West Bengal University of Technology 2006 — 2010
Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering, 4
Jibin John Jibin John's Ansys- Apache Experience May 2014 - Present
Job Application Engineer
Industry Semiconductors
Experience
ANSYS Apache May 2014 - Present
Fusion-io May 2013 - August 2013
Stony Brook University January 2013 - May 2013
Scientific Mes Technik Pvt. Ltd. May 2010 - June 2010
Skills
Matlab, VLSI, C, VHDL, Verilog, Python, Testing, ModelSim, Oscilloscope, Cadence Virtuoso, Simulations, Microcontrollers, Assembly Language, Languages : C, C++,..., Computer Architecture, EDA Tools : Cadence,..., OS Platforms : Windows(..., FPGA, RedHawk, Static and Dynamic IR...
Education
Dr. M.G.R Educational and Research Institute 2008 — 2012
Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering
State University of New York at Stony Brook 2012 — 2014
Master of Science (MS), Electrical and Electronics Engineering
ANSYS Apache May 2014 - Present
Fusion-io May 2013 - August 2013
Stony Brook University January 2013 - May 2013
Scientific Mes Technik Pvt. Ltd. May 2010 - June 2010
Skills
Matlab, VLSI, C, VHDL, Verilog, Python, Testing, ModelSim, Oscilloscope, Cadence Virtuoso, Simulations, Microcontrollers, Assembly Language, Languages : C, C++,..., Computer Architecture, EDA Tools : Cadence,..., OS Platforms : Windows(..., FPGA, RedHawk, Static and Dynamic IR...
Education
Dr. M.G.R Educational and Research Institute 2008 — 2012
Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering
State University of New York at Stony Brook 2012 — 2014
Master of Science (MS), Electrical and Electronics Engineering
Adish Mehta Adish Mehta's Ansys- Apache Experience May 2014 - Present
Job Applications Engineer at Apache Design Solutions
Industry Semiconductors
Experience
ANSYS Apache May 2014 - Present
Stony Brook University August 2013 - December 2013
Simtek Medico Systems Pvt. Ltd. June 2011 - August 2011
Skills
VLSI, Electrical Engineering, Matlab, Cadence Virtuoso, Mixed Signal, Cadence, C++, ModelSim, Linux, Keil, Signal Processing, Orcad, VHDL, Pspice, Verilog, Circuit Design, Testing, Atmel AVR, Microsoft Excel, Electronics, Cadence Spectre, SystemC, FPGA, Image Processing, Assembly Language, Robotics, PowerPoint, Microsoft Office, Microwind, Eagle PCB, Analog Circuit Design, VLSI CAD, SystemVerilog, Integrated Circuit..., Digital Imaging, Digital Image Processing, Digital Circuit Design, Java, Embedded C, EagleCAD, Perl, Computer Architecture, PSpice
Education
State University of New York at Stony Brook 2012 — 2013
Master's degree, Electrical and Electronics Engineering, 3.77/4.0
D.J.Sanghvi college of Engineering 2008 — 2012
Bachelor of Engineering (B.E.), Electrical and Electronics Engineering, 68.1/100
Chatrabhuj Narsee memorial school 2003 — 2006
ANSYS Apache May 2014 - Present
Stony Brook University August 2013 - December 2013
Simtek Medico Systems Pvt. Ltd. June 2011 - August 2011
Skills
VLSI, Electrical Engineering, Matlab, Cadence Virtuoso, Mixed Signal, Cadence, C++, ModelSim, Linux, Keil, Signal Processing, Orcad, VHDL, Pspice, Verilog, Circuit Design, Testing, Atmel AVR, Microsoft Excel, Electronics, Cadence Spectre, SystemC, FPGA, Image Processing, Assembly Language, Robotics, PowerPoint, Microsoft Office, Microwind, Eagle PCB, Analog Circuit Design, VLSI CAD, SystemVerilog, Integrated Circuit..., Digital Imaging, Digital Image Processing, Digital Circuit Design, Java, Embedded C, EagleCAD, Perl, Computer Architecture, PSpice
Education
State University of New York at Stony Brook 2012 — 2013
Master's degree, Electrical and Electronics Engineering, 3.77/4.0
D.J.Sanghvi college of Engineering 2008 — 2012
Bachelor of Engineering (B.E.), Electrical and Electronics Engineering, 68.1/100
Chatrabhuj Narsee memorial school 2003 — 2006
Binu Abraham Binu Abraham's Ansys- Apache Experience November 2013 - January 2015
Job Director , Product Management, Apache BU at ANSYS, Inc.
Industry Semiconductors
Experience
ANSYS, Inc. February 2015 - Present
ANSYS Apache November 2013 - January 2015
Apache Design Solutions March 2012 - November 2013
Apache Design Solutions December 2009 - March 2012
Extreme Design Automation India Pvt Ltd November 2008 - December 2009
Extreme DA January 2008 - October 2008
Extreme DA April 2007 - December 2007
Texas Instruments July 2001 - March 2007
Skills
EDA, SoC, Physical Design, ASIC, Static Timing Analysis, Timing Closure, TCL, VLSI, IC, Semiconductors, Low-power Design, Signal Integrity, Primetime, SPICE, Integrated Circuit...
Education
University of Mumbai 1997 — 2001
B.E
ANSYS, Inc. February 2015 - Present
ANSYS Apache November 2013 - January 2015
Apache Design Solutions March 2012 - November 2013
Apache Design Solutions December 2009 - March 2012
Extreme Design Automation India Pvt Ltd November 2008 - December 2009
Extreme DA January 2008 - October 2008
Extreme DA April 2007 - December 2007
Texas Instruments July 2001 - March 2007
Skills
EDA, SoC, Physical Design, ASIC, Static Timing Analysis, Timing Closure, TCL, VLSI, IC, Semiconductors, Low-power Design, Signal Integrity, Primetime, SPICE, Integrated Circuit...
Education
University of Mumbai 1997 — 2001
B.E
YUNTING HOU YUNTING HOU's Ansys- Apache Experience August 2015 - Present
Job Software Developer at ANSYS Apache
Industry Computer Software
Experience
ANSYS Apache August 2015 - Present
Marvell Semiconductor September 2013 - July 2015
China Academy of Telecommunications Research of MIIT April 2008 - December 2011
Vanlink Communication & Technology Co.,Ltd February 2006 - November 2007
Skills
C++ Language, Python, C, TCP/IP, Verigy93K, Perl, Motif, Linux, Verilog, Matlab, SSD
Education
Virginia Polytechnic Institute and State University 2012 — 2013
Master of Engineering (MEng), Electrical and Electronics Engineering
Beijing University of Posts and Telecommunications 2005 — 2008
Master of Science (MS), Computer Science
Chongqing University 2000 — 2004
Bachelor's degree, Computer Science
ANSYS Apache August 2015 - Present
Marvell Semiconductor September 2013 - July 2015
China Academy of Telecommunications Research of MIIT April 2008 - December 2011
Vanlink Communication & Technology Co.,Ltd February 2006 - November 2007
Skills
C++ Language, Python, C, TCP/IP, Verigy93K, Perl, Motif, Linux, Verilog, Matlab, SSD
Education
Virginia Polytechnic Institute and State University 2012 — 2013
Master of Engineering (MEng), Electrical and Electronics Engineering
Beijing University of Posts and Telecommunications 2005 — 2008
Master of Science (MS), Computer Science
Chongqing University 2000 — 2004
Bachelor's degree, Computer Science
Ajay Bisht Ajay Bisht's Ansys- Apache Experience March 2015 - Present
Job Manager, Software Development at ANSYS Apache
Industry Semiconductors
Experience
ANSYS Apache March 2015 - Present
ANSYS Apache February 2012 - March 2015
Apache Design Solutions September 2009 - February 2012
Sequence Design April 2008 - September 2009
Sequence Design April 2006 - March 2008
Sequence Design September 2004 - April 2006
Mentor Graphics January 2003 - September 2004
Skills
VLSI, Debugging, Low-power Design, Simulations, C++, SoC, Programming, Static Timing Analysis, Semiconductors, SystemVerilog, OOP, Functional Verification, VHDL, Algorithms, Logic Synthesis, IC, ModelSim
Education
Indian Institute of Technology, Kharagpur 2001 — 2003
Master of Technology, Computer Science & Engineering
UCSC Silicon Valley Extension 2014 — 2014
Physical Design Flow From Netlist to GDSII, VLSI Engineering
Kumaun University 1997 — 2001
Bachelor of Engineering, Computer Science & Engineering
SBM, Hari Nagar, New Delhi 1995 — 1997
AISSCE, English, Mathematics, Biology, Chemistry, Physics
Saraswati Bal Mandir, Punjabi Bagh, New Delhi 1990 — 1995
SSE
ANSYS Apache March 2015 - Present
ANSYS Apache February 2012 - March 2015
Apache Design Solutions September 2009 - February 2012
Sequence Design April 2008 - September 2009
Sequence Design April 2006 - March 2008
Sequence Design September 2004 - April 2006
Mentor Graphics January 2003 - September 2004
Skills
VLSI, Debugging, Low-power Design, Simulations, C++, SoC, Programming, Static Timing Analysis, Semiconductors, SystemVerilog, OOP, Functional Verification, VHDL, Algorithms, Logic Synthesis, IC, ModelSim
Education
Indian Institute of Technology, Kharagpur 2001 — 2003
Master of Technology, Computer Science & Engineering
UCSC Silicon Valley Extension 2014 — 2014
Physical Design Flow From Netlist to GDSII, VLSI Engineering
Kumaun University 1997 — 2001
Bachelor of Engineering, Computer Science & Engineering
SBM, Hari Nagar, New Delhi 1995 — 1997
AISSCE, English, Mathematics, Biology, Chemistry, Physics
Saraswati Bal Mandir, Punjabi Bagh, New Delhi 1990 — 1995
SSE
Priyatham Kaza Priyatham Kaza's Ansys- Apache Experience September 2015 - Present
Job Sr Applications Engineer at ANSYS Apache
Industry Semiconductors
Experience
ANSYS Apache September 2015 - Present
Cactus Semiconductor February 2011 - September 2015
Cactus Semiconductor November 2007 - February 2011
Skills
Mixed Signal, RTL design, Analog Circuit Design, Low-power Design, Verilog, Circuit Design, Cadence Virtuoso, IC, CMOS, VLSI, Analog, DFT, NI LabVIEW, VHDL, ASIC, Integrated Circuit..., SoC, UVM, Static Timing Analysis, Physical Design, Timing Closure, Debugging, Simulations
Education
Arizona State University 2005 — 2007
Masters in Electrical Engineering, Mixed Signal Circuit Design
Jawaharlal Nehru Technological University 2001 — 2005
Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering
ANSYS Apache September 2015 - Present
Cactus Semiconductor February 2011 - September 2015
Cactus Semiconductor November 2007 - February 2011
Skills
Mixed Signal, RTL design, Analog Circuit Design, Low-power Design, Verilog, Circuit Design, Cadence Virtuoso, IC, CMOS, VLSI, Analog, DFT, NI LabVIEW, VHDL, ASIC, Integrated Circuit..., SoC, UVM, Static Timing Analysis, Physical Design, Timing Closure, Debugging, Simulations
Education
Arizona State University 2005 — 2007
Masters in Electrical Engineering, Mixed Signal Circuit Design
Jawaharlal Nehru Technological University 2001 — 2005
Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering
Chunta Chu's Ansys- Apache Experience August 2010 - July 2011
Job Manager, Software Development at ANSYS, Inc.
Industry Computer Software
Experience
ANSYS, Inc. April 2015 - Present
ANSYS, Inc. August 2011 - March 2015
ANSYS Apache August 2010 - July 2011
ANSYS Apache June 2008 - July 2010
ANSYS Apache August 2007 - May 2008
Rio Design Automation 2007 - 2007
Skills
VLSI, Algorithms, Linux, EDA, Signal Integrity, C++, Simulations, Software Development, SoC, IC, ASIC, TCL, Semiconductors, Project Planning, Power Analysis, Perl, Debugging, C, Parallel Computing, Algorithm Design, Machine Learning, Python, Numerical Linear Algebra, matlab, octave, High Performance..., Matlab
Education
University of California, Los Angeles 2005 — 2007
Master of Science (MS), Electrical Engineering, Computer-aided-design under Embedded computing system
National Tsing Hua University 1999 — 2003
Bachelor of Science (BS), Electrical Engineering
Taipei Municipal Chien Kuo High School 1996 — 1999
High School
ANSYS, Inc. April 2015 - Present
ANSYS, Inc. August 2011 - March 2015
ANSYS Apache August 2010 - July 2011
ANSYS Apache June 2008 - July 2010
ANSYS Apache August 2007 - May 2008
Rio Design Automation 2007 - 2007
Skills
VLSI, Algorithms, Linux, EDA, Signal Integrity, C++, Simulations, Software Development, SoC, IC, ASIC, TCL, Semiconductors, Project Planning, Power Analysis, Perl, Debugging, C, Parallel Computing, Algorithm Design, Machine Learning, Python, Numerical Linear Algebra, matlab, octave, High Performance..., Matlab
Education
University of California, Los Angeles 2005 — 2007
Master of Science (MS), Electrical Engineering, Computer-aided-design under Embedded computing system
National Tsing Hua University 1999 — 2003
Bachelor of Science (BS), Electrical Engineering
Taipei Municipal Chien Kuo High School 1996 — 1999
High School
Lang Lin's Ansys- Apache Experience June 2014 - Present
Job Sr. Application Engineer
Industry Computer Software
Experience
ANSYS Apache June 2014 - Present
BlueRISC April 2014 - May 2014
Intel Corporation July 2011 - March 2014
University of Massachusetts September 2006 - February 2012
Intel Corporation April 2010 - January 2011
Skills
Digital Circuit Design, Static Timing Analysis, Physical Design, post-silicon validation, Low-power Design, Security Engineering, Power Distribution, Cryptography, Perl Script, Unix Shell Scripting, Microarchitecture, Signal integrity, RTL design, Power Analysis, Signal Integrity, Silicon Validation, Circuit Design, Microprocessors, Verilog
Education
University of Massachusetts, Amherst 2008 — 2012
PhD, Electrical and Computer Engineering
University of Massachusetts, Amherst 2006 — 2008
M.S. 2006--2008, Electrical & Computer Engineering
Peking University 2004 — 2006
M.S, Eletronic Engineering
Nankai University 2000 — 2004
B.S, Electrical Engineering
Yaohua High School
ANSYS Apache June 2014 - Present
BlueRISC April 2014 - May 2014
Intel Corporation July 2011 - March 2014
University of Massachusetts September 2006 - February 2012
Intel Corporation April 2010 - January 2011
Skills
Digital Circuit Design, Static Timing Analysis, Physical Design, post-silicon validation, Low-power Design, Security Engineering, Power Distribution, Cryptography, Perl Script, Unix Shell Scripting, Microarchitecture, Signal integrity, RTL design, Power Analysis, Signal Integrity, Silicon Validation, Circuit Design, Microprocessors, Verilog
Education
University of Massachusetts, Amherst 2008 — 2012
PhD, Electrical and Computer Engineering
University of Massachusetts, Amherst 2006 — 2008
M.S. 2006--2008, Electrical & Computer Engineering
Peking University 2004 — 2006
M.S, Eletronic Engineering
Nankai University 2000 — 2004
B.S, Electrical Engineering
Yaohua High School
Muhammad Zakir's Ansys- Apache Experience February 2014 - Present
Job Lead Application Engineer at Ansys
Industry Semiconductors
Experience
ANSYS Apache February 2014 - Present
Apache Design Solutions November 2011 - February 2014
L-3 Communications June 2009 - November 2011
Texas Instruments August 2002 - February 2009
Applied Pulsed Power, Inc. January 2002 - August 2002
Purdue University June 1999 - August 1999
Education
Cornell University 2001 — 2002
MEng
Cornell University 1997 — 2001
BS
ANSYS Apache February 2014 - Present
Apache Design Solutions November 2011 - February 2014
L-3 Communications June 2009 - November 2011
Texas Instruments August 2002 - February 2009
Applied Pulsed Power, Inc. January 2002 - August 2002
Purdue University June 1999 - August 1999
Education
Cornell University 2001 — 2002
MEng
Cornell University 1997 — 2001
BS
arpita chatterjee's Ansys- Apache Experience 2014 - 2015
Job Design Engineer at Intel Corporation
Industry
Experience
Intel Corporation June 2011 - Present
ANSYS Apache 2014 - 2015
ANSYS Apache 2014 - 2015
ANSYS Apache 2014 - 2015
Education
University of Cincinnati
Intel Corporation June 2011 - Present
ANSYS Apache 2014 - 2015
ANSYS Apache 2014 - 2015
ANSYS Apache 2014 - 2015
Education
University of Cincinnati
Nithin Valentine's Ansys- Apache Experience May 2012 - July 2014
Job Tech Intern Master's at Broadcom
Industry Electrical/Electronic Manufacturing
Experience
Broadcom May 2015 - August 2015
Ansys- Apache May 2012 - July 2014
Skills
Multisim, Semiconductors, SoC, Electronics, Simulations, SRAM, RTL design, C++, ASIC, Analog, VHDL, C, VLSI, Perl, TCL, EDA, Circuit Design, Linux, RTL Design
Education
University of Southern California 2014 — 2016
Master of Science (MS), Electrical and Electronics Engineering, GPA: 3.93 (Scale- 4)
Govt. Model Engineering College 2008 — 2012
Bachelor of Technology (B.Tech.), Electronics and Communication
Rajagiri Higher Secondary School 2000 — 2008
Broadcom May 2015 - August 2015
Ansys- Apache May 2012 - July 2014
Skills
Multisim, Semiconductors, SoC, Electronics, Simulations, SRAM, RTL design, C++, ASIC, Analog, VHDL, C, VLSI, Perl, TCL, EDA, Circuit Design, Linux, RTL Design
Education
University of Southern California 2014 — 2016
Master of Science (MS), Electrical and Electronics Engineering, GPA: 3.93 (Scale- 4)
Govt. Model Engineering College 2008 — 2012
Bachelor of Technology (B.Tech.), Electronics and Communication
Rajagiri Higher Secondary School 2000 — 2008
Deqi Zhu's Ansys- Apache Experience September 2015 - Present
Job Lead Software Developer
Industry Semiconductors
Experience
ANSYS Apache September 2015 - Present
ANSYS Apache July 2006 - August 2015
Skills
C/C++ STL, Circuit Analysis, Software Development, Simulations, EDA
Education
Sichuan University 2009 — 2012
Master of Science (MS), Computer Software Engineering
University of Electronic Science and Technology 2002 — 2006
Bachelor of Science (BS), Electrical and Electronics Engineering
ANSYS Apache September 2015 - Present
ANSYS Apache July 2006 - August 2015
Skills
C/C++ STL, Circuit Analysis, Software Development, Simulations, EDA
Education
Sichuan University 2009 — 2012
Master of Science (MS), Computer Software Engineering
University of Electronic Science and Technology 2002 — 2006
Bachelor of Science (BS), Electrical and Electronics Engineering