Cadence Design Systems
Industry: Software company
DescriptionCadence Design Systems, Inc. is an American multinational electronic design automation software and engineering services company, founded in 1988 by the merger of SDA Systems and ECAD, Inc. CEO: Lip-Bu Tan (Jan 2009–) Headquarters: San Jose, California, United States Revenue: 1.816 billion USD (2016) Subsidiaries: Sigrity, Tensilica, Chip Estimate Corp, nusemi inc,
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Cadence Design Systems Employees
Employee
Years
Job
Industry
Kristen Belanger Kristen Belanger's Cadence Design Systems Experience October 2001 - December 2007
Job
Industry Computer Software
Experience
Blackbaud July 2010 - Present
Dassault Systemes December 2007 - August 2010
Cadence Design Systems October 2001 - December 2007
Engage, Inc. (a CMGI company) February 2000 - October 2001
Honeywell January 1998 - February 2000
Primary Bank March 1996 - September 1997
Skills
Demand Generation, Product Launch, Corporate Branding, Marketing Strategy, Integrated Marketing..., Enterprise Messaging, Channel Strategy, Multi-channel Marketing, Strategy, Lead Generation, Marketing Communications, Integrated Marketing, Corporate Communications, Direct Marketing, Product Marketing, CRM, Go-to-market Strategy, B2B, Online Advertising, Marketing, Enterprise Software, Cross-functional Team..., Trade Shows
Education
Keene State College 1989 — 1994
BA
Blackbaud July 2010 - Present
Dassault Systemes December 2007 - August 2010
Cadence Design Systems October 2001 - December 2007
Engage, Inc. (a CMGI company) February 2000 - October 2001
Honeywell January 1998 - February 2000
Primary Bank March 1996 - September 1997
Skills
Demand Generation, Product Launch, Corporate Branding, Marketing Strategy, Integrated Marketing..., Enterprise Messaging, Channel Strategy, Multi-channel Marketing, Strategy, Lead Generation, Marketing Communications, Integrated Marketing, Corporate Communications, Direct Marketing, Product Marketing, CRM, Go-to-market Strategy, B2B, Online Advertising, Marketing, Enterprise Software, Cross-functional Team..., Trade Shows
Education
Keene State College 1989 — 1994
BA
Balaji Krishnamachary Balaji Krishnamachary's Cadence Design Systems Experience September 1997 - September 1999
Job Director at NXP Semiconductors
Industry Semiconductors
Experience
NXP Semiconductors November 2014 - Present
Broadcom March 2012 - September 2014
Broadcom March 2008 - February 2012
Broadcom March 2005 - February 2008
Broadcom October 2000 - February 2005
Silicon Spice (Acquired by Broadcom) September 1999 - September 2000
Cadence Design Systems September 1997 - September 1999
VLSI/Compass July 1990 - September 1997
Skills
SoC, ASIC, IC, Timing Closure, Low-power Design, Physical Design, Semiconductors, VLSI, EDA, TCL, Verilog, Functional Verification, DFT, Integrated Circuit..., Organization Skills, Team Leadership, Debugging
Education
Louisiana State University and Agricultural and Mechanical College 1988 — 1990
Master's degree, Electrical and Computer Engineering
Maulana Azad National Institute of Technology 1983 — 1988
Bachelors, Electronics
NXP Semiconductors November 2014 - Present
Broadcom March 2012 - September 2014
Broadcom March 2008 - February 2012
Broadcom March 2005 - February 2008
Broadcom October 2000 - February 2005
Silicon Spice (Acquired by Broadcom) September 1999 - September 2000
Cadence Design Systems September 1997 - September 1999
VLSI/Compass July 1990 - September 1997
Skills
SoC, ASIC, IC, Timing Closure, Low-power Design, Physical Design, Semiconductors, VLSI, EDA, TCL, Verilog, Functional Verification, DFT, Integrated Circuit..., Organization Skills, Team Leadership, Debugging
Education
Louisiana State University and Agricultural and Mechanical College 1988 — 1990
Master's degree, Electrical and Computer Engineering
Maulana Azad National Institute of Technology 1983 — 1988
Bachelors, Electronics
Avinash Lingamneni's Cadence Design Systems Experience May 2014 - Present
Job Lead Design Engineer at Cadence Design Systems
Industry Computer Hardware
Experience
Cadence Design Systems May 2014 - Present
Rice University August 2008 - April 2014
CSEM January 2011 - December 2012
CSEM January 2010 - July 2010
Nanyang Technological University May 2009 - August 2009
Skills
VLSI, Algorithms, Digital Signal..., Matlab, Simulations, Verilog, ModelSim, Circuit Design, C, ASIC, Computer Architecture, Signal Processing, Embedded Systems, SoC, PCB design, VHDL, Low-power Design, FPGA prototyping, Cadence tools, Synopsys tools, EDA, Internet of Things, Processors, Wireless Communications..., Neural Networks, Python, C++, Perl, Linux, LaTeX, CMOS, FPGA, Machine Learning, R&D, Electronics, Programming, Optimization, Data Structures, Debugging, Semiconductors, IC, Digital Electronics, Image Processing, Wireless, Integrated Circuit..., Hardware Architecture, Shell Scripting, RTL Design, TCL
Education
Rice University 2008 — 2014
Doctor of Philosophy (Ph.D.), Electrical and Computer Engineering
Rice University 2008 — 2011
Master of Science, Electrical & Computer Engineering
International Institute of Information Technology 2004 — 2008
Bachelor of Technology (Hons.), Electronics and Communication Engineering with Honors in VLSI & Embedded Systems
Cadence Design Systems May 2014 - Present
Rice University August 2008 - April 2014
CSEM January 2011 - December 2012
CSEM January 2010 - July 2010
Nanyang Technological University May 2009 - August 2009
Skills
VLSI, Algorithms, Digital Signal..., Matlab, Simulations, Verilog, ModelSim, Circuit Design, C, ASIC, Computer Architecture, Signal Processing, Embedded Systems, SoC, PCB design, VHDL, Low-power Design, FPGA prototyping, Cadence tools, Synopsys tools, EDA, Internet of Things, Processors, Wireless Communications..., Neural Networks, Python, C++, Perl, Linux, LaTeX, CMOS, FPGA, Machine Learning, R&D, Electronics, Programming, Optimization, Data Structures, Debugging, Semiconductors, IC, Digital Electronics, Image Processing, Wireless, Integrated Circuit..., Hardware Architecture, Shell Scripting, RTL Design, TCL
Education
Rice University 2008 — 2014
Doctor of Philosophy (Ph.D.), Electrical and Computer Engineering
Rice University 2008 — 2011
Master of Science, Electrical & Computer Engineering
International Institute of Information Technology 2004 — 2008
Bachelor of Technology (Hons.), Electronics and Communication Engineering with Honors in VLSI & Embedded Systems
Sandra Foreman Sandra Foreman's Cadence Design Systems Experience November 1993 - June 1995
Job Sr Proposal Manager and Project Manager
Industry Writing and Editing
Experience
Philips 2012 - Present
Honeywell Smart Grid Solutions 2010 - Present
Strategic Proposals November 2009 - Present
Sonus Networks June 2008 - March 2009
Sonus Networks March 2005 - June 2008
Amicore 2004 - 2005
Synamics 2001 - 2002
Priority Call Management 1997 - 2001
MCI, Inc. June 1995 - May 1997
Cadence Design Systems November 1993 - June 1995
Skills
Proposal Writing, RFP, Technical Writing, Microsoft Office, Cross-functional Team..., Production, Proposal Management, Process Improvement, Documentation, Writing, SharePoint, Editing, Word, Telecommunications, PowerPoint, Requirements Analysis, Excel, Pre-sales, White Papers
Education
University of San Francisco
Loyola University of Chicago
Henry Ford II
Philips 2012 - Present
Honeywell Smart Grid Solutions 2010 - Present
Strategic Proposals November 2009 - Present
Sonus Networks June 2008 - March 2009
Sonus Networks March 2005 - June 2008
Amicore 2004 - 2005
Synamics 2001 - 2002
Priority Call Management 1997 - 2001
MCI, Inc. June 1995 - May 1997
Cadence Design Systems November 1993 - June 1995
Skills
Proposal Writing, RFP, Technical Writing, Microsoft Office, Cross-functional Team..., Production, Proposal Management, Process Improvement, Documentation, Writing, SharePoint, Editing, Word, Telecommunications, PowerPoint, Requirements Analysis, Excel, Pre-sales, White Papers
Education
University of San Francisco
Loyola University of Chicago
Henry Ford II
Jay Feudo Jay Feudo's Cadence Design Systems Experience 2007 - 2012
Job Situation Manager | Americas at Avid Technology
Industry Computer Software
Experience
Avid Technology April 2015 - Present
James Feudo Consulting 2012 - March 2015
Net Atlantic, Inc. April 2013 - November 2013
Cadence Design Systems 2007 - 2012
Cadence Design Systems 2003 - 2007
Cadence Design Systems 2000 - 2003
Cadence Design Systems 1998 - 2000
Cadence Design Systems 1992 - 1998
Skills
Leadership, Management, Cross-functional Team..., Customer Satisfaction, Program Management, Process Improvement, Project Management, Global Teams, Team Building, Coaching, Change Management, Professional Services, SaaS, Testing, Quality Assurance, Product Lifecycle..., Start-ups, Sales, ASIC, SoC, Consulting
Education
University of Massachusetts Lowell
C and C++ Programming
University of Massachusetts Lowell
Business Administration
Middlesex Community College
Technical Certificate, Electro-Mechanical Engineering
Kennedy Western University
Quality Control Engineering
Lowell Institute School at MIT
Technical Certificate, Printed Circuit Board Design I & II
Cadence Design Systems
VHDL Programming
Avid Technology April 2015 - Present
James Feudo Consulting 2012 - March 2015
Net Atlantic, Inc. April 2013 - November 2013
Cadence Design Systems 2007 - 2012
Cadence Design Systems 2003 - 2007
Cadence Design Systems 2000 - 2003
Cadence Design Systems 1998 - 2000
Cadence Design Systems 1992 - 1998
Skills
Leadership, Management, Cross-functional Team..., Customer Satisfaction, Program Management, Process Improvement, Project Management, Global Teams, Team Building, Coaching, Change Management, Professional Services, SaaS, Testing, Quality Assurance, Product Lifecycle..., Start-ups, Sales, ASIC, SoC, Consulting
Education
University of Massachusetts Lowell
C and C++ Programming
University of Massachusetts Lowell
Business Administration
Middlesex Community College
Technical Certificate, Electro-Mechanical Engineering
Kennedy Western University
Quality Control Engineering
Lowell Institute School at MIT
Technical Certificate, Printed Circuit Board Design I & II
Cadence Design Systems
VHDL Programming
Surbhi Mittal's Cadence Design Systems Experience May 2014 - Present
Job Product Engineer at Cadence Design Systems
Industry Electrical/Electronic Manufacturing
Experience
Cadence Design Systems May 2014 - Present
Apache Design Solutions January 2010 - May 2014
EMC lab, MS&T August 2007 - December 2009
Tata Consultancy Services August 2006 - January 2007
Franklin & Templeton Invstments 2006 - 2007
Skills
Pspice, Simulations
Education
University of Missouri-Rolla 2007 — 2009
M.S, Electrical Engineering
Manipal Institute of Technology 2002 — 2006
B.E, Electrical & Electronics
Cadence Design Systems May 2014 - Present
Apache Design Solutions January 2010 - May 2014
EMC lab, MS&T August 2007 - December 2009
Tata Consultancy Services August 2006 - January 2007
Franklin & Templeton Invstments 2006 - 2007
Skills
Pspice, Simulations
Education
University of Missouri-Rolla 2007 — 2009
M.S, Electrical Engineering
Manipal Institute of Technology 2002 — 2006
B.E, Electrical & Electronics
Gudla Srinivas Gudla Srinivas's Cadence Design Systems Experience May 2015 - Present
Job Principal Software Engineer at Cadence
Industry Information Technology and Services
Experience
Cadence Design Systems May 2015 - Present
Xilinx August 2014 - May 2015
Xilinx October 2011 - August 2014
Tata Consultancy Services June 2010 - October 2011
Ericsson 2010 - 2011
Tata Consultancy Services August 2005 - May 2010
Skills
Rational Software..., Model Driven Development, Eclipse, ClearCase, Java, UML, CVS, XML, Ant, Object Oriented Design, Sun Certified Java..., Linux, JUnit, RCP, SWT, JFace, EMF, Eclipse CDT, Debuggers, Core Java, Multithreading, Java Enterprise Edition, Maven, Shell Scripting, Agile Methodologies, C, Unix
Education
Jawaharlal Nehru Technological University 2001 — 2005
Bachelor of Technology, Computer Science
Little Flower Junior College 1999 — 2001
JNMHS 1995 — 1999
Cadence Design Systems May 2015 - Present
Xilinx August 2014 - May 2015
Xilinx October 2011 - August 2014
Tata Consultancy Services June 2010 - October 2011
Ericsson 2010 - 2011
Tata Consultancy Services August 2005 - May 2010
Skills
Rational Software..., Model Driven Development, Eclipse, ClearCase, Java, UML, CVS, XML, Ant, Object Oriented Design, Sun Certified Java..., Linux, JUnit, RCP, SWT, JFace, EMF, Eclipse CDT, Debuggers, Core Java, Multithreading, Java Enterprise Edition, Maven, Shell Scripting, Agile Methodologies, C, Unix
Education
Jawaharlal Nehru Technological University 2001 — 2005
Bachelor of Technology, Computer Science
Little Flower Junior College 1999 — 2001
JNMHS 1995 — 1999
Jean Witinski Jean Witinski's Cadence Design Systems Experience 1995 - 2002
Job Senior Programmer/Analyst at Lehigh Carbon Community College
Industry Computer Software
Experience
Lehigh Carbon Community College April 2013 - Present
Northampton Community College November 2012 - April 2013
Northampton Community College November 2011 - November 2012
Adaptik Corporation April 2011 - August 2011
Muhlenberg College July 2008 - August 2011
Adaptik Corporation May 2006 - June 2008
Penteledata June 2005 - June 2006
Cadence Design Systems 1995 - 2002
Skills
Java, SQL, JavaScript, Databases, Microsoft SQL Server, XML, Spring, Data Integration, .NET, Oracle, Perl, MySQL, Access, JSP, Integration Testing, Servlets, CSS, Visual Studio
Education
Kutztown University of Pennsylvania 2003 — 2004
MS, Computer Information Systems
Penn State University 1983 — 1985
BS, Electrical Engineering
Penn State University 1982 — 1985
MBA, Business Administration
Lehigh Carbon Community College April 2013 - Present
Northampton Community College November 2012 - April 2013
Northampton Community College November 2011 - November 2012
Adaptik Corporation April 2011 - August 2011
Muhlenberg College July 2008 - August 2011
Adaptik Corporation May 2006 - June 2008
Penteledata June 2005 - June 2006
Cadence Design Systems 1995 - 2002
Skills
Java, SQL, JavaScript, Databases, Microsoft SQL Server, XML, Spring, Data Integration, .NET, Oracle, Perl, MySQL, Access, JSP, Integration Testing, Servlets, CSS, Visual Studio
Education
Kutztown University of Pennsylvania 2003 — 2004
MS, Computer Information Systems
Penn State University 1983 — 1985
BS, Electrical Engineering
Penn State University 1982 — 1985
MBA, Business Administration
Pratyush Kothamasu's Cadence Design Systems Experience July 2015 - Present
Job Sr Applications Engineering Manager at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems July 2015 - Present
Cadence Design Systems July 2014 - July 2015
Cadence Design Systems July 2013 - June 2014
Cadence Design Systems July 2011 - June 2013
Cadence Design Systems August 2010 - July 2011
Cadence Design Systems April 2008 - July 2010
Cadence Design Systems November 2006 - March 2008
Cadence Design Systems June 2006 - November 2006
Skills
RTL Compiler, Physical Synthesis, Low-power Design, TCL, Functional Verification, EDA, Static Timing Analysis, VLSI, Formal Verification, Logic Synthesis, Verilog, Timing Closure, DFT, RTL coding, Perl, ASIC, Physical Design, SoC, ARM, RTL design, IC, SystemVerilog, RTL Design
Education
Dhirubhai Ambani Institute of Information and Communication Technology 2002 — 2006
BTech, ICT
Kendriya Vidyalaya 1989 — 2000
Schooling
Cadence Design Systems July 2015 - Present
Cadence Design Systems July 2014 - July 2015
Cadence Design Systems July 2013 - June 2014
Cadence Design Systems July 2011 - June 2013
Cadence Design Systems August 2010 - July 2011
Cadence Design Systems April 2008 - July 2010
Cadence Design Systems November 2006 - March 2008
Cadence Design Systems June 2006 - November 2006
Skills
RTL Compiler, Physical Synthesis, Low-power Design, TCL, Functional Verification, EDA, Static Timing Analysis, VLSI, Formal Verification, Logic Synthesis, Verilog, Timing Closure, DFT, RTL coding, Perl, ASIC, Physical Design, SoC, ARM, RTL design, IC, SystemVerilog, RTL Design
Education
Dhirubhai Ambani Institute of Information and Communication Technology 2002 — 2006
BTech, ICT
Kendriya Vidyalaya 1989 — 2000
Schooling
Anil Raj Gopalakrishnan Anil Raj Gopalakrishnan's Cadence Design Systems Experience March 2010 - January 2014
Job Sr. Design Verification Engineer at Microsoft
Industry Semiconductors
Experience
Microsoft August 2015 - Present
Amazon Lab126 January 2014 - August 2015
Cadence Design Systems March 2010 - January 2014
Magnum Semiconductor October 2007 - March 2010
LSI Logic December 2005 - July 2007
Wipro Technologies February 2000 - October 2005
Skills
SystemVerilog, ASIC, Perl, Simulation, Scripting, SoC, TCL, Simulations, VLSI, Verilog, EDA, Open Verification..., Functional Verification, UVM, Cadence, Debugging, Integrated Circuit..., FPGA
Education
University of Kerala 1995 — 1999
Bachelor of Technology
University of Kerala 1995 — 1999
Bachelor of Technology
Kendriya Vidyalaya 1982 — 1994
10th and 12th
Microsoft August 2015 - Present
Amazon Lab126 January 2014 - August 2015
Cadence Design Systems March 2010 - January 2014
Magnum Semiconductor October 2007 - March 2010
LSI Logic December 2005 - July 2007
Wipro Technologies February 2000 - October 2005
Skills
SystemVerilog, ASIC, Perl, Simulation, Scripting, SoC, TCL, Simulations, VLSI, Verilog, EDA, Open Verification..., Functional Verification, UVM, Cadence, Debugging, Integrated Circuit..., FPGA
Education
University of Kerala 1995 — 1999
Bachelor of Technology
University of Kerala 1995 — 1999
Bachelor of Technology
Kendriya Vidyalaya 1982 — 1994
10th and 12th
YongJin Lee YongJin Lee's Cadence Design Systems Experience July 2003 - April 2005
Job CEO at JIANplus Inc.
Industry Semiconductors
Experience
JIANplus Inc. September 2012 - Present
Integrated Device Technology Inc June 2009 - September 2012
Leadis Technology May 2005 - June 2009
Cadence Design Systems July 2003 - April 2005
Silicon7 March 2000 - May 2002
Samsung Semiconductor January 1995 - March 2000
Skills
C, Visual Basic, C++, Python, C#, HTML, Csh, VBScript, VSE, Analog Design, EDA, Programming, IC, Perl, Simulation, Semiconductors, Analog, Unix, Linux, Software Development, Automation, Testing, Silicon, Scripting, Windows, VLSI, Mixed Signal, Algorithms, Shell Scripting, Debugging, Touch Screens, Physical Verification
Education
Kyung Hee University 1990 — 1995
B.S., Electronics
JIANplus Inc. September 2012 - Present
Integrated Device Technology Inc June 2009 - September 2012
Leadis Technology May 2005 - June 2009
Cadence Design Systems July 2003 - April 2005
Silicon7 March 2000 - May 2002
Samsung Semiconductor January 1995 - March 2000
Skills
C, Visual Basic, C++, Python, C#, HTML, Csh, VBScript, VSE, Analog Design, EDA, Programming, IC, Perl, Simulation, Semiconductors, Analog, Unix, Linux, Software Development, Automation, Testing, Silicon, Scripting, Windows, VLSI, Mixed Signal, Algorithms, Shell Scripting, Debugging, Touch Screens, Physical Verification
Education
Kyung Hee University 1990 — 1995
B.S., Electronics
Victor J. Temple Victor J. Temple's Cadence Design Systems Experience January 2000 - January 2002
Job Experienced CFO and Business Executive bringing stockholder value to small and large public and private companies
Industry Consumer Electronics
Experience
The Black Gold Group November 2014 - Present
SourcExperience January 2004 - Present
Get Sassie!, Inc. July 2010 - January 2013
Bottomline Technologies August 2006 - May 2009
Feeco Hong Kong February 2003 - July 2006
Cadence Design Systems January 2000 - January 2002
VXI Corporation January 1998 - January 2000
VXI Corporation January 1993 - January 1998
VXI Corporation January 1989 - January 1993
UNEX a division of Dynatech January 1986 - January 1989
Skills
Start-ups, Acquisition Integration, Manufacturing, Finance, Leadership, Management, Product Marketing, Analysis, Risk Management, Product Development, Executive Management, Mergers & Acquisitions, Business Development, Strategy, Business Planning, Entrepreneurship, Forecasting
Education
Oyster River High Durham NH
Oyster River High Durham NH
University of New Hampshire
MBA, Executive MBA Program
University of New Hampshire
BS, Business & Zoology
Landmark Education 2009 — 2013
Graduate, Curriculum for Living
The Black Gold Group November 2014 - Present
SourcExperience January 2004 - Present
Get Sassie!, Inc. July 2010 - January 2013
Bottomline Technologies August 2006 - May 2009
Feeco Hong Kong February 2003 - July 2006
Cadence Design Systems January 2000 - January 2002
VXI Corporation January 1998 - January 2000
VXI Corporation January 1993 - January 1998
VXI Corporation January 1989 - January 1993
UNEX a division of Dynatech January 1986 - January 1989
Skills
Start-ups, Acquisition Integration, Manufacturing, Finance, Leadership, Management, Product Marketing, Analysis, Risk Management, Product Development, Executive Management, Mergers & Acquisitions, Business Development, Strategy, Business Planning, Entrepreneurship, Forecasting
Education
Oyster River High Durham NH
Oyster River High Durham NH
University of New Hampshire
MBA, Executive MBA Program
University of New Hampshire
BS, Business & Zoology
Landmark Education 2009 — 2013
Graduate, Curriculum for Living
Jiwoo Pak's Cadence Design Systems Experience September 2013 - Present
Job Lead Software Engineer at Cadence Design Systems
Industry Computer Hardware
Experience
Cadence Design Systems September 2013 - Present
University of Texas at Austin September 2009 - May 2014
Cadence Design Systems May 2013 - August 2013
University of Texas at Austin January 2011 - May 2013
Oracle May 2011 - August 2011
University of Texas at Austin January 2010 - December 2010
Skills
EDA, Physical Design, VLSI, Signal Integrity, Simulations, CAD, Computer Engineering, Algorithms, Electromigration-Aware..., VLSI Design, Physical Design..., 3D IC Design, Microelectronics, IC, C++, Verilog, Computer Architecture, Low-power Design
Education
The University of Texas at Austin 2009 — 2014
Ph.D, Electrical & Computer Engineering
Korea Advanced Institute of Science and Technology 2007 — 2009
M.S., Electrical Engineering
Korea Advanced Institute of Science and Technology 2002 — 2007
B.S., Electrical Engineering
Cadence Design Systems September 2013 - Present
University of Texas at Austin September 2009 - May 2014
Cadence Design Systems May 2013 - August 2013
University of Texas at Austin January 2011 - May 2013
Oracle May 2011 - August 2011
University of Texas at Austin January 2010 - December 2010
Skills
EDA, Physical Design, VLSI, Signal Integrity, Simulations, CAD, Computer Engineering, Algorithms, Electromigration-Aware..., VLSI Design, Physical Design..., 3D IC Design, Microelectronics, IC, C++, Verilog, Computer Architecture, Low-power Design
Education
The University of Texas at Austin 2009 — 2014
Ph.D, Electrical & Computer Engineering
Korea Advanced Institute of Science and Technology 2007 — 2009
M.S., Electrical Engineering
Korea Advanced Institute of Science and Technology 2002 — 2007
B.S., Electrical Engineering
Matthew Bredel Matthew Bredel's Cadence Design Systems Experience September 1997 - June 1998
Job Principal Hardware Engineer Lead at Cubic
Industry Electrical/Electronic Manufacturing
Experience
Cubic January 2011 - Present
NetWebVideo LLC March 2007 - March 2012
Northrop Grumman January 2010 - September 2010
Northrop Grumman September 2002 - March 2007
Redfern Broadband Networks (RBN Inc) April 2001 - April 2002
AMI Semiconductor October 2000 - March 2001
TRW Inc. September 1998 - September 2000
Cadence Design Systems September 1997 - June 1998
Skills
Electrical Engineering, RF Engineering, Systems Engineering, Analog Circuits, Technical Documentation, AWR Microwave Office, Agilent ADS, hfss, Microsoft Office, PHP4/5, MySQL, JavaScript, HTML, Android Development, Team Management, Internet Entrepreneur, Project Planning, NI LabVIEW, Scripting, Amplifiers, Power Amplifiers, Transceivers, Receivers, Communication Skills, Simulations, RF, Analog, Analog Circuit Design, PCB design, RF design, Antennas, SEO, PPC Bid Management, Web Development, Information Products, Conversion Optimization, WordPress, Merchant Accounts, Email Marketing, Lead Generation, Dreamweaver, Affiliate Marketing
Education
University of California, San Diego 1998 — 2000
Masters, RF & Wireless Circuits
University of California, San Diego 1993 — 1998
Bachelor's, Electrical Engineering
University of California, San Diego 1993 — 1998
Bachelors, Psychology
Landmark Education
Cubic January 2011 - Present
NetWebVideo LLC March 2007 - March 2012
Northrop Grumman January 2010 - September 2010
Northrop Grumman September 2002 - March 2007
Redfern Broadband Networks (RBN Inc) April 2001 - April 2002
AMI Semiconductor October 2000 - March 2001
TRW Inc. September 1998 - September 2000
Cadence Design Systems September 1997 - June 1998
Skills
Electrical Engineering, RF Engineering, Systems Engineering, Analog Circuits, Technical Documentation, AWR Microwave Office, Agilent ADS, hfss, Microsoft Office, PHP4/5, MySQL, JavaScript, HTML, Android Development, Team Management, Internet Entrepreneur, Project Planning, NI LabVIEW, Scripting, Amplifiers, Power Amplifiers, Transceivers, Receivers, Communication Skills, Simulations, RF, Analog, Analog Circuit Design, PCB design, RF design, Antennas, SEO, PPC Bid Management, Web Development, Information Products, Conversion Optimization, WordPress, Merchant Accounts, Email Marketing, Lead Generation, Dreamweaver, Affiliate Marketing
Education
University of California, San Diego 1998 — 2000
Masters, RF & Wireless Circuits
University of California, San Diego 1993 — 1998
Bachelor's, Electrical Engineering
University of California, San Diego 1993 — 1998
Bachelors, Psychology
Landmark Education
Janet Lafleur's Cadence Design Systems Experience 1991 - 1998
Job Market Strategy and Communications
Industry Computer Software
Experience
Atempo May 2008 - January 2012
Cassatt Corp September 2003 - March 2008
3ware September 1998 - November 2001
Cadence Design Systems 1991 - 1998
Lockheed Missiles and Space Palo Alto Research Laboratory June 1986 - June 1990
Skills
Product Marketing, Start-ups, Product Launch, Competitive Analysis, Cloud Computing, Online Marketing, Social Media, Marketing Strategy, Social Media Marketing, Enterprise Software, Marketing Communications, Market Research, Storage, Online Advertising
Education
Louisiana State University 1982 — 1986
B.S., Computer Science, minor in English
Atempo May 2008 - January 2012
Cassatt Corp September 2003 - March 2008
3ware September 1998 - November 2001
Cadence Design Systems 1991 - 1998
Lockheed Missiles and Space Palo Alto Research Laboratory June 1986 - June 1990
Skills
Product Marketing, Start-ups, Product Launch, Competitive Analysis, Cloud Computing, Online Marketing, Social Media, Marketing Strategy, Social Media Marketing, Enterprise Software, Marketing Communications, Market Research, Storage, Online Advertising
Education
Louisiana State University 1982 — 1986
B.S., Computer Science, minor in English
Raghavendran Gundurao's Cadence Design Systems Experience May 2008 - June 2008
Job SAP LE Consultant at Pfizer
Industry Information Technology and Services
Experience
Pfizer June 2015 - Present
Jack Link's Beef Jerky June 2013 - June 2015
Merck June 2008 - June 2013
Cognizant Technology Solutions January 2007 - June 2013
Cadence Design Systems May 2008 - June 2008
Deutsche Post March 2007 - August 2007
Hewlett-Packard February 2005 - January 2007
TITAN INDUSTRIES LIMITED October 1995 - January 2005
Skills
SAP R/3, Project Implementation, ERP, SAP Netweaver, SAP ERP, Requirements Analysis, SAP Implementation, SAP, Software Project..., Materials Management, Supply Chain Management, Business Process, SDLC, SD, PMP, Business Intelligence, Data Migration, IT Strategy, SAP SD
Education
Madurai Kamaraj University 1997 — 2001
MBA, Systems
Pfizer June 2015 - Present
Jack Link's Beef Jerky June 2013 - June 2015
Merck June 2008 - June 2013
Cognizant Technology Solutions January 2007 - June 2013
Cadence Design Systems May 2008 - June 2008
Deutsche Post March 2007 - August 2007
Hewlett-Packard February 2005 - January 2007
TITAN INDUSTRIES LIMITED October 1995 - January 2005
Skills
SAP R/3, Project Implementation, ERP, SAP Netweaver, SAP ERP, Requirements Analysis, SAP Implementation, SAP, Software Project..., Materials Management, Supply Chain Management, Business Process, SDLC, SD, PMP, Business Intelligence, Data Migration, IT Strategy, SAP SD
Education
Madurai Kamaraj University 1997 — 2001
MBA, Systems
Jesse Wang Jesse Wang's Cadence Design Systems Experience December 2011 - Present
Job Lead Software Engineer at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems December 2011 - Present
Algotochip August 2011 - December 2011
SpringSoft, Inc. (Synopsys) June 2008 - July 2011
SpringSoft March 2004 - June 2008
Skills
C, C++, Pthreads, C/C++ STL, Qt, MPI, Linux, Debugging, STL, Software Development, Perl, Algorithms, EDA, Valgrind, Motif, CVS, TCL, Java, Simulations, Multithreading, Data Structures, Software Engineering
Education
Lawrence Technological University 2001 — 2003
Master's Degree, Computer Science
Soochow University 1994 — 1998
Bachelor's Degree
Cadence Design Systems December 2011 - Present
Algotochip August 2011 - December 2011
SpringSoft, Inc. (Synopsys) June 2008 - July 2011
SpringSoft March 2004 - June 2008
Skills
C, C++, Pthreads, C/C++ STL, Qt, MPI, Linux, Debugging, STL, Software Development, Perl, Algorithms, EDA, Valgrind, Motif, CVS, TCL, Java, Simulations, Multithreading, Data Structures, Software Engineering
Education
Lawrence Technological University 2001 — 2003
Master's Degree, Computer Science
Soochow University 1994 — 1998
Bachelor's Degree
Juergen Flamm Juergen Flamm's Cadence Design Systems Experience April 2006 - November 2008
Job Director Hardware Engineering at Northrop Grumman Corporation
Industry Aviation & Aerospace
Experience
Northrop Grumman Corporation August 2010 - Present
Northrop Grumman Electronic Systems February 2010 - August 2010
Northrop Grumman Electronic Systems April 2009 - August 2010
Cadence Design Systems April 2006 - November 2008
Cadence Design Systems January 2001 - March 2006
Litton Guidance & Control Systems January 1996 - December 2000
Litton Guidance & Control Systems January 1993 - December 1995
Skills
Linux, Windows, Management, Packaging, Modeling, PCB design, Simulations, Circuit Design, EDA, Systems Engineering, Testing, Engineering Management, RF, Electronics, Hardware Architecture, Embedded Systems, System Design, FPGA, Semiconductors, Cross-functional Team..., ASIC, VHDL, Engineering, Signal Integrity, Cadence, Electrical Engineering, Manufacturing, Software Engineering, Sensors, Design for Manufacturing, Mixed Signal, Orcad, IC, Wireless, Analog Circuit Design, Digital Signal..., Xilinx, System Architecture, Debugging, Verilog, Embedded Software, Schematic Capture, Firmware, R&D, SoC, Hardware, Microprocessors, Software Development, Failure Analysis, PCB Design
Education
Universität Karlsruhe (TH) 1969 — 1978
MS (Dipl.Ing.)
Northrop Grumman Corporation August 2010 - Present
Northrop Grumman Electronic Systems February 2010 - August 2010
Northrop Grumman Electronic Systems April 2009 - August 2010
Cadence Design Systems April 2006 - November 2008
Cadence Design Systems January 2001 - March 2006
Litton Guidance & Control Systems January 1996 - December 2000
Litton Guidance & Control Systems January 1993 - December 1995
Skills
Linux, Windows, Management, Packaging, Modeling, PCB design, Simulations, Circuit Design, EDA, Systems Engineering, Testing, Engineering Management, RF, Electronics, Hardware Architecture, Embedded Systems, System Design, FPGA, Semiconductors, Cross-functional Team..., ASIC, VHDL, Engineering, Signal Integrity, Cadence, Electrical Engineering, Manufacturing, Software Engineering, Sensors, Design for Manufacturing, Mixed Signal, Orcad, IC, Wireless, Analog Circuit Design, Digital Signal..., Xilinx, System Architecture, Debugging, Verilog, Embedded Software, Schematic Capture, Firmware, R&D, SoC, Hardware, Microprocessors, Software Development, Failure Analysis, PCB Design
Education
Universität Karlsruhe (TH) 1969 — 1978
MS (Dipl.Ing.)
Abhijit Jas Abhijit Jas's Cadence Design Systems Experience 1996 - 1997
Job SoC Design Verification at Apple
Industry Semiconductors
Experience
Apple September 2011 - Present
Intel Corporation 2008 - October 2011
Intel Corporation 2005 - 2008
Intel Corporation 2000 - 2005
University of Texas at Austin 1997 - 2000
Intel Corporation 1999 - 1999
Motorola 1998 - 1998
Cadence Design Systems 1996 - 1997
Skills
SoC, Computer Architecture, DFT, Verilog, Microprocessors, ASIC, RTL design, VLSI, EDA, SystemVerilog, C++, Processors, IC, Debugging, Digital Signal..., Semiconductors, Logic Design, Formal Verification, Low-power Design, Testing, Physical Design, CMOS, Logic Synthesis
Education
The University of Texas at Austin 1997 — 2001
M.S. & Ph.D., Computer Engineering
Jadavpur University 1992 — 1996
Bachelor of Engineering, Computer Science and Engineering
Apple September 2011 - Present
Intel Corporation 2008 - October 2011
Intel Corporation 2005 - 2008
Intel Corporation 2000 - 2005
University of Texas at Austin 1997 - 2000
Intel Corporation 1999 - 1999
Motorola 1998 - 1998
Cadence Design Systems 1996 - 1997
Skills
SoC, Computer Architecture, DFT, Verilog, Microprocessors, ASIC, RTL design, VLSI, EDA, SystemVerilog, C++, Processors, IC, Debugging, Digital Signal..., Semiconductors, Logic Design, Formal Verification, Low-power Design, Testing, Physical Design, CMOS, Logic Synthesis
Education
The University of Texas at Austin 1997 — 2001
M.S. & Ph.D., Computer Engineering
Jadavpur University 1992 — 1996
Bachelor of Engineering, Computer Science and Engineering
Girish Joshi Girish Joshi's Cadence Design Systems Experience January 2010 - August 2014
Job Director of Sales, NA West at Kilopass Technology, Inc.
Industry Semiconductors
Experience
Kilopass Technology, Inc. May 2015 - Present
Cadence Design Systems January 2010 - August 2014
Cadence Design Systems March 2004 - January 2010
Nassda Corp. (Acquired by Synopsys) April 2001 - March 2004
Virage Logic (Acquired by Synopsys) December 2000 - May 2001
Synopsys Inc January 1996 - December 2000
Ross Technology May 1993 - December 1995
Skills
Major Account..., Foundation IP, Power Management, EDA, Semiconductors, ASIC, IC, Mixed Signal, SoC, Enterprise Software, Management, Analog, Product Management, Product Marketing, FPGA, Sales, Embedded Systems, Semiconductor Industry, Microprocessors, Cross-functional Team..., Go-to-market Strategy, Strategic Partnerships, Hardware, Business Alliances, Integrated Circuit..., Pre-sales, Cloud Computing, Engineering Management, Electrical Engineering, Processors, Analog Circuit Design, Simulations, Wireless, Verilog, PCB design, Debugging, Complex Sales, Embedded Software, Circuit Design, Sensors, Solution Selling, Product Lifecycle..., System Architecture, SaaS
Education
University of Toledo 1991 — 1993
MS, Electrical Engineering
Maharashtra Institute of Technology 1985 — 1990
BE, Electronics Engg
Abasaheb Garware College 1983 — 1985
Junior College
Loyola High School 1973 — 1983
University of Poona
Kilopass Technology, Inc. May 2015 - Present
Cadence Design Systems January 2010 - August 2014
Cadence Design Systems March 2004 - January 2010
Nassda Corp. (Acquired by Synopsys) April 2001 - March 2004
Virage Logic (Acquired by Synopsys) December 2000 - May 2001
Synopsys Inc January 1996 - December 2000
Ross Technology May 1993 - December 1995
Skills
Major Account..., Foundation IP, Power Management, EDA, Semiconductors, ASIC, IC, Mixed Signal, SoC, Enterprise Software, Management, Analog, Product Management, Product Marketing, FPGA, Sales, Embedded Systems, Semiconductor Industry, Microprocessors, Cross-functional Team..., Go-to-market Strategy, Strategic Partnerships, Hardware, Business Alliances, Integrated Circuit..., Pre-sales, Cloud Computing, Engineering Management, Electrical Engineering, Processors, Analog Circuit Design, Simulations, Wireless, Verilog, PCB design, Debugging, Complex Sales, Embedded Software, Circuit Design, Sensors, Solution Selling, Product Lifecycle..., System Architecture, SaaS
Education
University of Toledo 1991 — 1993
MS, Electrical Engineering
Maharashtra Institute of Technology 1985 — 1990
BE, Electronics Engg
Abasaheb Garware College 1983 — 1985
Junior College
Loyola High School 1973 — 1983
University of Poona
Lisa Barbay's Cadence Design Systems Experience June 2011 - Present
Job Principal AE, Verification Methodologies at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems June 2011 - Present
barbayconsult.com January 2005 - Present
Microchip Technology September 2010 - April 2011
Microchip Technology March 2010 - August 2010
Novafora Inc March 2008 - October 2008
MediaTek (formerly NuCORE Technology) 2006 - 2007
Creative Technology Ltd 2001 - 2004
Creative Labs 2001 - 2004
Sierra Imaging April 1995 - June 2001
Seagate Technology June 1990 - January 1997
Skills
SoC, Firmware, ARM, ASIC, FPGA, Microprocessors, DSP, USB, Debugging, Silicon, Development Tools, Scripting, Writing, Embedded Systems, RTOS, Processors, Microcontrollers, Embedded Software, C, C++, Public Speaking, Research, VHDL, RTL design, Verilog, Teaching, JTAG, Embedded C, Logic Analyzer, Editing, Bios, Proofreading, Real Time, Digital Signal..., Semiconductors, Python, Xilinx, Hardware, Emulation, Testing, Software Design
Education
Louisiana State University 1981 — 1986
BS, Computer Science
Louisiana State University 1981 — 1986
BS, Computer Science
Cadence Design Systems June 2011 - Present
barbayconsult.com January 2005 - Present
Microchip Technology September 2010 - April 2011
Microchip Technology March 2010 - August 2010
Novafora Inc March 2008 - October 2008
MediaTek (formerly NuCORE Technology) 2006 - 2007
Creative Technology Ltd 2001 - 2004
Creative Labs 2001 - 2004
Sierra Imaging April 1995 - June 2001
Seagate Technology June 1990 - January 1997
Skills
SoC, Firmware, ARM, ASIC, FPGA, Microprocessors, DSP, USB, Debugging, Silicon, Development Tools, Scripting, Writing, Embedded Systems, RTOS, Processors, Microcontrollers, Embedded Software, C, C++, Public Speaking, Research, VHDL, RTL design, Verilog, Teaching, JTAG, Embedded C, Logic Analyzer, Editing, Bios, Proofreading, Real Time, Digital Signal..., Semiconductors, Python, Xilinx, Hardware, Emulation, Testing, Software Design
Education
Louisiana State University 1981 — 1986
BS, Computer Science
Louisiana State University 1981 — 1986
BS, Computer Science
Zhiyu (Albert) Zeng Zhiyu (Albert) Zeng's Cadence Design Systems Experience July 2015 - Present
Job Member of Consulting Staff at Cadence
Industry Computer Software
Experience
Cadence Design Systems July 2015 - Present
Cadence Design Systems August 2012 - June 2015
Samsung Austin R&D Center December 2011 - August 2012
Texas A&M University August 2007 - December 2011
Samsung Austin R&D Center May 2011 - August 2011
Iowa State University August 2006 - July 2007
Skills
EDA, On Chip Voltage..., Power Grid Simulation, Power Grid Optimization, Circuit Simulation, Parallel Programming, SRAM, Redhawk, Totem, C++, Perl, Matlab, Algorithms, C, Cadence Virtuoso, LaTeX, Linux, Numerical Analysis, Optimization, Optimizations, Simulations, TCL, VLSI, Voltage
Education
Texas A&M University 2007 — 2011
Ph.D., Computer Engineering
Iowa State University 2006 — 2007
Electrical Engineering
Zhejiang University 2002 — 2006
B.S., Electronic & Information System
Cadence Design Systems July 2015 - Present
Cadence Design Systems August 2012 - June 2015
Samsung Austin R&D Center December 2011 - August 2012
Texas A&M University August 2007 - December 2011
Samsung Austin R&D Center May 2011 - August 2011
Iowa State University August 2006 - July 2007
Skills
EDA, On Chip Voltage..., Power Grid Simulation, Power Grid Optimization, Circuit Simulation, Parallel Programming, SRAM, Redhawk, Totem, C++, Perl, Matlab, Algorithms, C, Cadence Virtuoso, LaTeX, Linux, Numerical Analysis, Optimization, Optimizations, Simulations, TCL, VLSI, Voltage
Education
Texas A&M University 2007 — 2011
Ph.D., Computer Engineering
Iowa State University 2006 — 2007
Electrical Engineering
Zhejiang University 2002 — 2006
B.S., Electronic & Information System
Narayan Ghosh Narayan Ghosh's Cadence Design Systems Experience June 2015 - Present
Job Sr. Principal Product Engineer Customer Engagement at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems June 2015 - Present
Cadence Design Systems June 2013 - June 2015
SmartPlay Technologies January 2012 - May 2013
Magma Design Automation January 2010 - January 2012
Magma Design Automation January 2008 - December 2009
Intel india Pvt Ltd September 2006 - January 2008
Intel Corporation 2004 - 2006
Skills
Static Timing Analysis, Signal Integrity, Physical Design, EDA, Timing Closure, TCL, Timing, Parasitic Extraction, Physical Verification
Education
Jadavpur University 2000 — 2004
Bachelor's degree, Electronics and Communication Engineering
Jadavpur University 2000 — 2004
B E, Electronics
R K Mission Residential College Narendrapur
Cadence Design Systems June 2015 - Present
Cadence Design Systems June 2013 - June 2015
SmartPlay Technologies January 2012 - May 2013
Magma Design Automation January 2010 - January 2012
Magma Design Automation January 2008 - December 2009
Intel india Pvt Ltd September 2006 - January 2008
Intel Corporation 2004 - 2006
Skills
Static Timing Analysis, Signal Integrity, Physical Design, EDA, Timing Closure, TCL, Timing, Parasitic Extraction, Physical Verification
Education
Jadavpur University 2000 — 2004
Bachelor's degree, Electronics and Communication Engineering
Jadavpur University 2000 — 2004
B E, Electronics
R K Mission Residential College Narendrapur
Carl Schwink Carl Schwink's Cadence Design Systems Experience November 2003 - June 2009
Job Principal Design Verification Engineer at InVisage Technologies, Inc.
Industry Computer Hardware
Experience
InVisage Technologies, Inc. January 2015 - Present
Consulting October 2013 - November 2014
Allegro MicroSystems, Inc. August 2011 - October 2013
Westinghouse Electric Company February 2011 - August 2011
Epic September 2009 - November 2010
Cadence Design Systems November 2003 - June 2009
Cisco 2002 - 2002
Cylink 1995 - 2002
Sun Microsystems, Inc. 1994 - 1998
Amdahl UTS Division 1992 - 1994
Skills
ASIC, RTL design, FPGA, EDA, SystemVerilog, Functional Verification, Debugging, IC, Simulations, RTL coding, Formal Verification, Logic Synthesis, Low-power Design, Logic Design, Cadence, Semiconductors, Timing, System Architecture, Scripting, Synopsys tools, Open Verification..., Engineering, Verilog, Team Leadership, Hardware Architecture, SoC, TCL, Embedded Systems, Testing, Electrical Engineering, Timing Closure, DFT, Processors, MIPS, High Performance...
Education
University of Wisconsin-Madison 1985 — 1987
MSEE, Electical Engineering, Computer Science
Iowa State University 1978 — 1982
BS CprE, Computer Engineering, Computer Science, Electrical Engineering
InVisage Technologies, Inc. January 2015 - Present
Consulting October 2013 - November 2014
Allegro MicroSystems, Inc. August 2011 - October 2013
Westinghouse Electric Company February 2011 - August 2011
Epic September 2009 - November 2010
Cadence Design Systems November 2003 - June 2009
Cisco 2002 - 2002
Cylink 1995 - 2002
Sun Microsystems, Inc. 1994 - 1998
Amdahl UTS Division 1992 - 1994
Skills
ASIC, RTL design, FPGA, EDA, SystemVerilog, Functional Verification, Debugging, IC, Simulations, RTL coding, Formal Verification, Logic Synthesis, Low-power Design, Logic Design, Cadence, Semiconductors, Timing, System Architecture, Scripting, Synopsys tools, Open Verification..., Engineering, Verilog, Team Leadership, Hardware Architecture, SoC, TCL, Embedded Systems, Testing, Electrical Engineering, Timing Closure, DFT, Processors, MIPS, High Performance...
Education
University of Wisconsin-Madison 1985 — 1987
MSEE, Electical Engineering, Computer Science
Iowa State University 1978 — 1982
BS CprE, Computer Engineering, Computer Science, Electrical Engineering
Paramjeet Singh Pahwa Paramjeet Singh Pahwa's Cadence Design Systems Experience June 2000 - December 2000
Job Senior DFT Consultant at Samsung Austin R&D Centre (SARC)
Industry Semiconductors
Experience
Samsung Austin R&D Centre (SARC) March 2015 - Present
QuickLogic August 2013 - March 2015
ST-Ericsson February 2012 - July 2013
Lantiq (Infineon Wireline Division) November 2010 - February 2012
ST Microelectronics December 2000 - November 2010
Cadence Design Systems June 2000 - December 2000
Skills
BIST, Static Timing Analysis, Embedded Systems, SoC, VLSI, Test Engineering, USB, DFT, Mixed Signal, Microelectronics, Timing, Simulations, ATPG, Debugging, JTAG, ARM, Compilers, EDA, Testing, Logic Synthesis, Silicon, Timing Closure, Place & Route, Verilog, ASIC
Education
San Jose State University 2013 — 2015
Master’s Degree, Analog/Mixed-Signal Designs
Kurukshetra University 1998 — 2000
Masters, Microelectronics
CVM Pilani
San Jose State University
Samsung Austin R&D Centre (SARC) March 2015 - Present
QuickLogic August 2013 - March 2015
ST-Ericsson February 2012 - July 2013
Lantiq (Infineon Wireline Division) November 2010 - February 2012
ST Microelectronics December 2000 - November 2010
Cadence Design Systems June 2000 - December 2000
Skills
BIST, Static Timing Analysis, Embedded Systems, SoC, VLSI, Test Engineering, USB, DFT, Mixed Signal, Microelectronics, Timing, Simulations, ATPG, Debugging, JTAG, ARM, Compilers, EDA, Testing, Logic Synthesis, Silicon, Timing Closure, Place & Route, Verilog, ASIC
Education
San Jose State University 2013 — 2015
Master’s Degree, Analog/Mixed-Signal Designs
Kurukshetra University 1998 — 2000
Masters, Microelectronics
CVM Pilani
San Jose State University
Prashant Pahade's Cadence Design Systems Experience October 2001 - February 2006
Job Founder and CEO at Agumbe Technologies
Industry Internet
Experience
Agumbe Technologies July 2014 - Present
Apache Design Solutions Pvt Ltd, Subsidiary of Ansys, Inc. February 2006 - July 2014
Cadence Design Systems October 2001 - February 2006
Gizmo123, Inc February 2000 - October 2001
Cadence Design Systems October 1998 - January 2000
Ambit Design Systems September 1997 - September 1998
VLSI Technology/Compass Design Automation April 1991 - September 1997
Skills
EDA, Semiconductors, ASIC, IC, SoC, Go-to-market Strategy, Product Marketing, Product Lifecycle..., Product Management, Enterprise Software, Start-ups, Business Development, Entrepreneurship, Strategic Partnerships, Sales, Program Management, Cross-functional Team..., Semiconductor Industry, Engineering Management, Solution Selling, Leadership
Education
New Jersey Institute of Technology 1988 — 1990
MSEE
Manipal Institute of Technology 1982 — 1986
BE
Agumbe Technologies July 2014 - Present
Apache Design Solutions Pvt Ltd, Subsidiary of Ansys, Inc. February 2006 - July 2014
Cadence Design Systems October 2001 - February 2006
Gizmo123, Inc February 2000 - October 2001
Cadence Design Systems October 1998 - January 2000
Ambit Design Systems September 1997 - September 1998
VLSI Technology/Compass Design Automation April 1991 - September 1997
Skills
EDA, Semiconductors, ASIC, IC, SoC, Go-to-market Strategy, Product Marketing, Product Lifecycle..., Product Management, Enterprise Software, Start-ups, Business Development, Entrepreneurship, Strategic Partnerships, Sales, Program Management, Cross-functional Team..., Semiconductor Industry, Engineering Management, Solution Selling, Leadership
Education
New Jersey Institute of Technology 1988 — 1990
MSEE
Manipal Institute of Technology 1982 — 1986
BE
Donald Henderson Donald Henderson's Cadence Design Systems Experience 1994 - 2011
Job Documentation Specialist
Industry Logistics and Supply Chain
Experience
Leadman Electronics 2013 - 2014
Cadence Design Systems 1994 - 2011
Skills
Enterprise Software, Cross-functional Team..., Program Management, Process Improvement, Cloud Computing, Vendor Management
Education
Burapaha University, Bangkok, Thailand 2011 — 2013
International Business
Iowa State University - College of Business 1988 — 1992
B.S., Business Administration
Iowa State University 1979 — 1984
B.A., Liesure Studies
Leadman Electronics 2013 - 2014
Cadence Design Systems 1994 - 2011
Skills
Enterprise Software, Cross-functional Team..., Program Management, Process Improvement, Cloud Computing, Vendor Management
Education
Burapaha University, Bangkok, Thailand 2011 — 2013
International Business
Iowa State University - College of Business 1988 — 1992
B.S., Business Administration
Iowa State University 1979 — 1984
B.A., Liesure Studies
Ian Dodd Ian Dodd's Cadence Design Systems Experience 2000 - 2001
Job
Industry Computer Software
Experience
consulting to Agilent Technologies May 2007 - February 2008
Mentor Graphics Inc June 2002 - April 2007
Cadence Design Systems 2000 - 2001
Veribest Inc 1992 - 2000
Skills
EDA, Verilog, Signal Integrity, Market Research, PCB design, Software Development, C++
Education
Loughborough University
BSc (with honours)
The University of Stirling
MSc
consulting to Agilent Technologies May 2007 - February 2008
Mentor Graphics Inc June 2002 - April 2007
Cadence Design Systems 2000 - 2001
Veribest Inc 1992 - 2000
Skills
EDA, Verilog, Signal Integrity, Market Research, PCB design, Software Development, C++
Education
Loughborough University
BSc (with honours)
The University of Stirling
MSc
Greg Milano Greg Milano's Cadence Design Systems Experience April 1986 - July 2000
Job Senior Staff Applications Consultant at Synopsys Inc
Industry Computer Software
Experience
Synopsys Inc August 2015 - Present
Atrenta Inc 2007 - August 2015
Sales Engineer Alliance July 2010 - July 2013
Sales Eningeer Advisory Board 2010 - 2012
IBM October 2005 - November 2007
Tera Systems July 2000 - August 2005
cadence 1990 - 2005
Cadence Design Systems April 1986 - July 2000
Skills
Business Strategy, Problem Solving, Business Valuation, Decision Analysis, Return on Investment, Strategic Planning, Solution Selling, Customer Relations, Program Management, Team Building, Solution Architecture, Technical Analysis, Project Management, Sales Presentations, Sales Presentation..., Sales Process, RTL design, Building Relationships, Major Account..., Team Leadership, TCL, EDA, Semiconductors, ASIC, Verilog, VHDL, Technical Sales..., FPGA, Linux, Unix, Product Marketing, SoC, IC, SystemVerilog, IP, Hardware, Integration, Product Development, Windows, Mixed Signal, Electronics, Product Management, Simulations, Debugging, Integrated Circuit..., Sales Engineering, New Business Development, Business Development, Microprocessors, Management
Education
Manhattan College 1982 — 1983
Masters Of Engineering, Electrical Engineering
Manhattan College 1978 — 1983
Masters, Electrical Engineering
Synopsys Inc August 2015 - Present
Atrenta Inc 2007 - August 2015
Sales Engineer Alliance July 2010 - July 2013
Sales Eningeer Advisory Board 2010 - 2012
IBM October 2005 - November 2007
Tera Systems July 2000 - August 2005
cadence 1990 - 2005
Cadence Design Systems April 1986 - July 2000
Skills
Business Strategy, Problem Solving, Business Valuation, Decision Analysis, Return on Investment, Strategic Planning, Solution Selling, Customer Relations, Program Management, Team Building, Solution Architecture, Technical Analysis, Project Management, Sales Presentations, Sales Presentation..., Sales Process, RTL design, Building Relationships, Major Account..., Team Leadership, TCL, EDA, Semiconductors, ASIC, Verilog, VHDL, Technical Sales..., FPGA, Linux, Unix, Product Marketing, SoC, IC, SystemVerilog, IP, Hardware, Integration, Product Development, Windows, Mixed Signal, Electronics, Product Management, Simulations, Debugging, Integrated Circuit..., Sales Engineering, New Business Development, Business Development, Microprocessors, Management
Education
Manhattan College 1982 — 1983
Masters Of Engineering, Electrical Engineering
Manhattan College 1978 — 1983
Masters, Electrical Engineering
Katharine Moomjian Katharine Moomjian's Cadence Design Systems Experience March 2007 - November 2008
Job Component Design Engineer at Intel Corporation
Industry Computer Hardware
Experience
Intel Corporation September 2013 - Present
Raytheon February 2009 - Present
Cadence Design Systems March 2007 - November 2008
LSI Logic August 2000 - July 2006
NetScout Systems October 1998 - July 2000
FORE Systems April 1997 - May 1998
Skills
Verilog, ASIC
Education
Lehigh University 1981 — 1985
BSEE
Intel Corporation September 2013 - Present
Raytheon February 2009 - Present
Cadence Design Systems March 2007 - November 2008
LSI Logic August 2000 - July 2006
NetScout Systems October 1998 - July 2000
FORE Systems April 1997 - May 1998
Skills
Verilog, ASIC
Education
Lehigh University 1981 — 1985
BSEE
Ravindha (Ravi) Bandaranayake's Cadence Design Systems Experience June 2005 - June 2006
Job Major Incident & Problem Manager at Vodafone Global Enterprise
Industry Information Technology and Services
Experience
Vodafone June 2015 - Present
IBM January 2011 - June 2015
Avalon Solution January 2009 - January 2011
Avalon Solution June 2007 - December 2008
Cadence Design Systems June 2005 - June 2006
Srilanka Telecom Limited 2003 - 2003
Skills
Team Leadership, Management, Service Delivery, Disaster Recovery, IT Operations, Incident Management, SDLC, ITIL Certified, Business Analysis, Technical Subject Matter, Technical Support, Project Management, IT Service Management, E-commerce, Change Management, Infrastructure, Customer Support, Software Documentation, Cloud Computing, Data Center, SWIFT
Education
Keller Graduate School of Management of DeVry University 2007 — 2009
MSc
Kingston University 2003 — 2005
BSc
Vodafone June 2015 - Present
IBM January 2011 - June 2015
Avalon Solution January 2009 - January 2011
Avalon Solution June 2007 - December 2008
Cadence Design Systems June 2005 - June 2006
Srilanka Telecom Limited 2003 - 2003
Skills
Team Leadership, Management, Service Delivery, Disaster Recovery, IT Operations, Incident Management, SDLC, ITIL Certified, Business Analysis, Technical Subject Matter, Technical Support, Project Management, IT Service Management, E-commerce, Change Management, Infrastructure, Customer Support, Software Documentation, Cloud Computing, Data Center, SWIFT
Education
Keller Graduate School of Management of DeVry University 2007 — 2009
MSc
Kingston University 2003 — 2005
BSc
Frank Caballero Frank Caballero's Cadence Design Systems Experience May 1999 - February 2002
Job Low Power Methodology Consultant at Oracle Labs
Industry Semiconductors
Experience
Oracle Labs August 2015 - Present
Atrenta July 2011 - July 2015
Apache Design Solutions, Inc. September 2009 - July 2011
Sequence Design, Inc. (acquired by Apache Sept 2009) July 2006 - September 2009
Aztec Diseno e Ingenieria, S.A. de C.V. October 2004 - March 2006
Magma Design Automation October 2003 - October 2004
Synopsys Inc February 2002 - October 2003
Cadence Design Systems May 1999 - February 2002
Ambit Design Systems (Acquired by Cadence Design 1999) October 1997 - May 1999
Cadence Design Systems May 1995 - October 1997
Skills
Debugging, EDA, Product Management, Semiconductors, TCL, Power Analysis, Strategic Account, Formal Verification, Sales, Strategic Partnerships, Start-ups, FPGA, Static Timing Analysis, Verilog
Education
LeTourneau University 1987 — 1992
Electrical Engineering, Electrical and Electronics Engineering
Oracle Labs August 2015 - Present
Atrenta July 2011 - July 2015
Apache Design Solutions, Inc. September 2009 - July 2011
Sequence Design, Inc. (acquired by Apache Sept 2009) July 2006 - September 2009
Aztec Diseno e Ingenieria, S.A. de C.V. October 2004 - March 2006
Magma Design Automation October 2003 - October 2004
Synopsys Inc February 2002 - October 2003
Cadence Design Systems May 1999 - February 2002
Ambit Design Systems (Acquired by Cadence Design 1999) October 1997 - May 1999
Cadence Design Systems May 1995 - October 1997
Skills
Debugging, EDA, Product Management, Semiconductors, TCL, Power Analysis, Strategic Account, Formal Verification, Sales, Strategic Partnerships, Start-ups, FPGA, Static Timing Analysis, Verilog
Education
LeTourneau University 1987 — 1992
Electrical Engineering, Electrical and Electronics Engineering
Abby Robertson Abby Robertson's Cadence Design Systems Experience January 1994 - January 2002
Job Trade Show Prop Fabricator Finder
Industry Logistics and Supply Chain
Experience
Alliance Custom Scenic July 2011 - Present
SalesForce Outsource June 2005 - July 2011
Team Double Click June 2007 - January 2008
CurtCo Media February 2007 - April 2007
Cadence Design Systems January 1994 - January 2002
Cadence Design Systems 1994 - 2002
Skills
Event Planning, Musicians, Corporate Gifts, Event Management, Salesforce.com, Trade Shows, Email Marketing, Marketing, Budgets, Advertising, Account Management, Marketing Strategy, New Business Development, Sales, Time Management, Social Networking, Lead Generation, Management
Education
University of Massachusetts, Amherst 1979 — 1981
BS, Business
Ithaca College 1977 — 1979
Psychology
Lawrence Academy 1975 — 1977
Alliance Custom Scenic July 2011 - Present
SalesForce Outsource June 2005 - July 2011
Team Double Click June 2007 - January 2008
CurtCo Media February 2007 - April 2007
Cadence Design Systems January 1994 - January 2002
Cadence Design Systems 1994 - 2002
Skills
Event Planning, Musicians, Corporate Gifts, Event Management, Salesforce.com, Trade Shows, Email Marketing, Marketing, Budgets, Advertising, Account Management, Marketing Strategy, New Business Development, Sales, Time Management, Social Networking, Lead Generation, Management
Education
University of Massachusetts, Amherst 1979 — 1981
BS, Business
Ithaca College 1977 — 1979
Psychology
Lawrence Academy 1975 — 1977
Cameron Lewis's Cadence Design Systems Experience January 2008 - June 2015
Job HR Technologist
Industry Computer Software
Experience
Cadence Design Systems January 2008 - June 2015
Cadence Design Systems March 2006 - January 2008
Symantec July 2005 - March 2006
VERITAS Software January 2004 - July 2005
VERITAS Software September 2002 - January 2004
Zamba, Inc. 1996 - 2000
Skills
Program Management, Training, Vendor Management, Management, Learning Management..., Organizational..., Leadership, Strategy, CRM, Performance Management, Instructional Design, Human Resources, Consulting, Enterprise Software, Training Delivery, Project Management, Business Process, Integration, Talent Acquisition, Professional Services, Technical Writing, Metrics, Personnel Management, Cross-functional Team..., SaaS, HRIS, Change Management, Team Building, Talent Management, Onboarding, Employee Engagement, Strategic Planning
Education
Kent State University 1984 — 1986
Master of Education (M.Ed.), Instructional Technology
Lake Forest College 1980 — 1984
Bachelor's degree, Business & Environmental Studies
Cadence Design Systems January 2008 - June 2015
Cadence Design Systems March 2006 - January 2008
Symantec July 2005 - March 2006
VERITAS Software January 2004 - July 2005
VERITAS Software September 2002 - January 2004
Zamba, Inc. 1996 - 2000
Skills
Program Management, Training, Vendor Management, Management, Learning Management..., Organizational..., Leadership, Strategy, CRM, Performance Management, Instructional Design, Human Resources, Consulting, Enterprise Software, Training Delivery, Project Management, Business Process, Integration, Talent Acquisition, Professional Services, Technical Writing, Metrics, Personnel Management, Cross-functional Team..., SaaS, HRIS, Change Management, Team Building, Talent Management, Onboarding, Employee Engagement, Strategic Planning
Education
Kent State University 1984 — 1986
Master of Education (M.Ed.), Instructional Technology
Lake Forest College 1980 — 1984
Bachelor's degree, Business & Environmental Studies
Stefanie Ibarguen Stefanie Ibarguen's Cadence Design Systems Experience May 2014 - August 2014
Job Customer Experience Solutions Advisor
Industry Information Technology and Services
Experience
Oracle August 2015 - Present
Cadence Design Systems May 2014 - August 2014
Skills
Social Media, Teamwork, PowerPoint, Microsoft Office, Facebook, Microsoft Word, Microsoft Excel, Product Marketing, Event Planning, Spanish, Social Media Marketing, Blogging, Hospitality, Translation, English, SaaS, Oracle Applications, Customer Service, Brazilian Portuguese, Life Skills
Education
Isenberg School of Management, UMass Amherst 2011 — 2015
Bachelor of Business Administration (B.B.A.), Marketing, Hospitality & Tourism Management
Universidad de Malaga 2014 — 2014
Dracut Senior High School 2007 — 2011
Oracle August 2015 - Present
Cadence Design Systems May 2014 - August 2014
Skills
Social Media, Teamwork, PowerPoint, Microsoft Office, Facebook, Microsoft Word, Microsoft Excel, Product Marketing, Event Planning, Spanish, Social Media Marketing, Blogging, Hospitality, Translation, English, SaaS, Oracle Applications, Customer Service, Brazilian Portuguese, Life Skills
Education
Isenberg School of Management, UMass Amherst 2011 — 2015
Bachelor of Business Administration (B.B.A.), Marketing, Hospitality & Tourism Management
Universidad de Malaga 2014 — 2014
Dracut Senior High School 2007 — 2011
Alton Elmore's Cadence Design Systems Experience 1993 - 1999
Job Director of Relations & Leadership Development
Industry Information Technology and Services
Experience
Inter Sources Inc June 2014 - Present
Simbiosys Mobile Solutions, Inc. February 2013 - June 2014
WORLDPAY US INC October 2011 - February 2013
PalPilot 2007 - 2009
LandAmerica Commonwealth May 2004 - June 2007
Cisco Systems 1999 - 2003
Cadence Design Systems 1993 - 1999
Nortel Networks February 1984 - February 1992
Skills
Leadership, Management, Business Development, Recruiting, Strategy, Microsoft Office, Training, CRM, Customer Service, Public Speaking, Technical Recruiting, Account Management, New Business Development, Strategic Partnerships, JavaScript
Education
Louisiana State University
Business Administration and Management, General
Mission College
TechnicalTraining, CISCO Networking Academy LAN-WAN Design
Inter Sources Inc June 2014 - Present
Simbiosys Mobile Solutions, Inc. February 2013 - June 2014
WORLDPAY US INC October 2011 - February 2013
PalPilot 2007 - 2009
LandAmerica Commonwealth May 2004 - June 2007
Cisco Systems 1999 - 2003
Cadence Design Systems 1993 - 1999
Nortel Networks February 1984 - February 1992
Skills
Leadership, Management, Business Development, Recruiting, Strategy, Microsoft Office, Training, CRM, Customer Service, Public Speaking, Technical Recruiting, Account Management, New Business Development, Strategic Partnerships, JavaScript
Education
Louisiana State University
Business Administration and Management, General
Mission College
TechnicalTraining, CISCO Networking Academy LAN-WAN Design
Tirt Dutta Tirt Dutta's Cadence Design Systems Experience 2000 - 2006
Job Entrepreneur, Life Coach & Public Speaker
Industry Internet
Experience
DatnetEbiz Inc January 2007 - Present
Cadence Design Systems 2000 - 2006
AT&T Bell Laboratories 1992 - 2000
Skills
Social Media Trainer..., ASIC, Testing, Business Development, Leadership, Entrepreneurship, IC
Education
New Jersey Institute of Technology
MS, EE
Jadavpur University
BS, EE
South Point High School
DatnetEbiz Inc January 2007 - Present
Cadence Design Systems 2000 - 2006
AT&T Bell Laboratories 1992 - 2000
Skills
Social Media Trainer..., ASIC, Testing, Business Development, Leadership, Entrepreneurship, IC
Education
New Jersey Institute of Technology
MS, EE
Jadavpur University
BS, EE
South Point High School
Sourav Nandy Sourav Nandy's Cadence Design Systems Experience October 2006 - October 2007
Job MSTC student at The University of Texas at Austin
Industry Semiconductors
Experience
The University of Texas at Austin May 2015 - Present
Synopsys June 2012 - May 2015
Magma Design Automation May 2011 - May 2012
Magma Design Automation November 2007 - April 2011
Cadence Design Systems October 2006 - October 2007
Cadence Design Systems April 2004 - September 2006
Cadence Design Systems October 2000 - March 2004
Cadence Design Systems June 1999 - September 2000
Skills
EDA, Gate Level Simulation, TCL, Embedded Systems, Debugging, Algorithms, Simulations, Logic Synthesis, Xilinx, Low-power Design, Software Development, RTL coding, ASIC, SoC, RTL Coding, Verilog, VLSI, C
Education
Jadavpur University 1995 — 1999
B. Tech, Computer Science
Bidhan Chandra Roy Institution, Durgapur 1993 — 1995
St. Xaviers' School, Durgapur 1981 — 1993
The University of Texas at Austin
The University of Texas at Austin May 2015 - Present
Synopsys June 2012 - May 2015
Magma Design Automation May 2011 - May 2012
Magma Design Automation November 2007 - April 2011
Cadence Design Systems October 2006 - October 2007
Cadence Design Systems April 2004 - September 2006
Cadence Design Systems October 2000 - March 2004
Cadence Design Systems June 1999 - September 2000
Skills
EDA, Gate Level Simulation, TCL, Embedded Systems, Debugging, Algorithms, Simulations, Logic Synthesis, Xilinx, Low-power Design, Software Development, RTL coding, ASIC, SoC, RTL Coding, Verilog, VLSI, C
Education
Jadavpur University 1995 — 1999
B. Tech, Computer Science
Bidhan Chandra Roy Institution, Durgapur 1993 — 1995
St. Xaviers' School, Durgapur 1981 — 1993
The University of Texas at Austin
Sergey Vinnichenko's Cadence Design Systems Experience June 2004 - November 2011
Job Software Development Manager at Align Technology
Industry Computer Software
Experience
Align Technology November 2011 - Present
Cadence Design Systems June 2004 - November 2011
Electronic Tools Company September 1996 - June 2003
Skills
PME, Certified Scrum Master..., EDA, DRC, Computational Geometry, STL, C++, Multithreading, Algorithms, Software Engineering, Software Development, Linux, Distributed Systems, C, OOP, Shell Scripting, Software Design, Unix, Programming, CVS, Debugging, ClearCase, System Architecture, Object Oriented Design, High Performance..., Test Automation, C/C++ STL, Scrum
Education
Московский Государственный Университет им. М.В. Ломоносова (МГУ) 1992 — 1997
Master of Science (M.S.), Mathematics, diploma with honor
Align Technology November 2011 - Present
Cadence Design Systems June 2004 - November 2011
Electronic Tools Company September 1996 - June 2003
Skills
PME, Certified Scrum Master..., EDA, DRC, Computational Geometry, STL, C++, Multithreading, Algorithms, Software Engineering, Software Development, Linux, Distributed Systems, C, OOP, Shell Scripting, Software Design, Unix, Programming, CVS, Debugging, ClearCase, System Architecture, Object Oriented Design, High Performance..., Test Automation, C/C++ STL, Scrum
Education
Московский Государственный Университет им. М.В. Ломоносова (МГУ) 1992 — 1997
Master of Science (M.S.), Mathematics, diploma with honor
Achin Bhatia Achin Bhatia's Cadence Design Systems Experience January 2011 - May 2011
Job Consultant at Deloitte U.S. India offices
Industry Hospital & Health Care
Experience
Deloitte U.S. India offices June 2011 - Present
Deloitte Consulting June 2011 - June 2014
Cadence Design Systems January 2011 - May 2011
AIESEC February 2010 - April 2011
Skills
Team Management, Java, Market Research, HTML, C++, OBIEE, Cognos, DB2/SQL, Informatica, Business Analysis, Management, Team Leadership, Business Intelligence, Event Management, SQL, Public Relations, Project Management, C, Microsoft Office
Education
Manipal Institute of Technology 2007 — 2011
B Tech, Computer Science
FIITJEE Hyderabad 2005 — 2007
High School
Deloitte U.S. India offices June 2011 - Present
Deloitte Consulting June 2011 - June 2014
Cadence Design Systems January 2011 - May 2011
AIESEC February 2010 - April 2011
Skills
Team Management, Java, Market Research, HTML, C++, OBIEE, Cognos, DB2/SQL, Informatica, Business Analysis, Management, Team Leadership, Business Intelligence, Event Management, SQL, Public Relations, Project Management, C, Microsoft Office
Education
Manipal Institute of Technology 2007 — 2011
B Tech, Computer Science
FIITJEE Hyderabad 2005 — 2007
High School
Sai Kiran Movva Sai Kiran Movva's Cadence Design Systems Experience June 2014 - Present
Job Lead Engineer at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems June 2014 - Present
Cadence Design Systems July 2013 - June 2014
Cadence Design Systems August 2012 - July 2013
University of Minnesota September 2010 - August 2012
University of Minnesota September 2011 - May 2012
UTC Fire & Security May 2011 - September 2011
Defence Research and Development Organisation October 2009 - May 2010
Electronics Corporation of India Limited April 2008 - July 2008
Skills
Cadence Virtuoso, Matlab, C, C++, AutoCAD, Synopsys, VHDL, Open CV, Verilog, Ubuntu, Agilent ADS, Unix, System Verilog, MASM, HFSS, IAR, Mac OS, ModelSim, International Project..., Microsoft Office, AVR Studio, Linux, CAD, Java, TCL, Tcl-Tk, Conformal LEC, Logic Synthesis, RCP, ANSYS, Atmel AVR, Static Timing Analysis, SystemVerilog, Embedded Systems, VLSI, Perl, EDA, OpenCV
Education
University of Minnesota-Twin Cities 2010 — 2012
Masters, Electrical and Computer Engineering, 3.5
Jawaharlal Nehru Technological University 2006 — 2010
Bachelors, Electronics And Communication Engineering, 3.89
Chirec Public School 1994 — 2004
Mathematics and Statistics, 4.0
Cadence Design Systems June 2014 - Present
Cadence Design Systems July 2013 - June 2014
Cadence Design Systems August 2012 - July 2013
University of Minnesota September 2010 - August 2012
University of Minnesota September 2011 - May 2012
UTC Fire & Security May 2011 - September 2011
Defence Research and Development Organisation October 2009 - May 2010
Electronics Corporation of India Limited April 2008 - July 2008
Skills
Cadence Virtuoso, Matlab, C, C++, AutoCAD, Synopsys, VHDL, Open CV, Verilog, Ubuntu, Agilent ADS, Unix, System Verilog, MASM, HFSS, IAR, Mac OS, ModelSim, International Project..., Microsoft Office, AVR Studio, Linux, CAD, Java, TCL, Tcl-Tk, Conformal LEC, Logic Synthesis, RCP, ANSYS, Atmel AVR, Static Timing Analysis, SystemVerilog, Embedded Systems, VLSI, Perl, EDA, OpenCV
Education
University of Minnesota-Twin Cities 2010 — 2012
Masters, Electrical and Computer Engineering, 3.5
Jawaharlal Nehru Technological University 2006 — 2010
Bachelors, Electronics And Communication Engineering, 3.89
Chirec Public School 1994 — 2004
Mathematics and Statistics, 4.0
Uday Raj Shakelli's Cadence Design Systems Experience August 2015 - Present
Job Design Engineer II (Signal and Power Integrity) at Cadence Design Systems
Industry Electrical/Electronic Manufacturing
Experience
Cadence Design Systems August 2015 - Present
Cadence Design Systems January 2015 - July 2015
National Institute for Micro Small Medium Scale Enterprise May 2012 - August 2012
Skills
Cadence Virtuoso, PowerSI, SystemSI, HFSS, Q3D, Signal Integrity, Hyperlynx, HSPICE, VHDL, Matlab, PCB Design, EMI, Event Management, C, ESD, SPICE, ANSYS
Education
Missouri University Of Science & Technology- Rolla 2013 — 2015
Master's degree, Electrical and Electronics Engineering
Jawaharlal Nehru Technological University 2009 — 2013
Bachelor of Engineering (BEng), Electrical, Electronics and Communications Engineering
The Hyderabad Public School (Begumpet)
Cadence Design Systems August 2015 - Present
Cadence Design Systems January 2015 - July 2015
National Institute for Micro Small Medium Scale Enterprise May 2012 - August 2012
Skills
Cadence Virtuoso, PowerSI, SystemSI, HFSS, Q3D, Signal Integrity, Hyperlynx, HSPICE, VHDL, Matlab, PCB Design, EMI, Event Management, C, ESD, SPICE, ANSYS
Education
Missouri University Of Science & Technology- Rolla 2013 — 2015
Master's degree, Electrical and Electronics Engineering
Jawaharlal Nehru Technological University 2009 — 2013
Bachelor of Engineering (BEng), Electrical, Electronics and Communications Engineering
The Hyderabad Public School (Begumpet)
Carol Moné Carol Moné's Cadence Design Systems Experience September 1988 - July 1992
Job Documentary Producer at Our Earth Productions
Industry Media Production
Experience
Our Earth Productions September 2008 - Present
Our Earth Music January 2005 - 2011
Our Earth Music, Inc. April 2004 - April 2005
Cadence Design Systems September 1988 - July 1992
Cadence Design Systems 1989 - 1992
Tangent Systems June 1985 - September 1988
Tandem Computers June 1984 - June 1985
Hewlett Packard August 1979 - June 1984
Skills
Documentaries, Film, Video Production, Film Production, Video, Digital Media, Producing, New Media, Multimedia, Music, Social Media, Storytelling, Media Production, HD Video, Content Strategy, Short Films
Education
Syracuse University 1977 — 1979
MS, Computer Science
Le Moyne College 1973 — 1977
BS, Double Major-Math / Psychology
Our Earth Productions September 2008 - Present
Our Earth Music January 2005 - 2011
Our Earth Music, Inc. April 2004 - April 2005
Cadence Design Systems September 1988 - July 1992
Cadence Design Systems 1989 - 1992
Tangent Systems June 1985 - September 1988
Tandem Computers June 1984 - June 1985
Hewlett Packard August 1979 - June 1984
Skills
Documentaries, Film, Video Production, Film Production, Video, Digital Media, Producing, New Media, Multimedia, Music, Social Media, Storytelling, Media Production, HD Video, Content Strategy, Short Films
Education
Syracuse University 1977 — 1979
MS, Computer Science
Le Moyne College 1973 — 1977
BS, Double Major-Math / Psychology
Dave Reed Dave Reed's Cadence Design Systems Experience 1997 - 2000
Job Director of Marketing at Synopsys
Industry Semiconductors
Experience
Synopsys November 2012 - Present
SpringSoft February 2011 - November 2012
Blaze DFM, Inc. 2006 - 2009
Blaze DFM, Inc. 2004 - 2006
Monterey Design Systems 2001 - 2004
Aristo Technology 2000 - 2001
Cadence Design Systems 1997 - 2000
Cooper & Chyan Technology 1995 - 1997
Cadence Design Systems 1989 - 1995
Tangent 1987 - 1989
Skills
Marketing, EDA, Semiconductors, Integrated Circuit..., TCL, Analog, Start-ups, Verilog, ASIC, IC, Product Marketing, VLSI, Mixed Signal, FPGA, Product Management, SoC, Strategic Partnerships, Enterprise Software, Wireless, CMOS, Digital Signal..., Physical Design, Embedded Systems, Processors, Go-to-market Strategy, Semiconductor Industry, Analog Circuit Design, Power Management, Microprocessors, Debugging, Technical Marketing, Silicon, ARM, Hardware Architecture, Embedded Software, Electronics, RF, Simulations, VHDL, Microelectronics
Education
Lehigh University 1980 — 1984
BS, EE
Synopsys November 2012 - Present
SpringSoft February 2011 - November 2012
Blaze DFM, Inc. 2006 - 2009
Blaze DFM, Inc. 2004 - 2006
Monterey Design Systems 2001 - 2004
Aristo Technology 2000 - 2001
Cadence Design Systems 1997 - 2000
Cooper & Chyan Technology 1995 - 1997
Cadence Design Systems 1989 - 1995
Tangent 1987 - 1989
Skills
Marketing, EDA, Semiconductors, Integrated Circuit..., TCL, Analog, Start-ups, Verilog, ASIC, IC, Product Marketing, VLSI, Mixed Signal, FPGA, Product Management, SoC, Strategic Partnerships, Enterprise Software, Wireless, CMOS, Digital Signal..., Physical Design, Embedded Systems, Processors, Go-to-market Strategy, Semiconductor Industry, Analog Circuit Design, Power Management, Microprocessors, Debugging, Technical Marketing, Silicon, ARM, Hardware Architecture, Embedded Software, Electronics, RF, Simulations, VHDL, Microelectronics
Education
Lehigh University 1980 — 1984
BS, EE
Chad Saathoff Chad Saathoff's Cadence Design Systems Experience April 1999 - November 2008
Job PCB Designer
Industry Computer Software
Experience
Currently seeking new opportunities in Dallas/Fort Worth area April 2015 - Present
Interphase April 2012 - April 2015
Self-Employed January 2011 - April 2012
Aerotek Engineering September 2009 - December 2010
Cadence Design Systems April 1999 - November 2008
Intecom 1985 - 1999
MSD Systems 1983 - 1985
United Technologies - Mostek 1981 - 1983
HNTB January 1980 - December 1980
Skills
PCB design, Allegro, Cadence, Schematic Capture, Electronics, Circuit Design, Troubleshooting, EDA, Design for Manufacturing, Orcad, Debugging, Signal Integrity, Hardware Architecture, Software Documentation, PCB Design
Education
University of North Texas 1981 — 1987
BBA, Finance
LeTourneau University 1977 — 1981
A.S., Design Technology
Currently seeking new opportunities in Dallas/Fort Worth area April 2015 - Present
Interphase April 2012 - April 2015
Self-Employed January 2011 - April 2012
Aerotek Engineering September 2009 - December 2010
Cadence Design Systems April 1999 - November 2008
Intecom 1985 - 1999
MSD Systems 1983 - 1985
United Technologies - Mostek 1981 - 1983
HNTB January 1980 - December 1980
Skills
PCB design, Allegro, Cadence, Schematic Capture, Electronics, Circuit Design, Troubleshooting, EDA, Design for Manufacturing, Orcad, Debugging, Signal Integrity, Hardware Architecture, Software Documentation, PCB Design
Education
University of North Texas 1981 — 1987
BBA, Finance
LeTourneau University 1977 — 1981
A.S., Design Technology
AAMIR FAROOQUI AAMIR FAROOQUI's Cadence Design Systems Experience July 2013 - Present
Job Architect at Cadence Design Systems
Industry Computer Hardware
Experience
Cadence Design Systems July 2013 - Present
Stealth Mode Venture October 2012 - July 2013
Xilinx 2013 - 2013
Nevion, Video Systems Company, Oxnard, CA October 2010 - September 2012
Intilop, Inc. January 2010 - September 2010
AVIEON, Inc. March 2008 - September 2010
Magma Design Automation January 2006 - March 2008
Synopsys February 2000 - December 2005
BlueSteel Networks July 1999 - March 2000
UC Davis July 1997 - December 1999
Skills
Low Power Systems, Micro-architecture, FPGA Embedded systems..., ARM® NEON™ assembly, Hardware-Software..., High Performance..., Video Processing, Image processing, Computer Architecture, VLSI CAD, EDA, Computer Arithmetic, MPEG2, H.264 –..., C#, C, C++, Professional Video..., VoIP, SERDES, RTL & Datapath Synthesis, Microarchitecture, Image Processing, Software Development, FPGA, Integration, IP, Embedded Software, VLSI, Algorithms, Xilinx, Embedded Systems, Verilog, H.264, Low-power Design, Signal Processing
Education
Stanford University 2009 — 2009
SCPM (STANFORD CERTIFIED PROJECT MANAGER), Project Management
University of California, Davis 1997 — 1999
Doctor of Philosophy (Ph.D.), Electrical and Computer Engineering
King Fahd University of Petroleum & Minerals
King Fahd University of Petroleum & Minerals
bvs
High School, Mathematics, Physics, Chemistry
Cadence Design Systems July 2013 - Present
Stealth Mode Venture October 2012 - July 2013
Xilinx 2013 - 2013
Nevion, Video Systems Company, Oxnard, CA October 2010 - September 2012
Intilop, Inc. January 2010 - September 2010
AVIEON, Inc. March 2008 - September 2010
Magma Design Automation January 2006 - March 2008
Synopsys February 2000 - December 2005
BlueSteel Networks July 1999 - March 2000
UC Davis July 1997 - December 1999
Skills
Low Power Systems, Micro-architecture, FPGA Embedded systems..., ARM® NEON™ assembly, Hardware-Software..., High Performance..., Video Processing, Image processing, Computer Architecture, VLSI CAD, EDA, Computer Arithmetic, MPEG2, H.264 –..., C#, C, C++, Professional Video..., VoIP, SERDES, RTL & Datapath Synthesis, Microarchitecture, Image Processing, Software Development, FPGA, Integration, IP, Embedded Software, VLSI, Algorithms, Xilinx, Embedded Systems, Verilog, H.264, Low-power Design, Signal Processing
Education
Stanford University 2009 — 2009
SCPM (STANFORD CERTIFIED PROJECT MANAGER), Project Management
University of California, Davis 1997 — 1999
Doctor of Philosophy (Ph.D.), Electrical and Computer Engineering
King Fahd University of Petroleum & Minerals
King Fahd University of Petroleum & Minerals
bvs
High School, Mathematics, Physics, Chemistry
Mika Nuotio Mika Nuotio's Cadence Design Systems Experience 1996 - 2000
Job CEO at Empower Micro Systems Inc.
Industry Renewables & Environment
Experience
Empower Micro Systems Inc. 2011 - Present
ArrayPower 2008 - 2011
MagnaChip Semiconductor 2005 - 2008
IC Media (acquired by MagnaChip Semiconductor) 2004 - 2005
Infineon Technologies 2003 - 2004
Morphics Technology (acquired by Infineon Technologies) 2000 - 2003
Cadence Design Systems 1996 - 2000
Ericsson 1990 - 1996
Skills
Business Strategy, EDA, Electronics, Embedded Systems, Engineering, Entrepreneurship, Leadership, Management, Marketing, Mixed Signal, New Business Development, Product Development, Product Management, Product Marketing, Semiconductors, Sensors, Start-ups, Strategic Partnerships, Strategy, Telecommunications, Wireless
Education
KTH Royal Institute of Technology
Stanford University
University of California, Berkeley
Empower Micro Systems Inc. 2011 - Present
ArrayPower 2008 - 2011
MagnaChip Semiconductor 2005 - 2008
IC Media (acquired by MagnaChip Semiconductor) 2004 - 2005
Infineon Technologies 2003 - 2004
Morphics Technology (acquired by Infineon Technologies) 2000 - 2003
Cadence Design Systems 1996 - 2000
Ericsson 1990 - 1996
Skills
Business Strategy, EDA, Electronics, Embedded Systems, Engineering, Entrepreneurship, Leadership, Management, Marketing, Mixed Signal, New Business Development, Product Development, Product Management, Product Marketing, Semiconductors, Sensors, Start-ups, Strategic Partnerships, Strategy, Telecommunications, Wireless
Education
KTH Royal Institute of Technology
Stanford University
University of California, Berkeley
Mark Schrick's Cadence Design Systems Experience 2001 - 2004
Job Senior Director of Sales at 6D Global
Industry Computer Software
Experience
6D Global August 2015 - Present
Autodesk August 2012 - 2015
ANSYS, Inc. May 2011 - August 2012
Mentor Graphics June 2004 - May 2011
Cadence Design Systems 2001 - 2004
Simplex 2000 - 2001
Simplex 1999 - 2001
ST Microelectronics January 1990 - January 1999
Skills
Enterprise Software, Account Management, Start-ups, Sales Management, Sales Operations, Semiconductors, Business Development, EDA, SaaS, Product Management, Solution Selling, Cloud Computing, Management, Product Marketing, Direct Sales, Strategic Partnerships, Networking, Team Leadership, Pre-sales, Integration, Sales, Strategy, International Sales, B2B, Product Launch, Wireless Networking, Network Engineering, ASIC, Go-to-market Strategy, Sales Process, Channel Partners, Wireless, Leadership, Electronic Design..., Regional Managers, sales director, Complex Sales, Multi-channel Campaign..., Key Account Management, Salesforce.com, Marketing Strategy, Adobe Creative Suite, Adobe AEM, Web Analytics, Web Services, Web Content Management, Web Project Management, Mobile Web Design
Education
Pepperdine University, The George L. Graziadio School of Business and Management 1996 — 1997
MBA, Business
Kansas State University 1981 — 1985
BSEE, Electrical Engineering
Johnson County Community College 1979 — 1981
ASEE, Electrical Engineering
6D Global August 2015 - Present
Autodesk August 2012 - 2015
ANSYS, Inc. May 2011 - August 2012
Mentor Graphics June 2004 - May 2011
Cadence Design Systems 2001 - 2004
Simplex 2000 - 2001
Simplex 1999 - 2001
ST Microelectronics January 1990 - January 1999
Skills
Enterprise Software, Account Management, Start-ups, Sales Management, Sales Operations, Semiconductors, Business Development, EDA, SaaS, Product Management, Solution Selling, Cloud Computing, Management, Product Marketing, Direct Sales, Strategic Partnerships, Networking, Team Leadership, Pre-sales, Integration, Sales, Strategy, International Sales, B2B, Product Launch, Wireless Networking, Network Engineering, ASIC, Go-to-market Strategy, Sales Process, Channel Partners, Wireless, Leadership, Electronic Design..., Regional Managers, sales director, Complex Sales, Multi-channel Campaign..., Key Account Management, Salesforce.com, Marketing Strategy, Adobe Creative Suite, Adobe AEM, Web Analytics, Web Services, Web Content Management, Web Project Management, Mobile Web Design
Education
Pepperdine University, The George L. Graziadio School of Business and Management 1996 — 1997
MBA, Business
Kansas State University 1981 — 1985
BSEE, Electrical Engineering
Johnson County Community College 1979 — 1981
ASEE, Electrical Engineering
Jay DeSouza's Cadence Design Systems Experience 2001 - 2001
Job Senior Engineering Manager at Turn
Industry Semiconductors
Experience
Turn July 2015 - Present
Intel September 2004 - July 2015
University of Illinois 2000 - 2004
Cadence Design Systems 2001 - 2001
Guidant June 1998 - February 2000
AT&T Bell Labs 1994 - 1995
Education
University of Illinois at Urbana-Champaign - College of Business 2006 — 2008
Master of Business Administration (MBA)
University of Illinois at Urbana-Champaign 2000 — 2004
PhD, Computer Science
University of Illinois at Urbana-Champaign 1995 — 1998
Computer Science
Kansas State University 1993 — 1994
MS, Computer Science
Sri Venkateswara College of Engineering 1989 — 1993
B.E., Computer Science Engineering
Don Bosco, Egmore, Madras 1975 — 1989
School
Turn July 2015 - Present
Intel September 2004 - July 2015
University of Illinois 2000 - 2004
Cadence Design Systems 2001 - 2001
Guidant June 1998 - February 2000
AT&T Bell Labs 1994 - 1995
Education
University of Illinois at Urbana-Champaign - College of Business 2006 — 2008
Master of Business Administration (MBA)
University of Illinois at Urbana-Champaign 2000 — 2004
PhD, Computer Science
University of Illinois at Urbana-Champaign 1995 — 1998
Computer Science
Kansas State University 1993 — 1994
MS, Computer Science
Sri Venkateswara College of Engineering 1989 — 1993
B.E., Computer Science Engineering
Don Bosco, Egmore, Madras 1975 — 1989
School
Rajit Chandra's Cadence Design Systems Experience October 1990 - October 1995
Job Principal/Mgr LowPower SoC at Qualcomm
Industry Semiconductors
Experience
Qualcomm March 2013 - Present
AMD July 2010 - March 2013
Gradient Design Automation October 2008 - July 2010
Gradient Design Automation October 2002 - October 2008
Moscape Inc. (acquired by Magma Design Automation) March 1998 - October 2002
Sun Microsystems April 1997 - March 1998
Exponential Technology Inc October 1995 - April 1997
Cadence Design Systems October 1990 - October 1995
Bell Laboratories December 1988 - October 1990
Cirrus Logic December 1986 - December 1988
Skills
EDA, Semiconductors, Software Engineering, Simulations, Low-power Design, High Performance..., Analysis, SoC, Start-ups, Entrepreneurship, ASIC, Physical Design, Static Timing Analysis, IC, Computer Architecture, Signal Integrity, Microprocessors, Analog, VLSI, Silicon, Verilog, Functional Verification, Mixed Signal, Timing Closure, Debugging, Embedded Systems
Education
London South Bank University 1977 — 1980
Ph.D., Computer Engineering
Loughborough University 1976 — 1977
M.Sc., Electrical Engineering
Qualcomm March 2013 - Present
AMD July 2010 - March 2013
Gradient Design Automation October 2008 - July 2010
Gradient Design Automation October 2002 - October 2008
Moscape Inc. (acquired by Magma Design Automation) March 1998 - October 2002
Sun Microsystems April 1997 - March 1998
Exponential Technology Inc October 1995 - April 1997
Cadence Design Systems October 1990 - October 1995
Bell Laboratories December 1988 - October 1990
Cirrus Logic December 1986 - December 1988
Skills
EDA, Semiconductors, Software Engineering, Simulations, Low-power Design, High Performance..., Analysis, SoC, Start-ups, Entrepreneurship, ASIC, Physical Design, Static Timing Analysis, IC, Computer Architecture, Signal Integrity, Microprocessors, Analog, VLSI, Silicon, Verilog, Functional Verification, Mixed Signal, Timing Closure, Debugging, Embedded Systems
Education
London South Bank University 1977 — 1980
Ph.D., Computer Engineering
Loughborough University 1976 — 1977
M.Sc., Electrical Engineering
Carlos Freire da Silva Pinto Coelho's Cadence Design Systems Experience September 2007 - May 2010
Job Quantitative Developer at Quantlab Financial
Industry Research
Experience
Quantlab Financial, LLC February 2015 - Present
Quantlab Financial May 2010 - February 2015
Cadence Design Systems September 2007 - May 2010
MIT September 2002 - September 2007
AltraBroadband 2001 - 2002
Ansoft Corporation 2001 - 2002
Skills
Algorithms, Simulations, Matlab, Numerical Analysis, C++, Machine Learning, High Performance..., Mathematical Modeling, Applied Mathematics, Optimization, Python, Optimizations, Distributed Systems, MPI, Parallel Computing, Signal Processing, Performance Tuning, C, Statistics, R, Modeling, Software Development, Monte Carlo Simulation, Quantitative Finance, Parallel Programming, Multithreading, Software Engineering, Research, Architecture, Physics, Computer Architecture, Computer Science, Data Mining, Java, Scalability, Linux, Artificial Intelligence, Pattern Recognition, LaTeX
Education
Massachusetts Institute of Technology 2002 — 2007
PhD, Electrical Engineering and Computer Science
Instituto Superior Técnico 1994 — 2001
Masters, Electrical and Computer Engineering
Colégio Planalto 1990 — 1994
Quantlab Financial, LLC February 2015 - Present
Quantlab Financial May 2010 - February 2015
Cadence Design Systems September 2007 - May 2010
MIT September 2002 - September 2007
AltraBroadband 2001 - 2002
Ansoft Corporation 2001 - 2002
Skills
Algorithms, Simulations, Matlab, Numerical Analysis, C++, Machine Learning, High Performance..., Mathematical Modeling, Applied Mathematics, Optimization, Python, Optimizations, Distributed Systems, MPI, Parallel Computing, Signal Processing, Performance Tuning, C, Statistics, R, Modeling, Software Development, Monte Carlo Simulation, Quantitative Finance, Parallel Programming, Multithreading, Software Engineering, Research, Architecture, Physics, Computer Architecture, Computer Science, Data Mining, Java, Scalability, Linux, Artificial Intelligence, Pattern Recognition, LaTeX
Education
Massachusetts Institute of Technology 2002 — 2007
PhD, Electrical Engineering and Computer Science
Instituto Superior Técnico 1994 — 2001
Masters, Electrical and Computer Engineering
Colégio Planalto 1990 — 1994
Tarakam Peddada's Cadence Design Systems Experience March 2015 - Present
Job Senior Technology Executive and Entrepreneur
Industry Computer Software
Experience
Cadence Design Systems March 2015 - Present
Informatica March 2014 - February 2015
Independent Consultant December 2012 - February 2014
VMware May 2011 - November 2012
Suha Systems, Inc. 2003 - April 2011
Servicespace.com 2000 - 2003
Nortel Networks / Bay Networks 1997 - 2000
Sun Microsystems 1988 - 1997
Skills
Cloud Computing, SaaS, Enterprise Software, IT Strategy, Data Center, Strategy, Information Technology, Management, Enterprise Architecture, IT Service Management, Architecture, Program Management, IT Operations, Networking, Professional Services, Infrastructure, E-commerce, VMware, Telecommunications, Business Intelligence, Storage, ERP, ITIL, Software Development, Oracle, IT Management, Network Architecture, Technical Leadership, Technology Architecture, CIO Advisory Services, IT Enabled Business..., Software Project..., Business Continuity, Global IT..., IT Executive Management
Education
Kansas State University
Master's Degree, Industrial Engineering
Osmania University
BE, Mechanical Engineering
Santa Clara University
MS, Computer Engineering
Cadence Design Systems March 2015 - Present
Informatica March 2014 - February 2015
Independent Consultant December 2012 - February 2014
VMware May 2011 - November 2012
Suha Systems, Inc. 2003 - April 2011
Servicespace.com 2000 - 2003
Nortel Networks / Bay Networks 1997 - 2000
Sun Microsystems 1988 - 1997
Skills
Cloud Computing, SaaS, Enterprise Software, IT Strategy, Data Center, Strategy, Information Technology, Management, Enterprise Architecture, IT Service Management, Architecture, Program Management, IT Operations, Networking, Professional Services, Infrastructure, E-commerce, VMware, Telecommunications, Business Intelligence, Storage, ERP, ITIL, Software Development, Oracle, IT Management, Network Architecture, Technical Leadership, Technology Architecture, CIO Advisory Services, IT Enabled Business..., Software Project..., Business Continuity, Global IT..., IT Executive Management
Education
Kansas State University
Master's Degree, Industrial Engineering
Osmania University
BE, Mechanical Engineering
Santa Clara University
MS, Computer Engineering
Bob Melchiorre's Cadence Design Systems Experience May 2005 - Present
Job Director, Technical Field Operations, Digital IC Implementation
Industry Semiconductors
Experience
Cadence Design Systems May 2005 - Present
Cadence Design Systems November 2001 - May 2005
Agere Systems 1996 - 2001
Lucent Technologies 1995 - 1998
AT&T Bell Labs 1991 - 1995
AT&T Bell Labs 1985 - 1991
AT&T Bell Labs 1986 - 1987
AT&T Bell Labs 1981 - 1985
Skills
Team Leadership, Technical Management, Marketing Strategy, ASIC, IC, SoC, EDA, Technology Management, Semiconductors, Product Development, Static Timing Analysis, Mixed Signal, Project Management, Product Management, Testing, Simulations, Process Improvement, Cross-functional Team..., Circuit Design, Analog, Management, Product Marketing, Integration, Enterprise Software
Education
Lehigh University 1987 — 1992
MS, Electrical Engineering
Temple University 1977 — 1981
BS, Electrical Engineering
Roman Catholic High School 1973 — 1977
Cadence Design Systems May 2005 - Present
Cadence Design Systems November 2001 - May 2005
Agere Systems 1996 - 2001
Lucent Technologies 1995 - 1998
AT&T Bell Labs 1991 - 1995
AT&T Bell Labs 1985 - 1991
AT&T Bell Labs 1986 - 1987
AT&T Bell Labs 1981 - 1985
Skills
Team Leadership, Technical Management, Marketing Strategy, ASIC, IC, SoC, EDA, Technology Management, Semiconductors, Product Development, Static Timing Analysis, Mixed Signal, Project Management, Product Management, Testing, Simulations, Process Improvement, Cross-functional Team..., Circuit Design, Analog, Management, Product Marketing, Integration, Enterprise Software
Education
Lehigh University 1987 — 1992
MS, Electrical Engineering
Temple University 1977 — 1981
BS, Electrical Engineering
Roman Catholic High School 1973 — 1977
Jack Rimmele's Cadence Design Systems Experience September 1993 - November 2008
Job Solutions Engineering Manager at Mechdyne Corporation
Industry Information Technology and Services
Experience
Mechdyne Corporation March 2014 - Present
The AYR Group November 2008 - Present
VCE, the Virtual Computing Environment Company May 2012 - March 2014
Brainware June 2011 - December 2011
Sales Engineer Alliance 2010 - June 2011
Cadence Design Systems September 1993 - November 2008
Skills
Cross-functional Team..., CRM, Strategy, Product Management, Management, Leadership, Pre-sales, Sales Operations, Team Leadership, Sales Process, Strategic Planning, Sales Management, Solution Selling, Coaching, Strategic Partnerships, Marketing, Account Management, Product Marketing, Consulting, SaaS, Sales, Enterprise Software, Analysis, Cloud Computing, Business Development, Professional Services, Salesforce.com, Program Management, Integration, Start-ups, Training, New Business Development, Direct Sales
Education
Lehigh University 2004 — 2009
MBA, Business
Lehigh University 1985 — 2009
MS, Electrical Engineering
Lafayette College 1972 — 1984
BS, Electrical Engineering
Lafayette College
BS, Math
Rutgers University School of Law - Newark
JD, Law
Union High school
University of Colorado Boulder
Mechdyne Corporation March 2014 - Present
The AYR Group November 2008 - Present
VCE, the Virtual Computing Environment Company May 2012 - March 2014
Brainware June 2011 - December 2011
Sales Engineer Alliance 2010 - June 2011
Cadence Design Systems September 1993 - November 2008
Skills
Cross-functional Team..., CRM, Strategy, Product Management, Management, Leadership, Pre-sales, Sales Operations, Team Leadership, Sales Process, Strategic Planning, Sales Management, Solution Selling, Coaching, Strategic Partnerships, Marketing, Account Management, Product Marketing, Consulting, SaaS, Sales, Enterprise Software, Analysis, Cloud Computing, Business Development, Professional Services, Salesforce.com, Program Management, Integration, Start-ups, Training, New Business Development, Direct Sales
Education
Lehigh University 2004 — 2009
MBA, Business
Lehigh University 1985 — 2009
MS, Electrical Engineering
Lafayette College 1972 — 1984
BS, Electrical Engineering
Lafayette College
BS, Math
Rutgers University School of Law - Newark
JD, Law
Union High school
University of Colorado Boulder
Carol Culver's Cadence Design Systems Experience January 2000 - May 2001
Job Chief Operating Officer at Southwest Antennas
Industry Electrical/Electronic Manufacturing
Experience
Southwest Antennas August 2014 - Present
Kaiser Permanente November 2013 - October 2014
Regence BlueCross Blueshield of Oregon February 2011 - April 2013
ODS Companies May 2004 - February 2011
Cadence Design Systems January 2000 - May 2001
Kaiser Permanente August 1997 - December 1999
PMI / Delta Dental of California 1990 - 1997
Skills
Process Improvement
Education
Linfield College 2004 — 2006
Bachelor of Science, Business Management
Southwest Antennas August 2014 - Present
Kaiser Permanente November 2013 - October 2014
Regence BlueCross Blueshield of Oregon February 2011 - April 2013
ODS Companies May 2004 - February 2011
Cadence Design Systems January 2000 - May 2001
Kaiser Permanente August 1997 - December 1999
PMI / Delta Dental of California 1990 - 1997
Skills
Process Improvement
Education
Linfield College 2004 — 2006
Bachelor of Science, Business Management
Nishant Arya's Cadence Design Systems Experience May 2001 - March 2007
Job Manager at VMware
Industry Computer Software
Experience
VMware July 2014 - Present
VMware May 2012 - June 2014
Flexera Software February 2008 - May 2012
Investment Technology Group May 2007 - February 2008
Cadence Design Systems May 2001 - March 2007
C-DoT October 1999 - March 2001
Skills
C++, C, Unix, OOP, Software Development, ClearCase, Object Oriented Design, STL, MFC, Windows, Software Design, Software Licensing, EDA, SDLC, Software Engineering, Team Management, Software Project..., Agile Methodologies
Education
Kurukshetra University 1995 — 1999
B.Tech., Computer Science
VMware July 2014 - Present
VMware May 2012 - June 2014
Flexera Software February 2008 - May 2012
Investment Technology Group May 2007 - February 2008
Cadence Design Systems May 2001 - March 2007
C-DoT October 1999 - March 2001
Skills
C++, C, Unix, OOP, Software Development, ClearCase, Object Oriented Design, STL, MFC, Windows, Software Design, Software Licensing, EDA, SDLC, Software Engineering, Team Management, Software Project..., Agile Methodologies
Education
Kurukshetra University 1995 — 1999
B.Tech., Computer Science
Husam Abu-Haimed's Cadence Design Systems Experience November 2014 - Present
Job Software Architect at Cadence Design Systems
Industry Computer Hardware
Experience
Cadence Design Systems November 2014 - Present
FolioGuard November 2013 - Present
Cadence Design Systems August 2013 - November 2013
Atrenta July 2012 - July 2013
NVIDIA February 2007 - July 2012
Nusym Technology, Inc. September 2004 - January 2007
Skills
ASIC, ATPG, Algorithms, Architecture, Architectures, C, C#, C, Computer Architecture, Computer Science, Data Structures, Debugging, EDA, Electrical Engineering, Engineering, Formal Verification, Hardware, High Performance..., Linux, Functional Verification, Logic Design, Microprocessors, Parallel Programming, Perl, R, RTL design, Silicon, Simulations, SoC, Software Development, Static Timing Analysis, Verilog, C++, Machine Learning, RTL Design, Python, Software Design, Testing, Software Engineering
Education
Stanford University
Ph.D., Electrical Engineering: Formal Verification, Computer Architecture, IC Design
King Fahd University of Petroleum & Minerals
MS, Computer Engineering
Cadence Design Systems November 2014 - Present
FolioGuard November 2013 - Present
Cadence Design Systems August 2013 - November 2013
Atrenta July 2012 - July 2013
NVIDIA February 2007 - July 2012
Nusym Technology, Inc. September 2004 - January 2007
Skills
ASIC, ATPG, Algorithms, Architecture, Architectures, C, C#, C, Computer Architecture, Computer Science, Data Structures, Debugging, EDA, Electrical Engineering, Engineering, Formal Verification, Hardware, High Performance..., Linux, Functional Verification, Logic Design, Microprocessors, Parallel Programming, Perl, R, RTL design, Silicon, Simulations, SoC, Software Development, Static Timing Analysis, Verilog, C++, Machine Learning, RTL Design, Python, Software Design, Testing, Software Engineering
Education
Stanford University
Ph.D., Electrical Engineering: Formal Verification, Computer Architecture, IC Design
King Fahd University of Petroleum & Minerals
MS, Computer Engineering
Hans-Peter Loeb's Cadence Design Systems Experience October 2014 - Present
Job
Industry Semiconductors
Experience
Cadence Design Systems October 2014 - Present
Skills
Embedded Systems, FPGA, SystemC, SoC, C++, Virtual Prototyping, TLM, Systems Engineering, Object Oriented Design, Matlab, Java, Linux, GNU tools, Software Architectural..., ASIC, Simulations, VHDL, Verilog, Ethernet, Scripting, Design Patterns, Template Metaprogramming, MAC layer, Wireless Networking, Profinet, IEEE 802.11, System Architecture, Performance Analysis, Debugging, Microsoft Visual Studio..., Eclipse CDT, Embedded Software, ARM, MIPS, EDA, Assembly Language, Medical Imaging, MRI
Education
Universität Bielefeld / University of Bielefeld 2006 — 2010
Dr.-Ing., Computer Engineering
Universität Karlsruhe (TH) 1998 — 2005
Dipl.-Inf., Computer Science
York University 2002 — 2003
Computer Science, Physics
Cadence Design Systems October 2014 - Present
Skills
Embedded Systems, FPGA, SystemC, SoC, C++, Virtual Prototyping, TLM, Systems Engineering, Object Oriented Design, Matlab, Java, Linux, GNU tools, Software Architectural..., ASIC, Simulations, VHDL, Verilog, Ethernet, Scripting, Design Patterns, Template Metaprogramming, MAC layer, Wireless Networking, Profinet, IEEE 802.11, System Architecture, Performance Analysis, Debugging, Microsoft Visual Studio..., Eclipse CDT, Embedded Software, ARM, MIPS, EDA, Assembly Language, Medical Imaging, MRI
Education
Universität Bielefeld / University of Bielefeld 2006 — 2010
Dr.-Ing., Computer Engineering
Universität Karlsruhe (TH) 1998 — 2005
Dipl.-Inf., Computer Science
York University 2002 — 2003
Computer Science, Physics
Arkadiy Boyarshinov's Cadence Design Systems Experience June 2010 - Present
Job Senior Member of Technical Staff at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems June 2010 - Present
Denali Software December 2007 - June 2010
Lattice Semiconductor Corp. December 2002 - September 2007
Cadence Design Systems, Inc. September 2000 - November 2002
Skills
Verilog, EDA, SystemVerilog, Perl, ASIC, C, Subversion, Linux, Software Development, Algorithms, C++, CVS, Embedded Systems, VCS, Software Engineering, Timing, Unix, Functional Verification, VHDL, ModelSim, ClearCase
Education
632
Moscow State University
MS, Physics
Cadence Design Systems June 2010 - Present
Denali Software December 2007 - June 2010
Lattice Semiconductor Corp. December 2002 - September 2007
Cadence Design Systems, Inc. September 2000 - November 2002
Skills
Verilog, EDA, SystemVerilog, Perl, ASIC, C, Subversion, Linux, Software Development, Algorithms, C++, CVS, Embedded Systems, VCS, Software Engineering, Timing, Unix, Functional Verification, VHDL, ModelSim, ClearCase
Education
632
Moscow State University
MS, Physics
Weih-Guang (Wayne) Liou's Cadence Design Systems Experience October 1994 - October 1998
Job Senior Staff Engineer at Qualcomm Atheros
Industry Semiconductors
Experience
Qualcomm November 2011 - Present
Broadcom November 1999 - November 2011
Sibyte 2001 - 2003
Sibyte 2001 - 2003
Simplex Solutions (later acquired by Cadence) November 1998 - November 1999
Cadence Design Systems October 1994 - October 1998
Skills
Timing Closure, Physical Design, Floorplanning, Clock Tree Synthesis, Static Timing Analysis, DRC, LVS, Power Analysis, Magma, Primetime, Parasitic Extraction, Physical Verification, Timing, EDA, Low Power Design, SoC, Cadence Virtuoso, Low-power Design
Education
Iowa State University 1992 — 1994
M.S. of Science, E.E, 4.0
National Tsing Hua University 1987 — 1990
M.S. of Science, Semiconductor - Thin Film
Atom and Molecular Institute of Academic Sinica 1986 — 1987
Research Assistant, Micro Chemical Dynamics - Physical Chemistry
National Taiwan University 1980 — 1984
B.S., Physics
Qualcomm November 2011 - Present
Broadcom November 1999 - November 2011
Sibyte 2001 - 2003
Sibyte 2001 - 2003
Simplex Solutions (later acquired by Cadence) November 1998 - November 1999
Cadence Design Systems October 1994 - October 1998
Skills
Timing Closure, Physical Design, Floorplanning, Clock Tree Synthesis, Static Timing Analysis, DRC, LVS, Power Analysis, Magma, Primetime, Parasitic Extraction, Physical Verification, Timing, EDA, Low Power Design, SoC, Cadence Virtuoso, Low-power Design
Education
Iowa State University 1992 — 1994
M.S. of Science, E.E, 4.0
National Tsing Hua University 1987 — 1990
M.S. of Science, Semiconductor - Thin Film
Atom and Molecular Institute of Academic Sinica 1986 — 1987
Research Assistant, Micro Chemical Dynamics - Physical Chemistry
National Taiwan University 1980 — 1984
B.S., Physics
John Ransweiler's Cadence Design Systems Experience April 2001 - April 2014
Job Director, Corporate PMO at Navis
Industry Computer Software
Experience
Navis April 2014 - Present
Cadence Design Systems April 2001 - April 2014
Dmind July 2000 - April 2001
Navigant June 1998 - July 2000
Skills
Software Project..., Budget Management, Budget Analysis, Enterprise Software, SDLC, Vendor Management, Cloud Computing, PMP, SaaS, Program Management, IT Strategy, Project Portfolio..., PMO, IT Management, Agile Project Management, CRM, Integration, Strategy, Project Management, Management, Budgets, Cross-functional Team..., Software Development, Unix, ERP, Enterprise Architecture, Business Development, Agile Methodologies
Education
Detroit Catholic Central
Detroit Catholic Central
Loyola University of Chicago 1989 — 1994
BA
Stanford University Center for Professional Development 2005 — 2006
Advanced Project Management
Stanford University Center for Professional Development 2010 — 2011
Strategic Decision and Risk Management
Navis April 2014 - Present
Cadence Design Systems April 2001 - April 2014
Dmind July 2000 - April 2001
Navigant June 1998 - July 2000
Skills
Software Project..., Budget Management, Budget Analysis, Enterprise Software, SDLC, Vendor Management, Cloud Computing, PMP, SaaS, Program Management, IT Strategy, Project Portfolio..., PMO, IT Management, Agile Project Management, CRM, Integration, Strategy, Project Management, Management, Budgets, Cross-functional Team..., Software Development, Unix, ERP, Enterprise Architecture, Business Development, Agile Methodologies
Education
Detroit Catholic Central
Detroit Catholic Central
Loyola University of Chicago 1989 — 1994
BA
Stanford University Center for Professional Development 2005 — 2006
Advanced Project Management
Stanford University Center for Professional Development 2010 — 2011
Strategic Decision and Risk Management
Shishir Shroff's Cadence Design Systems Experience March 2006 - May 2008
Job Vice President, Business Solutions at Vuclip
Industry Wireless
Experience
Vuclip November 2012 - Present
Vuclip June 2008 - October 2012
Cadence Design Systems March 2006 - May 2008
Praesagus January 2002 - March 2006
Skills
Product Management, Team Management, Software Project..., Mobile Devices, Cross-functional Team..., Agile Methodologies, Business Development, Product Development
Education
University of Denver 1999 — 2001
Masters, Computer Science
Maharashtra Institute of Technology, Pune 1995 — 1999
Bachelor, Computer Science
University of Pune 1995 — 1999
Bachelor's, Computer Science
Loyola High School, Pune 1983 — 1995
High School
Vuclip November 2012 - Present
Vuclip June 2008 - October 2012
Cadence Design Systems March 2006 - May 2008
Praesagus January 2002 - March 2006
Skills
Product Management, Team Management, Software Project..., Mobile Devices, Cross-functional Team..., Agile Methodologies, Business Development, Product Development
Education
University of Denver 1999 — 2001
Masters, Computer Science
Maharashtra Institute of Technology, Pune 1995 — 1999
Bachelor, Computer Science
University of Pune 1995 — 1999
Bachelor's, Computer Science
Loyola High School, Pune 1983 — 1995
High School
Aaron Eichenseer's Cadence Design Systems Experience June 2002 - August 2002
Job Customer Support Engineer at Open Text
Industry Computer Software
Experience
Vignette July 2005 - July 2009
Cadence Design Systems June 2002 - August 2002
Skills
Vignette, Weblogic, Troubleshooting, Tomcat, Portals
Education
Louisiana State University 2001 — 2004
Information Systems and Decision Sciences
Vignette July 2005 - July 2009
Cadence Design Systems June 2002 - August 2002
Skills
Vignette, Weblogic, Troubleshooting, Tomcat, Portals
Education
Louisiana State University 2001 — 2004
Information Systems and Decision Sciences
John Wagnon's Cadence Design Systems Experience 2003 - Present
Job Sales Technical Leader at Cadence
Industry Semiconductors
Experience
Cadence Design Systems 2003 - Present
Cadence February 2002 - Present
St. Edward's University 2009 - 2012
Mentor Graphics 1994 - 2001
Texas Instruments 1991 - 1994
Skills
EDA, Semiconductors, TCL, Verilog, IC, Simulations, Mixed Signal, Physical Design, SoC, Perl, Physical Verification, Debugging, Unix
Education
John F. Kennedy University 2007 — 2009
Certificate, Integral Theory
Oklahoma State University 1984 — 1991
MS, Electrical and Electronics Engineering
Duncan High School 1980 — 1984
Cadence Design Systems 2003 - Present
Cadence February 2002 - Present
St. Edward's University 2009 - 2012
Mentor Graphics 1994 - 2001
Texas Instruments 1991 - 1994
Skills
EDA, Semiconductors, TCL, Verilog, IC, Simulations, Mixed Signal, Physical Design, SoC, Perl, Physical Verification, Debugging, Unix
Education
John F. Kennedy University 2007 — 2009
Certificate, Integral Theory
Oklahoma State University 1984 — 1991
MS, Electrical and Electronics Engineering
Duncan High School 1980 — 1984
Eric Huber's Cadence Design Systems Experience October 1998 - October 2003
Job Software Engineer at Fidelity Technologies
Industry Computer Software
Experience
Fidelity Technologies August 2012 - Present
LSI May 2005 - January 2012
Erex Software Solutions, LLC October 2003 - May 2005
Cadence Design Systems October 1998 - October 2003
Lucent Technologies September 1997 - October 1998
AT&T April 1985 - September 1996
Bell Laboratories 1985 - 1989
Skills
Debugging, Embedded Systems, Digital Signal..., SoC, TCL, Embedded Software, Semiconductors, C, Linux, Firmware, Device Drivers, Software Development, Programming, System Architecture, Testing, TCP/IP
Education
Kansas State University 1994 — 1995
MSCS, Computer & Information Sciences
Shippensburg University of Pennsylvania 1978 — 1982
BSCS, Computer Science
Fidelity Technologies August 2012 - Present
LSI May 2005 - January 2012
Erex Software Solutions, LLC October 2003 - May 2005
Cadence Design Systems October 1998 - October 2003
Lucent Technologies September 1997 - October 1998
AT&T April 1985 - September 1996
Bell Laboratories 1985 - 1989
Skills
Debugging, Embedded Systems, Digital Signal..., SoC, TCL, Embedded Software, Semiconductors, C, Linux, Firmware, Device Drivers, Software Development, Programming, System Architecture, Testing, TCP/IP
Education
Kansas State University 1994 — 1995
MSCS, Computer & Information Sciences
Shippensburg University of Pennsylvania 1978 — 1982
BSCS, Computer Science
Mohit Bhatnagar's Cadence Design Systems Experience April 2002 - May 2008
Job VP Products & Marketing at Robin Systems
Industry Computer Software
Experience
Robin Systems May 2014 - August 2015
NetApp October 2012 - May 2014
Symantec, Cadence, McKinsey November 2010 - May 2012
Symantec September 2008 - November 2010
Cadence Design Systems April 2002 - May 2008
McKinsey & Company August 1999 - March 2002
Motorola March 1994 - March 1999
Skills
Enterprise Mobility, Virtualization, Enterprise Software, Building growth..., Business Strategy, Operational Execution, Analytic Thinking, Product Management, Product Marketing, Technology Sales, Value Selling, Product Adoption, Services Delivery, Technology Solutions, Team Building, Team Mentoring, Executive Presentations, Business, Sales, Cloud Computing, Competitive Analysis, Flash Memory, Business Intelligence, Professional Services, Program Management, Strategy, Business Development, Management, CRM, Strategic Partnerships, Start-ups, Business Analysis, Semiconductors, Cross-functional Team..., SaaS, Flash, Go-to-market Strategy, Leadership, Storage, Agile Methodologies
Education
NC State 1990 — 1994
Ph.D., Electrical Engineering
IIT Kanpur 1984 — 1988
Bachelor of Technology (B.Tech.)
Kendriya Vidyalaya 1976 — 1984
Robin Systems May 2014 - August 2015
NetApp October 2012 - May 2014
Symantec, Cadence, McKinsey November 2010 - May 2012
Symantec September 2008 - November 2010
Cadence Design Systems April 2002 - May 2008
McKinsey & Company August 1999 - March 2002
Motorola March 1994 - March 1999
Skills
Enterprise Mobility, Virtualization, Enterprise Software, Building growth..., Business Strategy, Operational Execution, Analytic Thinking, Product Management, Product Marketing, Technology Sales, Value Selling, Product Adoption, Services Delivery, Technology Solutions, Team Building, Team Mentoring, Executive Presentations, Business, Sales, Cloud Computing, Competitive Analysis, Flash Memory, Business Intelligence, Professional Services, Program Management, Strategy, Business Development, Management, CRM, Strategic Partnerships, Start-ups, Business Analysis, Semiconductors, Cross-functional Team..., SaaS, Flash, Go-to-market Strategy, Leadership, Storage, Agile Methodologies
Education
NC State 1990 — 1994
Ph.D., Electrical Engineering
IIT Kanpur 1984 — 1988
Bachelor of Technology (B.Tech.)
Kendriya Vidyalaya 1976 — 1984
Wilsin Gosti's Cadence Design Systems Experience July 2006 - November 2007
Job Software Engineer at Google
Industry Semiconductors
Experience
Google January 2014 - Present
Synopsys March 2013 - January 2014
Google June 2011 - March 2013
Synopsys November 2007 - May 2011
Cadence Design Systems July 2006 - November 2007
Verdi Timing Solutions July 2005 - June 2006
Cadence Design Systems December 2002 - March 2005
SiPackets September 2001 - December 2002
Jasmine Networks January 2001 - August 2001
Digital Equipment Corporation 1990 - 1994
Skills
EDA
Education
University of California, Berkeley 1994 — 2000
PhD
Iowa State University 1989 — 1990
MS, Computer Engineering
University of Louisiana at Lafayette 1985 — 1988
BS, Electrical Engineering
University of Southwestern Louisiana 1985 — 1988
BS, Electrical Engineering
Google January 2014 - Present
Synopsys March 2013 - January 2014
Google June 2011 - March 2013
Synopsys November 2007 - May 2011
Cadence Design Systems July 2006 - November 2007
Verdi Timing Solutions July 2005 - June 2006
Cadence Design Systems December 2002 - March 2005
SiPackets September 2001 - December 2002
Jasmine Networks January 2001 - August 2001
Digital Equipment Corporation 1990 - 1994
Skills
EDA
Education
University of California, Berkeley 1994 — 2000
PhD
Iowa State University 1989 — 1990
MS, Computer Engineering
University of Louisiana at Lafayette 1985 — 1988
BS, Electrical Engineering
University of Southwestern Louisiana 1985 — 1988
BS, Electrical Engineering
Debshankar Saha's Cadence Design Systems Experience June 2015 - Present
Job Digital Physical Design, Staff Solutions , Strategic Accounts at Cadence Design Systems
Industry Computer Hardware
Experience
Cadence Design Systems June 2015 - Present
Mentor Graphics Corporation January 2012 - Present
Mentor Graphics January 2011 - Present
Mentor Graphics Corporation January 2011 - Present
Atoptech April 2010 - January 2011
Atoptech Inc April 2010 - December 2010
Cadence Design Systems Inc. May 1998 - May 2010
AE January 2001 - April 2010
Cadence Design Systems I Pvt. Ltd. January 1998 - January 2001
ST Micro 1998 - 2000
Skills
EDA, ASIC, SoC, Clock Tree Synthesis, Physical Design, Static Timing Analysis, TCL, Timing Closure, Semiconductors, VLSI, IC, Cadence, Microprocessors, Cross-functional Team..., Place & Route, Parasitic Extraction, Timing, Perl, Low-power Design, Verilog, Integrated Circuit..., Simulations, Functional Verification, RTL design, Debugging, FPGA, SystemVerilog, Processors, Mixed Signal, ARM, Signal Integrity, Computer Architecture, Logic Synthesis, DFT, VHDL, Embedded Systems, Analog, Power Management, CMOS, ModelSim, Hardware Architecture, Circuit Design, Analog Circuit Design, RTL Design
Education
Jadavpur University 1984 — 1988
BE, Electronics & Telecommunication Engg
Cadence Design Systems June 2015 - Present
Mentor Graphics Corporation January 2012 - Present
Mentor Graphics January 2011 - Present
Mentor Graphics Corporation January 2011 - Present
Atoptech April 2010 - January 2011
Atoptech Inc April 2010 - December 2010
Cadence Design Systems Inc. May 1998 - May 2010
AE January 2001 - April 2010
Cadence Design Systems I Pvt. Ltd. January 1998 - January 2001
ST Micro 1998 - 2000
Skills
EDA, ASIC, SoC, Clock Tree Synthesis, Physical Design, Static Timing Analysis, TCL, Timing Closure, Semiconductors, VLSI, IC, Cadence, Microprocessors, Cross-functional Team..., Place & Route, Parasitic Extraction, Timing, Perl, Low-power Design, Verilog, Integrated Circuit..., Simulations, Functional Verification, RTL design, Debugging, FPGA, SystemVerilog, Processors, Mixed Signal, ARM, Signal Integrity, Computer Architecture, Logic Synthesis, DFT, VHDL, Embedded Systems, Analog, Power Management, CMOS, ModelSim, Hardware Architecture, Circuit Design, Analog Circuit Design, RTL Design
Education
Jadavpur University 1984 — 1988
BE, Electronics & Telecommunication Engg
Jayadev Velagandula's Cadence Design Systems Experience June 2007 - December 2007
Job Senior Staff Engineer at Broadcom
Industry Computer Hardware
Experience
Broadcom January 2012 - Present
Emulex/Server Engines April 2009 - December 2011
Emulex January 2008 - March 2009
Cadence Design Systems June 2007 - December 2007
VEDA IIT 2006 - 2006
Education
San Jose State University 2007 — 2008
Jawaharlal Nehru Technological University
University of Alabama in Huntsville
Broadcom January 2012 - Present
Emulex/Server Engines April 2009 - December 2011
Emulex January 2008 - March 2009
Cadence Design Systems June 2007 - December 2007
VEDA IIT 2006 - 2006
Education
San Jose State University 2007 — 2008
Jawaharlal Nehru Technological University
University of Alabama in Huntsville
Duffy Schneider's Cadence Design Systems Experience 1996 - 2006
Job Regional Sales Manager at QualiSystems
Industry Computer Software
Experience
QualiSystems July 2010 - Present
CoWare January 2007 - March 2010
Cadence Design Systems 1996 - 2006
Teradyne Inc., Connection Systems Division January 1985 - December 1995
Skills
EDA, Start-ups, Hardware, Development Tools, Electronics, Professional Services, Test Automation...
Education
Linfield College 1975 — 1978
BA - Business, Business Administration and Management, General
QualiSystems July 2010 - Present
CoWare January 2007 - March 2010
Cadence Design Systems 1996 - 2006
Teradyne Inc., Connection Systems Division January 1985 - December 1995
Skills
EDA, Start-ups, Hardware, Development Tools, Electronics, Professional Services, Test Automation...
Education
Linfield College 1975 — 1978
BA - Business, Business Administration and Management, General
Jeffrey Chung's Cadence Design Systems Experience October 2013 - Present
Job Senior Marketing Manager at Cadence Design Systems
Industry Computer Hardware
Experience
Cadence Design Systems October 2013 - Present
Silego Technology June 2008 - October 2013
Qimonda 2004 - 2008
Qimonda North America, US 2004 - 2008
Hynix Semiconductor 1997 - 2004
Skills
IC, Semiconductor Industry, Semiconductors, Mixed Signal, Technical Marketing, CMOS, DRAM, Hardware Architecture, Failure Analysis, Flash Memory, Electronics, Product Engineering, FPGA, Analog, Signal Integrity, PCB design, ASIC, Power Management, Programming, Programming Languages, C, Microsoft Office, Microsoft Excel, Visual Basic, PowerPoint, FrameMaker, Python, Perl
Education
고려대학교 / Korea University
Cadence Design Systems October 2013 - Present
Silego Technology June 2008 - October 2013
Qimonda 2004 - 2008
Qimonda North America, US 2004 - 2008
Hynix Semiconductor 1997 - 2004
Skills
IC, Semiconductor Industry, Semiconductors, Mixed Signal, Technical Marketing, CMOS, DRAM, Hardware Architecture, Failure Analysis, Flash Memory, Electronics, Product Engineering, FPGA, Analog, Signal Integrity, PCB design, ASIC, Power Management, Programming, Programming Languages, C, Microsoft Office, Microsoft Excel, Visual Basic, PowerPoint, FrameMaker, Python, Perl
Education
고려대학교 / Korea University
Bob Pecquet's Cadence Design Systems Experience March 2004 - Present
Job Sr Member of Consulting Staff at Cadence Design Systems
Industry Education Management
Experience
Cadence Design Systems March 2004 - Present
Cadence 2004 - Present
Skills
c++, QT (GUI), C++
Education
Louisiana State University and Agricultural and Mechanical College 1979 — 1985
MS, Civil Engineering
Cadence Design Systems March 2004 - Present
Cadence 2004 - Present
Skills
c++, QT (GUI), C++
Education
Louisiana State University and Agricultural and Mechanical College 1979 — 1985
MS, Civil Engineering
Anna Paganelli's Cadence Design Systems Experience 2003 - 2007
Job Psychotherapist
Industry Mental Health Care
Experience
Anna Paganelli, MFT 2006 - Present
WomenCARE May 2009 - May 2012
Bedford, Freeman & Worth Publishing Group 2002 - 2011
The Council of Economic Advisers 2006 - 2009
Cadence Design Systems 2003 - 2007
ASML 1997 - 2002
Silicon Valley Group 1999 - 2000
Skills
Psychotherapy, Editing, Writing, Mental Health, Psychology, Stress Management, Copy Editing, Counseling Psychology, Mental Health Counseling, Self-esteem, Family Therapy, Personal Development, Young Adults, Teaching, Group Therapy, Mindfulness, Nonprofits
Education
John F. Kennedy University 1999 — 2002
MA, Counseling Psychology
University of California, Santa Cruz 1985 — 1989
BA, American Studies
Anna Paganelli, MFT 2006 - Present
WomenCARE May 2009 - May 2012
Bedford, Freeman & Worth Publishing Group 2002 - 2011
The Council of Economic Advisers 2006 - 2009
Cadence Design Systems 2003 - 2007
ASML 1997 - 2002
Silicon Valley Group 1999 - 2000
Skills
Psychotherapy, Editing, Writing, Mental Health, Psychology, Stress Management, Copy Editing, Counseling Psychology, Mental Health Counseling, Self-esteem, Family Therapy, Personal Development, Young Adults, Teaching, Group Therapy, Mindfulness, Nonprofits
Education
John F. Kennedy University 1999 — 2002
MA, Counseling Psychology
University of California, Santa Cruz 1985 — 1989
BA, American Studies
Hoe-Hin Ong's Cadence Design Systems Experience October 2014 - Present
Job Product Engineer at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems October 2014 - Present
Broadcom March 2013 - September 2014
Broadcom October 2010 - March 2013
Magma Design Automation October 2004 - October 2010
Skills
Physical Design, Parasitic Extraction, Static Timing Analysis, SoC, TCL, Timing Closure, ASIC, EDA, IC, Low-power Design, VLSI, RTL design, Primetime, Integrated Circuit..., Semiconductors
Education
Mississippi State University 2001 — 2003
MS, Electrical Engineering
Louisiana State University 1999 — 2001
BS, Electrical Engineering
Cadence Design Systems October 2014 - Present
Broadcom March 2013 - September 2014
Broadcom October 2010 - March 2013
Magma Design Automation October 2004 - October 2010
Skills
Physical Design, Parasitic Extraction, Static Timing Analysis, SoC, TCL, Timing Closure, ASIC, EDA, IC, Low-power Design, VLSI, RTL design, Primetime, Integrated Circuit..., Semiconductors
Education
Mississippi State University 2001 — 2003
MS, Electrical Engineering
Louisiana State University 1999 — 2001
BS, Electrical Engineering
David Brantley's Cadence Design Systems Experience October 1990 - February 1994
Job Contractor at Samsung
Industry Semiconductors
Experience
Samsung March 2013 - Present
Northrop Grumman Corporation March 2012 - November 2012
Microtune/Zoran/CSR September 2005 - February 2012
LSI Corporation July 2001 - September 2005
STMicroelectronics May 1999 - July 2001
Dallas Semiconductor February 1994 - April 1999
Cadence Design Systems October 1990 - February 1994
Skills
DRC, LVS, Parasitic Extraction, Cadence Virtuoso, Static Timing Analysis, Timing Closure, EDA, Floorplanning, Programming, CAD, Physical Verification, Cadence Skill, ASIC, Cadence
Education
University of Tennessee Space Institute 1976 — 1978
MS, CS/EE
David Lipscomb University 1972 — 1976
BS, Math/Physics
Samsung March 2013 - Present
Northrop Grumman Corporation March 2012 - November 2012
Microtune/Zoran/CSR September 2005 - February 2012
LSI Corporation July 2001 - September 2005
STMicroelectronics May 1999 - July 2001
Dallas Semiconductor February 1994 - April 1999
Cadence Design Systems October 1990 - February 1994
Skills
DRC, LVS, Parasitic Extraction, Cadence Virtuoso, Static Timing Analysis, Timing Closure, EDA, Floorplanning, Programming, CAD, Physical Verification, Cadence Skill, ASIC, Cadence
Education
University of Tennessee Space Institute 1976 — 1978
MS, CS/EE
David Lipscomb University 1972 — 1976
BS, Math/Physics
Dean Papadopoulos's Cadence Design Systems Experience 1999 - 2003
Job Principal engineer at Foliage
Industry Computer Software
Experience
Foliage 2004 - Present
Philips Medical Systems January 2004 - September 2004
Cadence Design Systems 1999 - 2003
Schneider Automation 1990 - 1999
Computrol 1980 - 1990
Skills
Software Development, Linux, Embedded Systems, C++, Embedded Software, Agile Methodologies, Program Management, Architecture, C, Windows, XML, Testing, Requirements Analysis
Education
Marist College 1984 — 1987
MS, Computer Science
Keene State College 1974 — 1976
BS, Mathematics
Wayne Valley HS
Foliage 2004 - Present
Philips Medical Systems January 2004 - September 2004
Cadence Design Systems 1999 - 2003
Schneider Automation 1990 - 1999
Computrol 1980 - 1990
Skills
Software Development, Linux, Embedded Systems, C++, Embedded Software, Agile Methodologies, Program Management, Architecture, C, Windows, XML, Testing, Requirements Analysis
Education
Marist College 1984 — 1987
MS, Computer Science
Keene State College 1974 — 1976
BS, Mathematics
Wayne Valley HS
Anindya Sarkar's Cadence Design Systems Experience June 2006 - Present
Job Engineer at Cadence Design Systems
Industry Electrical/Electronic Manufacturing
Experience
Cadence Design Systems June 2006 - Present
Intel Corporation August 2005 - June 2006
CMC Limited June 1981 - July 2005
Skills
ASIC, Semiconductors, EDA, Verilog, SoC
Education
Jadavpur University 1976 — 1981
Cadence Design Systems June 2006 - Present
Intel Corporation August 2005 - June 2006
CMC Limited June 1981 - July 2005
Skills
ASIC, Semiconductors, EDA, Verilog, SoC
Education
Jadavpur University 1976 — 1981
Manohar Kamath's Cadence Design Systems Experience 2005 - 2008
Job Team Leader at Aztecsoft
Industry Information Technology and Services
Experience
Aztecsoft Team LeaderAztec Software2005 - Present
Cadence Design Systems 2005 - 2008
USAS 2003 - 2005
Education
Manipal Institute of Technology 1994 — 1998
Aztecsoft Team LeaderAztec Software2005 - Present
Cadence Design Systems 2005 - 2008
USAS 2003 - 2005
Education
Manipal Institute of Technology 1994 — 1998
Jagjot Kaur's Cadence Design Systems Experience August 2015 - Present
Job Principal Application Engineer at Cadence Design Systems
Industry Electrical/Electronic Manufacturing
Experience
Cadence Design Systems August 2015 - Present
Cadence Design Systems August 2011 - Present
Qualcomm India Pvt. Ltd. February 2010 - August 2011
Texas Instruments September 2008 - February 2010
Freescale Semiconductor July 2006 - September 2008
Skills
Verilog, NCSim, Embedded Systems, SoC, DFT, ASIC, EDA, ARM, ModelSim, VLSI
Education
Thapar University, Patiala 2002 — 2006
Electronics and Communication Engineering
Thapar Institute of Engineering and Technology
Cadence Design Systems August 2015 - Present
Cadence Design Systems August 2011 - Present
Qualcomm India Pvt. Ltd. February 2010 - August 2011
Texas Instruments September 2008 - February 2010
Freescale Semiconductor July 2006 - September 2008
Skills
Verilog, NCSim, Embedded Systems, SoC, DFT, ASIC, EDA, ARM, ModelSim, VLSI
Education
Thapar University, Patiala 2002 — 2006
Electronics and Communication Engineering
Thapar Institute of Engineering and Technology
Jushan Xie's Cadence Design Systems Experience February 1999 - Present
Job Engineering Director, Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems February 1999 - Present
Skills
ASIC, IC, Semiconductors, SoC, Verilog, TCL, Mixed Signal, VLSI, Simulations, Debugging, Perl, Physical Design, EDA, CMOS, Matlab, Software Development, Cadence Virtuoso, Functional Verification, Analog Circuit Design, Analog, RTL design, Integrated Circuit..., Static Timing Analysis, Timing Closure
Education
Louisiana Tech University 1997 — 1999
Doctor of Philosophy (PhD), Applied Mathematics
University of Saarland 1991 — 1996
Doctor of Philosophy (Ph.D.), Engineering Physics
Nankai University 1981 — 1988
Master of Science (MS), Physics
DAAD
Cadence Design Systems February 1999 - Present
Skills
ASIC, IC, Semiconductors, SoC, Verilog, TCL, Mixed Signal, VLSI, Simulations, Debugging, Perl, Physical Design, EDA, CMOS, Matlab, Software Development, Cadence Virtuoso, Functional Verification, Analog Circuit Design, Analog, RTL design, Integrated Circuit..., Static Timing Analysis, Timing Closure
Education
Louisiana Tech University 1997 — 1999
Doctor of Philosophy (PhD), Applied Mathematics
University of Saarland 1991 — 1996
Doctor of Philosophy (Ph.D.), Engineering Physics
Nankai University 1981 — 1988
Master of Science (MS), Physics
DAAD
John Rusterholz's Cadence Design Systems Experience 1995 - 1999
Job Happily Retired
Industry Broadcast Media
Experience
CTV North Suburbs 1989 - Present
Unisys 1973 - 2008
Cadence Design Systems 1995 - 1999
Skills
Software Documentation, Microsoft Office, Customer Service, Editing, Microsoft Excel, Debugging, TCL, C, Requirements Analysis, Software Development, Video, Computer Hardware, Unix, Hardware Architecture, Enterprise Architecture, Video Production, Strategic Planning, Project Planning, Program Management, Software Engineering
Education
University of Wisconsin-Madison 1967 — 1969
M.S., Electrical Engineering
Macalester College 1963 — 1967
BA, Physics and Math
CTV North Suburbs 1989 - Present
Unisys 1973 - 2008
Cadence Design Systems 1995 - 1999
Skills
Software Documentation, Microsoft Office, Customer Service, Editing, Microsoft Excel, Debugging, TCL, C, Requirements Analysis, Software Development, Video, Computer Hardware, Unix, Hardware Architecture, Enterprise Architecture, Video Production, Strategic Planning, Project Planning, Program Management, Software Engineering
Education
University of Wisconsin-Madison 1967 — 1969
M.S., Electrical Engineering
Macalester College 1963 — 1967
BA, Physics and Math
Srinivas Kotamreddy's Cadence Design Systems Experience November 2001 - March 2004
Job Director of Software Engineering
Industry Computer Software
Experience
Salesforce.com February 2010 - Present
CA June 2009 - February 2010
Billeo September 2008 - March 2009
Intuit March 2004 - September 2008
Cadence Design Systems November 2001 - March 2004
Sunup Design Systems 1997 - 2001
SunUp Digital Systems 1997 - 2001
Skills
Agile, Scrum, Automation, Software Development, SaaS, PaaS, Quality Engineering, Distributed Systems, Performance Testing, Cloud Computing, Management, Team Building, Mobile Devices, Test Automation for..., Agile Methodologies, Scalability, SDLC, Integration, Testing, Quality Assurance
Education
Koneru Lakshmaiah College of Engineering 1988 — 1992
Bachelor of Technology, Computer Science and Engineering
Salesforce.com February 2010 - Present
CA June 2009 - February 2010
Billeo September 2008 - March 2009
Intuit March 2004 - September 2008
Cadence Design Systems November 2001 - March 2004
Sunup Design Systems 1997 - 2001
SunUp Digital Systems 1997 - 2001
Skills
Agile, Scrum, Automation, Software Development, SaaS, PaaS, Quality Engineering, Distributed Systems, Performance Testing, Cloud Computing, Management, Team Building, Mobile Devices, Test Automation for..., Agile Methodologies, Scalability, SDLC, Integration, Testing, Quality Assurance
Education
Koneru Lakshmaiah College of Engineering 1988 — 1992
Bachelor of Technology, Computer Science and Engineering
Gabrielle Walker's Cadence Design Systems Experience December 2003 - February 2011
Job Senior Counsel Commercial
Industry Computer Software
Experience
Marketo October 2014 - Present
VMware April 2013 - September 2014
Business Integrity, Inc. August 2011 - February 2013
Cadence Design Systems December 2003 - February 2011
Gray Cary Ware & Freidenrich 2000 - 2003
White & Lee LLP 1997 - 2000
Keesal, Young & Logan 1993 - 1997
Skills
Licensing, Software Licensing, Contract Negotiation, Intellectual Property, Contract Management, Leadership, Business Strategy, Copyright Law, Management, Trade Secrets, Data Privacy, Start-ups, Litigation, Trademarks, Corporate Law, Employment Law, Joint Ventures, Negotiation, Cross-functional Team..., Legal Writing, Legal Research, Enterprise Software
Education
John F. Kennedy University 1990 — 1993
Juris Doctor
Marketo October 2014 - Present
VMware April 2013 - September 2014
Business Integrity, Inc. August 2011 - February 2013
Cadence Design Systems December 2003 - February 2011
Gray Cary Ware & Freidenrich 2000 - 2003
White & Lee LLP 1997 - 2000
Keesal, Young & Logan 1993 - 1997
Skills
Licensing, Software Licensing, Contract Negotiation, Intellectual Property, Contract Management, Leadership, Business Strategy, Copyright Law, Management, Trade Secrets, Data Privacy, Start-ups, Litigation, Trademarks, Corporate Law, Employment Law, Joint Ventures, Negotiation, Cross-functional Team..., Legal Writing, Legal Research, Enterprise Software
Education
John F. Kennedy University 1990 — 1993
Juris Doctor
Anuradha Srinivasan's Cadence Design Systems Experience 1999 - 2000
Job Software Engineer
Industry Computer Software
Experience
Dassault Systemes February 2008 - August 2009
Alcatel Lucent February 2000 - January 2001
Cadence Design Systems 1999 - 2000
Cisco Systems June 1999 - September 1999
Superex Polymers inc., Waltham, MA October 1995 - August 1996
Tata Motors 1993 - 1995
Education
University of California, Santa Barbara 1997 — 1999
MS, Computer Science
Maharashtra Institute of Technology 1989 — 1993
BS, Polymer Engineering
Vidya Bhavan, Pune 1985 — 1989
High School
Dassault Systemes February 2008 - August 2009
Alcatel Lucent February 2000 - January 2001
Cadence Design Systems 1999 - 2000
Cisco Systems June 1999 - September 1999
Superex Polymers inc., Waltham, MA October 1995 - August 1996
Tata Motors 1993 - 1995
Education
University of California, Santa Barbara 1997 — 1999
MS, Computer Science
Maharashtra Institute of Technology 1989 — 1993
BS, Polymer Engineering
Vidya Bhavan, Pune 1985 — 1989
High School
Xin Zheng's Cadence Design Systems Experience September 2012 - Present
Job Customer Engagement Sr. Manager at Cadence Design Systems
Industry Electrical/Electronic Manufacturing
Experience
Cadence Design Systems September 2012 - Present
Synopsys April 2008 - September 2012
Skills
Semiconductors, EDA, IC, Software Engineering, Debugging
Education
The University of Texas at Austin 2000 — 2007
M.S. & Ph.D, Electrical Engineering
Iowa State University 1998 — 2000
Ph.D qualified, Physics
Peking University 1993 — 1997
B.S., Physics
Wugang No 3 Middle School 1990 — 1993
high school
Wuhan Foreign language school 1987 — 1990
middle school
Cadence Design Systems September 2012 - Present
Synopsys April 2008 - September 2012
Skills
Semiconductors, EDA, IC, Software Engineering, Debugging
Education
The University of Texas at Austin 2000 — 2007
M.S. & Ph.D, Electrical Engineering
Iowa State University 1998 — 2000
Ph.D qualified, Physics
Peking University 1993 — 1997
B.S., Physics
Wugang No 3 Middle School 1990 — 1993
high school
Wuhan Foreign language school 1987 — 1990
middle school
Aakash Chugh's Cadence Design Systems Experience July 2015 - Present
Job Lead Product Engineer at Cadence Design Systems
Industry Computer Hardware
Experience
Cadence Design Systems July 2015 - Present
Cadence Design Systems February 2015 - June 2015
Cadence Design Systems July 2014 - February 2015
Cadence Design Systems February 2013 - July 2014
Carnegie Mellon University August 2012 - December 2012
Akustica June 2012 - August 2012
Carnegie Mellon University February 2012 - May 2012
Honeywell Technology Solutions Laboratory January 2011 - May 2011
Skills
Verilog, VLSI CAD, Low-power Design, VLSI, RTL design, CPF, IEEE1801, Conformal, VHDL, Matlab, Simulations, Java, ModelSim, C++, Electronics, Perl, TCL, EDA
Education
Carnegie Mellon University 2011 — 2012
Master of Science (MS), Electrical and Computer Engineering
Manipal Institute of Technology 2007 — 2011
Bachelor of Technology (B.Tech.), Electronics and Communications Engineering
Cadence Design Systems July 2015 - Present
Cadence Design Systems February 2015 - June 2015
Cadence Design Systems July 2014 - February 2015
Cadence Design Systems February 2013 - July 2014
Carnegie Mellon University August 2012 - December 2012
Akustica June 2012 - August 2012
Carnegie Mellon University February 2012 - May 2012
Honeywell Technology Solutions Laboratory January 2011 - May 2011
Skills
Verilog, VLSI CAD, Low-power Design, VLSI, RTL design, CPF, IEEE1801, Conformal, VHDL, Matlab, Simulations, Java, ModelSim, C++, Electronics, Perl, TCL, EDA
Education
Carnegie Mellon University 2011 — 2012
Master of Science (MS), Electrical and Computer Engineering
Manipal Institute of Technology 2007 — 2011
Bachelor of Technology (B.Tech.), Electronics and Communications Engineering
Elias Kougianos's Cadence Design Systems Experience 2000 - 2004
Job Associate Professor at University of North Texas
Industry Semiconductors
Experience
University of North Texas January 2004 - Present
Cadence Design Systems 2000 - 2004
Texas Instruments 1989 - 1998
Education
Louisiana State University 1991 — 1997
PhD, Electrical Engineering
St. Paul
University of North Texas January 2004 - Present
Cadence Design Systems 2000 - 2004
Texas Instruments 1989 - 1998
Education
Louisiana State University 1991 — 1997
PhD, Electrical Engineering
St. Paul
Tracey Mendoza's Cadence Design Systems Experience July 2000 - August 2002
Job Finance Consultant at Various Public Companies
Industry Semiconductors
Experience
Symantec April 2011 - August 2011
Smart Modular Technologies March 2008 - August 2009
Virage Logic Corporation February 2007 - March 2008
Palm August 2005 - February 2007
Spansion November 2003 - August 2005
Cadence Design Systems July 2000 - August 2002
Education
Louisiana State University 1990 — 1994
BS, Accounting
Symantec April 2011 - August 2011
Smart Modular Technologies March 2008 - August 2009
Virage Logic Corporation February 2007 - March 2008
Palm August 2005 - February 2007
Spansion November 2003 - August 2005
Cadence Design Systems July 2000 - August 2002
Education
Louisiana State University 1990 — 1994
BS, Accounting
Umar Salahuddin's Cadence Design Systems Experience 2001 - 2003
Job Associate Director at Biogen Idec
Industry Biotechnology
Experience
Biogen Idec January 2014 - Present
Barris Lotterer Management Consulting July 2013 - December 2013
Liberty Mutual Group April 2011 - June 2013
Barris Lotterer Management Consulting 2007 - 2011
Barris Lotterer Management Consulting 2003 - 2007
Cadence Design Systems 2001 - 2003
Skills
Management Consulting, Business Process..., Cross-functional Team..., Operational Excellence, Product Management, Change Management, Program Management, Six Sigma, Lean Manufacturing, Strategic Planning, Business Strategy, Process Improvement, Product Lifecycle..., Process Engineering, Business Analysis, Business Intelligence, Strategy, Project Management, Continuous Improvement, Start-ups
Education
The University of Western Ontario - Richard Ivey School of Business 1999 — 2001
Master of Business Administration (M.B.A.), Strategy, Marketing
The University of British Columbia 1990 — 1995
Bachelor's Degree, Mechanical Engineering
Biogen Idec January 2014 - Present
Barris Lotterer Management Consulting July 2013 - December 2013
Liberty Mutual Group April 2011 - June 2013
Barris Lotterer Management Consulting 2007 - 2011
Barris Lotterer Management Consulting 2003 - 2007
Cadence Design Systems 2001 - 2003
Skills
Management Consulting, Business Process..., Cross-functional Team..., Operational Excellence, Product Management, Change Management, Program Management, Six Sigma, Lean Manufacturing, Strategic Planning, Business Strategy, Process Improvement, Product Lifecycle..., Process Engineering, Business Analysis, Business Intelligence, Strategy, Project Management, Continuous Improvement, Start-ups
Education
The University of Western Ontario - Richard Ivey School of Business 1999 — 2001
Master of Business Administration (M.B.A.), Strategy, Marketing
The University of British Columbia 1990 — 1995
Bachelor's Degree, Mechanical Engineering
McKinnis, Steve's Cadence Design Systems Experience 1999 - 2009
Job EDA Manager TI Tucson at Texas Instruments
Industry Electrical/Electronic Manufacturing
Experience
Texas Instruments February 1999 - Present
Cadence Design Systems 1999 - 2009
Burr-Brown February 1999 - 2001
Motorola Semiconductor 1984 - 1998
Motorola (Freescale) 1983 - 1998
Nippon Motorola Ltd 1989 - 1994
Skills
Mixed Signal, Semiconductors, EDA, IC, SoC, Cadence, Analog, Integrated Circuit..., ASIC, Analog Circuit Design, Physical Design, Verilog, CMOS, Linux, Static Timing Analysis, VLSI, RTL design, SPICE, Power Management, Circuit Design, Microprocessors, Digital Signal..., VHDL, Processors, Simulations, Debugging, Semiconductor Industry, Electronics, Silicon, Cadence Virtuoso, Microelectronics, Perl, Functional Verification, TCL, Hardware Architecture, FPGA, ARM, ModelSim, Microcontrollers, SystemVerilog, Embedded Systems, PCB design, Embedded Software, Xilinx, Computer Architecture
Education
University of Minnesota-Twin Cities 1979 — 1983
MSEE, Electrical Engineering
Kansas State University 1970 — 1975
BSEE, Electrical Engineering
Texas Instruments February 1999 - Present
Cadence Design Systems 1999 - 2009
Burr-Brown February 1999 - 2001
Motorola Semiconductor 1984 - 1998
Motorola (Freescale) 1983 - 1998
Nippon Motorola Ltd 1989 - 1994
Skills
Mixed Signal, Semiconductors, EDA, IC, SoC, Cadence, Analog, Integrated Circuit..., ASIC, Analog Circuit Design, Physical Design, Verilog, CMOS, Linux, Static Timing Analysis, VLSI, RTL design, SPICE, Power Management, Circuit Design, Microprocessors, Digital Signal..., VHDL, Processors, Simulations, Debugging, Semiconductor Industry, Electronics, Silicon, Cadence Virtuoso, Microelectronics, Perl, Functional Verification, TCL, Hardware Architecture, FPGA, ARM, ModelSim, Microcontrollers, SystemVerilog, Embedded Systems, PCB design, Embedded Software, Xilinx, Computer Architecture
Education
University of Minnesota-Twin Cities 1979 — 1983
MSEE, Electrical Engineering
Kansas State University 1970 — 1975
BSEE, Electrical Engineering
Scott Cranston's Cadence Design Systems Experience August 1989 - Present
Job SMCS at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems August 1989 - Present
Data General 1985 - 1989
Skills
Verilog, EDA, Perl, Simulations, Cadence, Mixed Signal, VHDL, Analog, Firmware, TCL, ASIC
Education
Lehigh University 1981 — 1985
BSEE, Electrical Engineering
Cadence Design Systems August 1989 - Present
Data General 1985 - 1989
Skills
Verilog, EDA, Perl, Simulations, Cadence, Mixed Signal, VHDL, Analog, Firmware, TCL, ASIC
Education
Lehigh University 1981 — 1985
BSEE, Electrical Engineering
Beshara Elmufdi's Cadence Design Systems Experience January 1999 - Present
Job Hardware Engineer at Cadence Design Systems
Industry Computer Hardware
Experience
Cadence Design Systems January 1999 - Present
Synopsys June 1999 - September 1999
Honeywell June 1996 - August 1996
Skills
R&D, EDA, Verilog, ASIC, FPGA, Simulation, VHDL, Perl
Education
Stanford University 1997 — 1999
MS, Electrical Engineering
Louisiana State University 1993 — 1997
BS, Electrical Engineering
Louisiana State University 1993 — 1997
BSEE, Computer Engineering
Cadence Design Systems January 1999 - Present
Synopsys June 1999 - September 1999
Honeywell June 1996 - August 1996
Skills
R&D, EDA, Verilog, ASIC, FPGA, Simulation, VHDL, Perl
Education
Stanford University 1997 — 1999
MS, Electrical Engineering
Louisiana State University 1993 — 1997
BS, Electrical Engineering
Louisiana State University 1993 — 1997
BSEE, Computer Engineering
Jesse Rojas Jr's Cadence Design Systems Experience May 2003 - Present
Job Sr Principal Software Engineer
Industry Semiconductors
Experience
Cadence Design Systems May 2003 - Present
Skills
Software Development, Program Management, EDA, Perl, Algorithms, Testing, Customer Service, Unix, TCL, Debugging, Object Oriented Design
Education
Lamar University 1983 — 1987
Computer Science
Cadence Design Systems May 2003 - Present
Skills
Software Development, Program Management, EDA, Perl, Algorithms, Testing, Customer Service, Unix, TCL, Debugging, Object Oriented Design
Education
Lamar University 1983 — 1987
Computer Science
Ronnie Bean's Cadence Design Systems Experience 1998 - 2005
Job Analog Design Engineer
Industry Consumer Electronics
Experience
Texas Instruments January 2015 - Present
Entergy August 2013 - January 2015
Texas Instruments December 2011 - August 2013
Texas Instruments January 2005 - December 2011
Cadence Design Systems 1998 - 2005
Skills
Audio Design, Class-D Amplifiers, PLL, Power, Mixed Signal, Sound Design, Analog, Semiconductors, CMOS, SoC, IC, Analog Circuit Design, Mixed-Signal IC Design, Sound, Integrated Circuit..., Power Management, ASIC, Cadence Virtuoso, Physical Design, Circuit Design, Low-power Design, Spectre, VLSI, DFT, EDA
Education
Oregon State University 1993 — 1995
MS, Electrical Engineering
Louisiana State University 1988 — 1993
BS, Electrical Engineering
Texas Instruments January 2015 - Present
Entergy August 2013 - January 2015
Texas Instruments December 2011 - August 2013
Texas Instruments January 2005 - December 2011
Cadence Design Systems 1998 - 2005
Skills
Audio Design, Class-D Amplifiers, PLL, Power, Mixed Signal, Sound Design, Analog, Semiconductors, CMOS, SoC, IC, Analog Circuit Design, Mixed-Signal IC Design, Sound, Integrated Circuit..., Power Management, ASIC, Cadence Virtuoso, Physical Design, Circuit Design, Low-power Design, Spectre, VLSI, DFT, EDA
Education
Oregon State University 1993 — 1995
MS, Electrical Engineering
Louisiana State University 1988 — 1993
BS, Electrical Engineering
renu kumar's Cadence Design Systems Experience March 2015 - Present
Job Principal Engineer at Cadence Design Systems, IPG DDR PHY
Industry Semiconductors
Experience
Cadence Design Systems March 2015 - Present
Encore Semi LLC May 2013 - February 2015
Qualcomm 2013 - February 2015
Qualcomm 2011 - 2013
Rapid Bridge 2009 - March 2011
KPIT Cummins Infosystems Limited March 2007 - December 2008
NEC HCL ST March 2004 - April 2007
Skills
Physical Design, ASIC, Timing Closure, VLSI, Verilog, SystemVerilog, Static Timing Analysis, EDA, Floorplanning
Education
Manipal Institute of Technology 2003 — 2004
MS
Manipal University 2002 — 2004
MS vlsi cad, vlsi design
Kuvempu Vishwavidyanilaya 1997 — 2001
BE
Cadence Design Systems March 2015 - Present
Encore Semi LLC May 2013 - February 2015
Qualcomm 2013 - February 2015
Qualcomm 2011 - 2013
Rapid Bridge 2009 - March 2011
KPIT Cummins Infosystems Limited March 2007 - December 2008
NEC HCL ST March 2004 - April 2007
Skills
Physical Design, ASIC, Timing Closure, VLSI, Verilog, SystemVerilog, Static Timing Analysis, EDA, Floorplanning
Education
Manipal Institute of Technology 2003 — 2004
MS
Manipal University 2002 — 2004
MS vlsi cad, vlsi design
Kuvempu Vishwavidyanilaya 1997 — 2001
BE
Singla Monika's Cadence Design Systems Experience September 2000 - February 2001
Job Freelancer Hadoop
Industry Computer Software
Experience
Cognizant May 2014 - August 2014
SOS April 2012 - March 2014
Computer Task Group March 2001 - August 2011
Cadence Design Systems September 2000 - February 2001
PCL Mindware July 1997 - April 2000
Skills
Requirements Analysis, SQL, Java, Microsoft SQL Server, Software Development, Core Java, Scala, Hadoop, YARN, Pig, Flume, Hive, Impala, Spark, Kafka, C,Unix, Socket Programming, Multithreaded..., Oozie, MongoDB, Sqoop, Oracle, Sybase, Informix, SDLC, Big Data, Agile Methodologies, Unix, Linux
Education
Kurukshetra University 1994 — 1997
Master of Computer Applications (MCA), Computer Science
Masters in Computer Application Kurukshetra University Kurukshetra
Masters, Computers, 3.8
Cognizant May 2014 - August 2014
SOS April 2012 - March 2014
Computer Task Group March 2001 - August 2011
Cadence Design Systems September 2000 - February 2001
PCL Mindware July 1997 - April 2000
Skills
Requirements Analysis, SQL, Java, Microsoft SQL Server, Software Development, Core Java, Scala, Hadoop, YARN, Pig, Flume, Hive, Impala, Spark, Kafka, C,Unix, Socket Programming, Multithreaded..., Oozie, MongoDB, Sqoop, Oracle, Sybase, Informix, SDLC, Big Data, Agile Methodologies, Unix, Linux
Education
Kurukshetra University 1994 — 1997
Master of Computer Applications (MCA), Computer Science
Masters in Computer Application Kurukshetra University Kurukshetra
Masters, Computers, 3.8
Yanheng Zhang's Cadence Design Systems Experience 2011 - 2014
Job _
Industry Computer Software
Experience
Oracle 2014 - Present
Cadence Design Systems 2011 - 2014
Education
Iowa State University
Ph.D., Computer Engineering
Oracle 2014 - Present
Cadence Design Systems 2011 - 2014
Education
Iowa State University
Ph.D., Computer Engineering
Zahid Ahsanullah's Cadence Design Systems Experience September 2013 - Present
Job STA Backend and Circuit Design
Industry Semiconductors
Experience
Cadence Design Systems September 2013 - Present
Austin Silicon Incorporated January 2012 - September 2013
COINLAB January 2013 - March 2013
AMD January 2012 - August 2012
Intel Corporation January 2008 - January 2012
Austin Silicon March 2001 - September 2008
Intrinsity Incorporated January 2007 - January 2008
Intel Corporation January 2006 - July 2006
Coherent Logix January 2005 - January 2006
AMD January 2004 - November 2004
Skills
Verilog, Static Timing Analysis, Physical Design, EDA, Low-power Design, TCL, Timing Closure, ModelSim, Primetime, Logic Synthesis, Debugging, VHDL, SPICE, Analog, Embedded Systems, Processors, Formal Verification, Circuit Design, LVS, Floorplanning, Semiconductors, USB, Power Management, PLL
Education
MSEE University Of Texas at Austin
Master's degree, Electrical and Electronics Engineering
University of Karachi
Master of Science (MSc), Physics
University of Karachi
Bachelor of Science (BSc), Physics
Cadence Design Systems September 2013 - Present
Austin Silicon Incorporated January 2012 - September 2013
COINLAB January 2013 - March 2013
AMD January 2012 - August 2012
Intel Corporation January 2008 - January 2012
Austin Silicon March 2001 - September 2008
Intrinsity Incorporated January 2007 - January 2008
Intel Corporation January 2006 - July 2006
Coherent Logix January 2005 - January 2006
AMD January 2004 - November 2004
Skills
Verilog, Static Timing Analysis, Physical Design, EDA, Low-power Design, TCL, Timing Closure, ModelSim, Primetime, Logic Synthesis, Debugging, VHDL, SPICE, Analog, Embedded Systems, Processors, Formal Verification, Circuit Design, LVS, Floorplanning, Semiconductors, USB, Power Management, PLL
Education
MSEE University Of Texas at Austin
Master's degree, Electrical and Electronics Engineering
University of Karachi
Master of Science (MSc), Physics
University of Karachi
Bachelor of Science (BSc), Physics
Kshitiz Arora's Cadence Design Systems Experience January 2005 - November 2006
Job Design Enablement, Physical Verification CAD
Industry Semiconductors
Experience
GLOBALFOUNDRIES September 2014 - Present
Qualcomm January 2013 - August 2014
Freescale Semiconductor November 2006 - January 2013
Cadence Design Systems January 2005 - November 2006
Skills
LVS, PERC, Calibre, Parasitic Extraction, QRC, Cadence Virtuoso, Perl, TCL, Skill, Global collaboration, Physical Verification, Physical Design, IC, PDK Development, ASIC, EDA, Mixed Signal, Cadence, Analog, VLSI, CMOS, Debugging, Virtuoso
Education
Institute Of Technology And Management 2000 — 2004
B.E, Electronics and Communication
GLOBALFOUNDRIES September 2014 - Present
Qualcomm January 2013 - August 2014
Freescale Semiconductor November 2006 - January 2013
Cadence Design Systems January 2005 - November 2006
Skills
LVS, PERC, Calibre, Parasitic Extraction, QRC, Cadence Virtuoso, Perl, TCL, Skill, Global collaboration, Physical Verification, Physical Design, IC, PDK Development, ASIC, EDA, Mixed Signal, Cadence, Analog, VLSI, CMOS, Debugging, Virtuoso
Education
Institute Of Technology And Management 2000 — 2004
B.E, Electronics and Communication
Raja Kanagala's Cadence Design Systems Experience April 2012 - Present
Job
Industry Computer Hardware
Experience
Cadence Design Systems April 2012 - Present
Skills
Physical Design, Physical Verification, Timing Closure, EDA, ASIC, TCL, Floorplanning, SoC, DRC, IC, LVS, Static Timing Analysis, Timing, Signal Integrity, VLSI, Perl, Clock Tree Synthesis, Parasitic Extraction, Low Power Design, Cadence Virtuoso, Routing, Low-power Design, Logic Synthesis, CMOS, Microprocessors
Education
San Jose State University 1996 — 1997
M.S, EE
Louisiana Tech University 1995 — 1996
M.S, EE
Osmania University 1991 — 1995
Engineering, Electronics & Communications
Kendriya Vidyalaya
Cadence Design Systems April 2012 - Present
Skills
Physical Design, Physical Verification, Timing Closure, EDA, ASIC, TCL, Floorplanning, SoC, DRC, IC, LVS, Static Timing Analysis, Timing, Signal Integrity, VLSI, Perl, Clock Tree Synthesis, Parasitic Extraction, Low Power Design, Cadence Virtuoso, Routing, Low-power Design, Logic Synthesis, CMOS, Microprocessors
Education
San Jose State University 1996 — 1997
M.S, EE
Louisiana Tech University 1995 — 1996
M.S, EE
Osmania University 1991 — 1995
Engineering, Electronics & Communications
Kendriya Vidyalaya
Christer Cederberg's Cadence Design Systems Experience June 2002 - January 2010
Job Principal Systems Engineer at Boston Scientific
Industry Computer Software
Experience
Boston Scientific November 2010 - Present
CADENCE DESIGN SYSTEMS June 2002 - January 2010
SYNOPSYS August 2000 - February 2002
SIMULATION TECHNOLOGIES, SUMMIT DESIGN and INNOVEDA October 1996 - August 2000
FRONTEC TELECOM AB, Stockholm,Sweden September 1994 - September 1996
CADENCE DESIGN SYSTEMS, Stockholm, Sweden July 1992 - September 1994
CADENCE DESIGN SYSTEMS, San Jose, CA December 1990 - July 1992
ZYCAD CORPORATION, Menlo Park, CA July 1989 - December 1990
ZYCAD CORPORATION, St. Paul, MN April 1986 - June 1989
ZYCAD CORPORATION, Santa Clara, CA June 1985 - April 1986
Skills
Project Management, Product Marketing, ASIC, Software Development, Debugging, Cross-functional Team..., Process Improvement, Product Management, EDA
Education
University of Minnesota - Carlson School of Management 1986 — 1990
MBA
Massachusetts Institute of Technology 1980 — 1981
Electrical Engineering
KTH Royal Institute of Technology 1977 — 1981
MS, Electrical Engineering / Computer Science
Boston Scientific November 2010 - Present
CADENCE DESIGN SYSTEMS June 2002 - January 2010
SYNOPSYS August 2000 - February 2002
SIMULATION TECHNOLOGIES, SUMMIT DESIGN and INNOVEDA October 1996 - August 2000
FRONTEC TELECOM AB, Stockholm,Sweden September 1994 - September 1996
CADENCE DESIGN SYSTEMS, Stockholm, Sweden July 1992 - September 1994
CADENCE DESIGN SYSTEMS, San Jose, CA December 1990 - July 1992
ZYCAD CORPORATION, Menlo Park, CA July 1989 - December 1990
ZYCAD CORPORATION, St. Paul, MN April 1986 - June 1989
ZYCAD CORPORATION, Santa Clara, CA June 1985 - April 1986
Skills
Project Management, Product Marketing, ASIC, Software Development, Debugging, Cross-functional Team..., Process Improvement, Product Management, EDA
Education
University of Minnesota - Carlson School of Management 1986 — 1990
MBA
Massachusetts Institute of Technology 1980 — 1981
Electrical Engineering
KTH Royal Institute of Technology 1977 — 1981
MS, Electrical Engineering / Computer Science
Veena Ramamurthy's Cadence Design Systems Experience 2012 - 2013
Job Staff Asic Design Engineer at SanDisk
Industry Design
Experience
SanDisk March 2013 - Present
Cadence Design Systems 2012 - 2013
Chelsio Communications February 2007 - September 2012
Saisoft Inc. August 2006 - February 2007
Skills
Cadence (RTL compile,..., Synopsys (Design..., IBM (Booldozer, Verity,..., File systems -..., Scripting Languages -..., Certifications -..., IBM ASIC Flow..., Tech expertise in the..., Used VERILOG in VCS,..., experience in..., STA reports using..., Working knowledge of..., Windows 95/NT/2000/XP,..., Matlab, LabView,..., Xilinx, ModelSim XE,..., Static Timing Analysis, Debugging, Logic Synthesis, ASIC, IC, Physical Design
Education
University of Louisville 2004 — 2006
Master of Science (M.S.), Electrical Engineering
Jawaharlal Nehru Technological University 1999 — 2003
Bachelor of Engineering, Electronics and Communication Engineering
SanDisk March 2013 - Present
Cadence Design Systems 2012 - 2013
Chelsio Communications February 2007 - September 2012
Saisoft Inc. August 2006 - February 2007
Skills
Cadence (RTL compile,..., Synopsys (Design..., IBM (Booldozer, Verity,..., File systems -..., Scripting Languages -..., Certifications -..., IBM ASIC Flow..., Tech expertise in the..., Used VERILOG in VCS,..., experience in..., STA reports using..., Working knowledge of..., Windows 95/NT/2000/XP,..., Matlab, LabView,..., Xilinx, ModelSim XE,..., Static Timing Analysis, Debugging, Logic Synthesis, ASIC, IC, Physical Design
Education
University of Louisville 2004 — 2006
Master of Science (M.S.), Electrical Engineering
Jawaharlal Nehru Technological University 1999 — 2003
Bachelor of Engineering, Electronics and Communication Engineering
Malathi Madireddy's Cadence Design Systems Experience August 2015 - Present
Job Principal Software Engineer at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems August 2015 - Present
Coherent Logix, Inc. June 2014 - June 2015
Synopsys May 2008 - May 2014
Synplicity (Acquired by Synopsys) November 2007 - May 2008
Mentor Graphics March 2002 - December 2007
Xpeed Networks May 2000 - March 2002
CadWorx / Zaiq Technologies April 1999 - May 2000
Mentor Graphics August 1997 - April 1999
Duet Technologies August 1995 - August 1997
Skills
FPGA Synthesis Tool..., Data Flow Optimization, Synthesis Logic..., Technology Mapping, Synthesis Optimization..., EDA Software Tools..., FPGA Architectures, C/C++ Programming, FPGA Methodology, Object Oriented Analysis, Teamwork, Cross-functional..., Cross-cultural Teams, Communication Skills, RTOS Design, Embedded Software..., Network Protocols, EDA, Logic Synthesis, Verilog, Testing
Education
Santa Clara University 2010 — 2013
MS, Software Engineering
Jawaharlal Nehru Technological University 1995 — 1999
B.Tech, CS
Cadence Design Systems August 2015 - Present
Coherent Logix, Inc. June 2014 - June 2015
Synopsys May 2008 - May 2014
Synplicity (Acquired by Synopsys) November 2007 - May 2008
Mentor Graphics March 2002 - December 2007
Xpeed Networks May 2000 - March 2002
CadWorx / Zaiq Technologies April 1999 - May 2000
Mentor Graphics August 1997 - April 1999
Duet Technologies August 1995 - August 1997
Skills
FPGA Synthesis Tool..., Data Flow Optimization, Synthesis Logic..., Technology Mapping, Synthesis Optimization..., EDA Software Tools..., FPGA Architectures, C/C++ Programming, FPGA Methodology, Object Oriented Analysis, Teamwork, Cross-functional..., Cross-cultural Teams, Communication Skills, RTOS Design, Embedded Software..., Network Protocols, EDA, Logic Synthesis, Verilog, Testing
Education
Santa Clara University 2010 — 2013
MS, Software Engineering
Jawaharlal Nehru Technological University 1995 — 1999
B.Tech, CS
CHANGJIN PARK's Cadence Design Systems Experience March 1990 - May 1993
Job Contractor at SoC Verification Team at AMD Corp
Industry Semiconductors
Experience
SUN microsystems/Oracle Corp. June 1998 - July 2011
Micro Device Technology May 1995 - May 1998
Synopsys Design Systems June 1993 - May 1995
Cadence Design Systems March 1990 - May 1993
Education
Stanford University(Attended for 2 semesters) 1999 — 2002
None, EE Master degree programs, n/a
Kyungpook National University 1978 — 1985
B.S., EE
SUN microsystems/Oracle Corp. June 1998 - July 2011
Micro Device Technology May 1995 - May 1998
Synopsys Design Systems June 1993 - May 1995
Cadence Design Systems March 1990 - May 1993
Education
Stanford University(Attended for 2 semesters) 1999 — 2002
None, EE Master degree programs, n/a
Kyungpook National University 1978 — 1985
B.S., EE
Anna Wei Overholt's Cadence Design Systems Experience June 2005 - February 2006
Job R&D Engineer
Industry Semiconductors
Experience
Synopsys June 2006 - Present
Cadence Design Systems June 2005 - February 2006
Promise Technology January 2003 - May 2005
Mindspeed Technologies December 1999 - December 2002
Skills
Physical Design, Semiconductors, Virtuoso, CMOS, Place & Route
Education
Jilin University
Master of Science, Chemistry
Jilin University
Bachelor of Science, Chemistry
Northwestern Polytechnic University
Master of Science, Electrical Engineering
Synopsys June 2006 - Present
Cadence Design Systems June 2005 - February 2006
Promise Technology January 2003 - May 2005
Mindspeed Technologies December 1999 - December 2002
Skills
Physical Design, Semiconductors, Virtuoso, CMOS, Place & Route
Education
Jilin University
Master of Science, Chemistry
Jilin University
Bachelor of Science, Chemistry
Northwestern Polytechnic University
Master of Science, Electrical Engineering
Janet Dernbach's Cadence Design Systems Experience 1998 - 2003
Job Corporate Applications Engineer at Mentor Graphics
Industry Computer Software
Experience
Mentor Graphics June 2005 - Present
Cadence Design Systems 1998 - 2003
Education
Linfield College
Bachelor of Science (BS), Computer Systems Analysis
Oregon State University
Bachelor of Science (BS), Animal Sciences
Mentor Graphics June 2005 - Present
Cadence Design Systems 1998 - 2003
Education
Linfield College
Bachelor of Science (BS), Computer Systems Analysis
Oregon State University
Bachelor of Science (BS), Animal Sciences
Inhwan Seo's Cadence Design Systems Experience EngineerAVANTI1999 - 2002
Job
Industry Computer Software
Experience
Cadence Design Systems EngineerAVANTI1999 - 2002
Skills
C/C++ STL, Verilog, VHDL, java, ASIC, P&R, library, Physical Design, Semiconductors, IC, EDA, SoC, TCL, Debugging, Simulations, VLSI, C++, C
Education
Kyungpook National University
MS, EE
Cadence Design Systems EngineerAVANTI1999 - 2002
Skills
C/C++ STL, Verilog, VHDL, java, ASIC, P&R, library, Physical Design, Semiconductors, IC, EDA, SoC, TCL, Debugging, Simulations, VLSI, C++, C
Education
Kyungpook National University
MS, EE
Krishna Chakravadhanula's Cadence Design Systems Experience
Job Sr. Member of Consulting Staff at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems
Skills
EDA, TCL, ASIC, Logic Synthesis, Verilog, VLSI
Education
Jadavpur University
The University of Texas at Austin
Cadence Design Systems
Skills
EDA, TCL, ASIC, Logic Synthesis, Verilog, VLSI
Education
Jadavpur University
The University of Texas at Austin
Kislaya Sharma's Cadence Design Systems Experience December 2012 - June 2013
Job Principal Engineer Design Enablement at GLOBALFOUNDRIES US Inc
Industry Semiconductors
Experience
GLOBALFOUNDRIES January 2015 - Present
GLOBALFOUNDRIES August 2013 - December 2014
Cadence Design Systems December 2012 - June 2013
Freescale Semiconductor July 2007 - December 2012
Skills
Physical Design, VLSI, LVS, DRC, ASIC, Cadence Virtuoso, EDA, Physical Verification, TCL, Cadence, PDK, Mixed Signal, IC, PDK Development, Analog Circuit Design, RTL design, CMOS
Education
National Institute of Technology Tiruchirappalli 2003 — 2007
B.Tech, Electronics And Communication Engineering
Kendriya Vidyalaya
GLOBALFOUNDRIES January 2015 - Present
GLOBALFOUNDRIES August 2013 - December 2014
Cadence Design Systems December 2012 - June 2013
Freescale Semiconductor July 2007 - December 2012
Skills
Physical Design, VLSI, LVS, DRC, ASIC, Cadence Virtuoso, EDA, Physical Verification, TCL, Cadence, PDK, Mixed Signal, IC, PDK Development, Analog Circuit Design, RTL design, CMOS
Education
National Institute of Technology Tiruchirappalli 2003 — 2007
B.Tech, Electronics And Communication Engineering
Kendriya Vidyalaya
Arindam Guha's Cadence Design Systems Experience June 2015 - Present
Job Principal Application Engineer at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems June 2015 - Present
Cadence Design Systems April 2010 - Present
Wipro Technologies June 2005 - April 2010
Skills
Functional Verification, PCIe, Ethernet, MIPI, UVM, USB3.0, I2C, JTAG, AMBA, Verilog, RTL Design, Debugging
Education
Manipal Institute of Technology
Cadence Design Systems June 2015 - Present
Cadence Design Systems April 2010 - Present
Wipro Technologies June 2005 - April 2010
Skills
Functional Verification, PCIe, Ethernet, MIPI, UVM, USB3.0, I2C, JTAG, AMBA, Verilog, RTL Design, Debugging
Education
Manipal Institute of Technology
Lori Head's Cadence Design Systems Experience November 2000 - June 2002
Job Human Resources Professional
Industry Logistics and Supply Chain
Experience
Northrop Grumman Corporation July 2012 - Present
RR Donnelley Global Turnkey Solutions March 2006 - September 2011
Cisco Systems March 2004 - March 2005
Cadence Design Systems November 2000 - June 2002
Skills
Change Management, Employee Relations, Problem Solving, Coaching, Performance Management, Analytical Abilities, PeopleSoft, Training & Development, Presentations, Listening Skills, HRIS, HR Policies, Hiring Practices, Legal Compliance, Safety Management, Temporary Staffing, Talent Acquisition, Applicant Tracking..., Personnel Management, Employee Benefits, Employee Training, Recruiting, New Hire Orientations, Deferred Compensation
Education
California State Polytechnic University, Pomona
B.S., Biological Sciences
Keller Graduate School of Management of DeVry University
MBA, Human Resources
Northrop Grumman Corporation July 2012 - Present
RR Donnelley Global Turnkey Solutions March 2006 - September 2011
Cisco Systems March 2004 - March 2005
Cadence Design Systems November 2000 - June 2002
Skills
Change Management, Employee Relations, Problem Solving, Coaching, Performance Management, Analytical Abilities, PeopleSoft, Training & Development, Presentations, Listening Skills, HRIS, HR Policies, Hiring Practices, Legal Compliance, Safety Management, Temporary Staffing, Talent Acquisition, Applicant Tracking..., Personnel Management, Employee Benefits, Employee Training, Recruiting, New Hire Orientations, Deferred Compensation
Education
California State Polytechnic University, Pomona
B.S., Biological Sciences
Keller Graduate School of Management of DeVry University
MBA, Human Resources
Daniel Wildhaber's Cadence Design Systems Experience June 1998 - October 2003
Job Technical Lead, ASIC Design at Kionix, Inc.
Industry Semiconductors
Experience
Kionix, Inc. March 2013 - Present
Freescale Semiconductor October 2003 - December 2012
Cadence Design Systems June 1998 - October 2003
Skills
Analog Circuit Design, Mixed Signal, Circuit Design, CMOS, BiCMOS, Semiconductors, ASIC, Power Management, Low-power Design, Mixed Mode Toplevel..., Design Leadership, Silicon Validation, DFT, Microelectronics, SoC, Cadence Virtuoso, Spectre, VLSI, PLL, SERDES
Education
National Technological University 2000 — 2005
Master of Science (MS), Electrical and Electronics Engineering
Louisiana State University 1993 — 1998
Bachelor of Science (BS), Electrical and Electronics Engineering
Kionix, Inc. March 2013 - Present
Freescale Semiconductor October 2003 - December 2012
Cadence Design Systems June 1998 - October 2003
Skills
Analog Circuit Design, Mixed Signal, Circuit Design, CMOS, BiCMOS, Semiconductors, ASIC, Power Management, Low-power Design, Mixed Mode Toplevel..., Design Leadership, Silicon Validation, DFT, Microelectronics, SoC, Cadence Virtuoso, Spectre, VLSI, PLL, SERDES
Education
National Technological University 2000 — 2005
Master of Science (MS), Electrical and Electronics Engineering
Louisiana State University 1993 — 1998
Bachelor of Science (BS), Electrical and Electronics Engineering
Robert E. Taylor's Cadence Design Systems Experience 1997 - 2003
Job Analog IC Design Engineer
Industry Semiconductors
Experience
Raytheon Company July 2013 - October 2014
Freescale Semiconductor, Inc. 2003 - 2012
Cadence Design Systems 1997 - 2003
Skills
Mixed-Signal IC Design, CMOS, Semiconductors, AISC, Cadence Virtuoso, Analog IC Design, Integrated Circuit..., Simulations, Circuit Design, Mixed Signal, IC, Spectre, Power Management, Analog, SPICE, ASIC, Cadence, Analog Circuit Design, Sensors, Amplifiers, Microelectronics, Oscilloscope
Education
Louisiana State University
Bachelor of Science in Electrical Engineering
Louisiana State University, Paul M. Hebert Law Center
Juris Doctor (J.D.), Law
Louisiana State University
Bachelor of Science in Mechanical Engineering
Woodberry Forest School, Woodberry Forest, Virginia
High School
Raytheon Company July 2013 - October 2014
Freescale Semiconductor, Inc. 2003 - 2012
Cadence Design Systems 1997 - 2003
Skills
Mixed-Signal IC Design, CMOS, Semiconductors, AISC, Cadence Virtuoso, Analog IC Design, Integrated Circuit..., Simulations, Circuit Design, Mixed Signal, IC, Spectre, Power Management, Analog, SPICE, ASIC, Cadence, Analog Circuit Design, Sensors, Amplifiers, Microelectronics, Oscilloscope
Education
Louisiana State University
Bachelor of Science in Electrical Engineering
Louisiana State University, Paul M. Hebert Law Center
Juris Doctor (J.D.), Law
Louisiana State University
Bachelor of Science in Mechanical Engineering
Woodberry Forest School, Woodberry Forest, Virginia
High School
Glenn Wesley's Cadence Design Systems Experience 1980 - June 2002
Job Senior C++ Developer at Comcast Cable
Industry Computer Software
Experience
Stevens Capital Management February 2003 - May 2014
Cadence Design Systems 1980 - June 2002
Cadence Design Systems 1998 - 2000
Bell Laboratories 1980 - 1998
Skills
C Programming, C++ Programming, Linux/Unix Programming, TIBCO Rendezvous, ZeroMQ, Distributed Systems, Software Development, Software Engineering, Fault Tolerance, Multithreading, Drupal, Formal Verification, Model Checking, Schematic Capture, Tcl-Tk, Perl, SQL, SQLite, Bash, Ksh, GUI development, CIM, Project Management, FPGA, Object Oriented Software, PMP, FIX Trading Protocol, ClearCase, Git
Education
Muhlenberg College 1976 — 1980
Bachelor of Science (BS), Chemistry; Natural Science, Magna Cum Laude
Lehigh University 1984 — 1986
Solid State Technology
Stevens Capital Management February 2003 - May 2014
Cadence Design Systems 1980 - June 2002
Cadence Design Systems 1998 - 2000
Bell Laboratories 1980 - 1998
Skills
C Programming, C++ Programming, Linux/Unix Programming, TIBCO Rendezvous, ZeroMQ, Distributed Systems, Software Development, Software Engineering, Fault Tolerance, Multithreading, Drupal, Formal Verification, Model Checking, Schematic Capture, Tcl-Tk, Perl, SQL, SQLite, Bash, Ksh, GUI development, CIM, Project Management, FPGA, Object Oriented Software, PMP, FIX Trading Protocol, ClearCase, Git
Education
Muhlenberg College 1976 — 1980
Bachelor of Science (BS), Chemistry; Natural Science, Magna Cum Laude
Lehigh University 1984 — 1986
Solid State Technology
Hewlett-Packard
SAP
Symantec
Intuit
HP
salesforce.com
Bloomberg LP
Autodesk