Cadence Design Systems
Industry: Software company
DescriptionCadence Design Systems, Inc. is an American multinational electronic design automation software and engineering services company, founded in 1988 by the merger of SDA Systems and ECAD, Inc. CEO: Lip-Bu Tan (Jan 2009–) Headquarters: San Jose, California, United States Revenue: 1.816 billion USD (2016) Subsidiaries: Sigrity, Tensilica, Chip Estimate Corp, nusemi inc,
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Cadence Design Systems Employees
Employee
Years
Job
Industry
Parag Salve Parag Salve's Cadence Design Systems Experience May 2008 - July 2008
Job Senior Test Development Engineer at MRV Communications
Industry Semiconductors
Experience
MRV Communications July 2014 - Present
St. Jude Medical Cardiac Rhythm Med Division May 2009 - August 2014
St. Jude Medical February 2009 - May 2009
Cadence Design Systems May 2008 - July 2008
A E Telelink Pvt. Ltd January 2006 - December 2006
Skills
Digital Circuit Design, Verilog, Analog Circuit Design, Perl Script, C/C++, OrCAD Capture CIS, Python, Board Layout, Matlab, NI LabVIEW, Continuous Improvement, Characterization, Medical Devices, Testing, Perl, Simulations, TCL
Education
University of Southern California 2007 — 2008
Master's Degree, Digital VLSI
RKN Engineering College, Nagpur University 2002 — 2006
Engineer's Degree, Electrical and Electronics Engineering, First Class
Somalwar Ramdaspeth School 1990 — 2000
High School
MRV Communications July 2014 - Present
St. Jude Medical Cardiac Rhythm Med Division May 2009 - August 2014
St. Jude Medical February 2009 - May 2009
Cadence Design Systems May 2008 - July 2008
A E Telelink Pvt. Ltd January 2006 - December 2006
Skills
Digital Circuit Design, Verilog, Analog Circuit Design, Perl Script, C/C++, OrCAD Capture CIS, Python, Board Layout, Matlab, NI LabVIEW, Continuous Improvement, Characterization, Medical Devices, Testing, Perl, Simulations, TCL
Education
University of Southern California 2007 — 2008
Master's Degree, Digital VLSI
RKN Engineering College, Nagpur University 2002 — 2006
Engineer's Degree, Electrical and Electronics Engineering, First Class
Somalwar Ramdaspeth School 1990 — 2000
High School
Eitetsu Baumgardner Eitetsu Baumgardner's Cadence Design Systems Experience April 2014 - Present
Job Principle Applications Engineer
Industry Semiconductors
Experience
Cadence Design Systems April 2014 - Present
Altera Corporation April 2012 - December 2013
Altera Corporation December 2005 - April 2012
Altera July 2005 - December 2005
Altera July 2003 - June 2005
Altera February 2001 - June 2005
Skills
Semiconductors, FPGA, PCIe, DDR2, Verilog, EDA, Debugging, Semiconductor Industry, RTL design, Hardware Architecture, Static Timing Analysis, Timing Closure, Phase Lock Loops, Altera Quartus II, ModelSim, VCS, NC Sim, SoC, Embedded Systems, Microsoft Excel, Microsoft PowerPoint
Education
University of Southern California 1996 — 2000
Bachelor of Science (BS), Electrical Engineering
Cadence Design Systems April 2014 - Present
Altera Corporation April 2012 - December 2013
Altera Corporation December 2005 - April 2012
Altera July 2005 - December 2005
Altera July 2003 - June 2005
Altera February 2001 - June 2005
Skills
Semiconductors, FPGA, PCIe, DDR2, Verilog, EDA, Debugging, Semiconductor Industry, RTL design, Hardware Architecture, Static Timing Analysis, Timing Closure, Phase Lock Loops, Altera Quartus II, ModelSim, VCS, NC Sim, SoC, Embedded Systems, Microsoft Excel, Microsoft PowerPoint
Education
University of Southern California 1996 — 2000
Bachelor of Science (BS), Electrical Engineering
Ron Vogelsong Ron Vogelsong's Cadence Design Systems Experience March 2001 - Present
Job
Industry Semiconductors
Experience
Cadence Design Systems March 2001 - Present
Intersil August 1999 - March 2001
Harris Semiconductor January 1990 - August 1999
University of South Florida August 1985 - December 1989
AB Associates July 1981 - December 1989
Skills
Mixed Signal, Semiconductors, Verilog-AMS, Behavioral Modeling, Verilog-A, Electronics, Analog, RF, VHDL, EDA, IC, Electrical Engineering, Cadence Virtuoso, Debugging, Functional Verification, SoC, VHDL-AMS, Pspice, VLSI, Analog Circuit Design, CMOS, Integrated Circuit..., Cadence Spectre, Circuit Design, Cadence
Education
University of South Florida 1974 — 1985
PhD, MSEE, BSEE, BA(music), Electrical Engineering
Cadence Design Systems March 2001 - Present
Intersil August 1999 - March 2001
Harris Semiconductor January 1990 - August 1999
University of South Florida August 1985 - December 1989
AB Associates July 1981 - December 1989
Skills
Mixed Signal, Semiconductors, Verilog-AMS, Behavioral Modeling, Verilog-A, Electronics, Analog, RF, VHDL, EDA, IC, Electrical Engineering, Cadence Virtuoso, Debugging, Functional Verification, SoC, VHDL-AMS, Pspice, VLSI, Analog Circuit Design, CMOS, Integrated Circuit..., Cadence Spectre, Circuit Design, Cadence
Education
University of South Florida 1974 — 1985
PhD, MSEE, BSEE, BA(music), Electrical Engineering
Karthik Rajamane Karthik Rajamane's Cadence Design Systems Experience March 2015 - Present
Job Design Engineer II at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems March 2015 - Present
Information Technology Services August 2013 - May 2014
IBM India Private Limited August 2010 - July 2012
Rajamane Electronics December 2010 - March 2012
Skills
Verilog, System Verilog, C++, C, Perl, ModelSim, NC Sim, Cadence LEC, Synopsys Primetime, Matlab, Xilinx, Cadence Virtuoso, Cadence Encounter, Java, Microcontrollers, Pspice, Keil, SQL, Eclipse, Cadence, J2EE, Solid Edge, ASIC
Education
University of Southern California 2012 — 2014
Master's degree, Electrical and Electronics Engineering
Bangalore Institute of Technology 2006 — 2010
Bachelor of Engineering (B.E.), Electrical and Electronics Engineering
Deeksha Centre for Learning 2004 — 2006
Cadence Design Systems March 2015 - Present
Information Technology Services August 2013 - May 2014
IBM India Private Limited August 2010 - July 2012
Rajamane Electronics December 2010 - March 2012
Skills
Verilog, System Verilog, C++, C, Perl, ModelSim, NC Sim, Cadence LEC, Synopsys Primetime, Matlab, Xilinx, Cadence Virtuoso, Cadence Encounter, Java, Microcontrollers, Pspice, Keil, SQL, Eclipse, Cadence, J2EE, Solid Edge, ASIC
Education
University of Southern California 2012 — 2014
Master's degree, Electrical and Electronics Engineering
Bangalore Institute of Technology 2006 — 2010
Bachelor of Engineering (B.E.), Electrical and Electronics Engineering
Deeksha Centre for Learning 2004 — 2006
Esther Tsai Esther Tsai's Cadence Design Systems Experience January 2012 - Present
Job Staff Product Engineer at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems January 2012 - Present
Cadence Design Systems March 2011 - December 2011
IBM December 2007 - March 2011
IBM September 2006 - November 2007
IBM Global Business Services June 2005 - December 2005
Skills
ASIC, EDA, CMOS, IC, Verilog, VLSI, Circuit Design, Semiconductors, Analog Circuit Design, Analog, Perl, SPICE, LVS, DRC, Simulations, Hardware Architecture, Cadence, Functional Verification, Semiconductor Industry, Physical Design
Education
University of Southern California 2004 — 2006
MS, Electrical Engineering
Pennsylvania state University - University Park 1999 — 2003
BS, Electrical Engineering
Cadence Design Systems January 2012 - Present
Cadence Design Systems March 2011 - December 2011
IBM December 2007 - March 2011
IBM September 2006 - November 2007
IBM Global Business Services June 2005 - December 2005
Skills
ASIC, EDA, CMOS, IC, Verilog, VLSI, Circuit Design, Semiconductors, Analog Circuit Design, Analog, Perl, SPICE, LVS, DRC, Simulations, Hardware Architecture, Cadence, Functional Verification, Semiconductor Industry, Physical Design
Education
University of Southern California 2004 — 2006
MS, Electrical Engineering
Pennsylvania state University - University Park 1999 — 2003
BS, Electrical Engineering
VALERIE COLLINS VALERIE COLLINS's Cadence Design Systems Experience July 1997 - October 1998
Job Sr. BBHW Engineer at Microsoft
Industry Consumer Electronics
Experience
Microsoft April 2014 - December 2014
Nokia October 2011 - April 2014
ITT Corporation December 1998 - May 2009
Cadence Design Systems July 1997 - October 1998
Skills
Analog, Mixed Signal, ASIC, RF, EDA, Semiconductors, Signal Integrity
Education
University of South Florida 1995 — 1997
Masters in Science, Applied Physics
University of Belgrade
Bachelors in EE, Electrical Engineering
Microsoft April 2014 - December 2014
Nokia October 2011 - April 2014
ITT Corporation December 1998 - May 2009
Cadence Design Systems July 1997 - October 1998
Skills
Analog, Mixed Signal, ASIC, RF, EDA, Semiconductors, Signal Integrity
Education
University of South Florida 1995 — 1997
Masters in Science, Applied Physics
University of Belgrade
Bachelors in EE, Electrical Engineering
Brad Hoskins Brad Hoskins's Cadence Design Systems Experience 1998 - 1999
Job Director, IC Design
Industry Semiconductors
Experience
Freescale Semiconductor January 2015 - Present
Freescale 2004 - 2014
Motorola 1999 - 2003
Cadence Design Systems 1998 - 1999
Azfin Semiconductors 1995 - 1998
Skills
IC, Low-power Design, Competitive Analysis, Integrated Circuit..., Semiconductors, ASIC, SoC, Mixed Signal, Verilog, Embedded Systems
Education
University of South Australia
M. Eng., Electronic Engineering
Freescale Semiconductor January 2015 - Present
Freescale 2004 - 2014
Motorola 1999 - 2003
Cadence Design Systems 1998 - 1999
Azfin Semiconductors 1995 - 1998
Skills
IC, Low-power Design, Competitive Analysis, Integrated Circuit..., Semiconductors, ASIC, SoC, Mixed Signal, Verilog, Embedded Systems
Education
University of South Australia
M. Eng., Electronic Engineering
Elton Chen Elton Chen's Cadence Design Systems Experience 2000 - 2004
Job Sr Software Engineer at Oracle
Industry Computer Software
Experience
Oracle January 2005 - Present
Wonderful Live Group (Non-profit) June 2008 - September 2012
Cadence Design Systems 2000 - 2004
Skills
iOS Swift Programming, Android Development, Java, C, C++, C#, XNA, Large-scale Data..., HTML, Python, Perl, Tcl-Tk, Public Speaking, Microsoft Office, Strategic Planning, Research, English, Photoshop, Customer Service, Teaching, Algorithms, TCL, Verilog, Cloud Computing
Education
University of Southern California
Master of Science (MS), Computer Science
Oracle January 2005 - Present
Wonderful Live Group (Non-profit) June 2008 - September 2012
Cadence Design Systems 2000 - 2004
Skills
iOS Swift Programming, Android Development, Java, C, C++, C#, XNA, Large-scale Data..., HTML, Python, Perl, Tcl-Tk, Public Speaking, Microsoft Office, Strategic Planning, Research, English, Photoshop, Customer Service, Teaching, Algorithms, TCL, Verilog, Cloud Computing
Education
University of Southern California
Master of Science (MS), Computer Science
Andy Redick Andy Redick's Cadence Design Systems Experience June 1995 - March 2001
Job VP Sales at weMonitor/BlueDot
Industry Consumer Services
Experience
weMonitor August 2014 - Present
Melexis Microelectronic Integrated Systems April 2007 - May 2014
QuickLogic March 2001 - April 2007
Cadence Design Systems June 1995 - March 2001
Unishippers January 1992 - June 1995
Hughes Aircraft Company July 1986 - May 1991
Education
University of Southern California 1989 — 1991
Master of Science in Electrical Engineering, Electrophysics - IC Design
weMonitor August 2014 - Present
Melexis Microelectronic Integrated Systems April 2007 - May 2014
QuickLogic March 2001 - April 2007
Cadence Design Systems June 1995 - March 2001
Unishippers January 1992 - June 1995
Hughes Aircraft Company July 1986 - May 1991
Education
University of Southern California 1989 — 1991
Master of Science in Electrical Engineering, Electrophysics - IC Design
Sergio Peratoner Sergio Peratoner's Cadence Design Systems Experience 2001 - Present
Job Account Manager Technical at CDN
Industry Computer Software
Experience
Cadence Design Systems 2001 - Present
Cadence Design System 2001 - Present
Skills
EDA, Linux, IC, VHDL, SoC, Semiconductors, ASIC, Mixed Signal, Verilog, VLSI, Analog, Debugging, FPGA, Perl
Education
University of Southern California
Master's Degree, Electrical Engineering - Communications Systems, M.S.E.E
University of Southern California
Bachelor's Degree, Bachelor's Electrical Engineering, Bachelor's Degree
Don Bosco Technical Institute
Associate's Degree, Associate's Degree Electronics Technology
Cadence Design Systems 2001 - Present
Cadence Design System 2001 - Present
Skills
EDA, Linux, IC, VHDL, SoC, Semiconductors, ASIC, Mixed Signal, Verilog, VLSI, Analog, Debugging, FPGA, Perl
Education
University of Southern California
Master's Degree, Electrical Engineering - Communications Systems, M.S.E.E
University of Southern California
Bachelor's Degree, Bachelor's Electrical Engineering, Bachelor's Degree
Don Bosco Technical Institute
Associate's Degree, Associate's Degree Electronics Technology
Bo Hu Bo Hu's Cadence Design Systems Experience July 2010 - March 2011
Job Software Engineer
Industry Computer Software
Experience
Google May 2014 - Present
Apache Design Solutions March 2011 - May 2014
Cadence Design Systems July 2010 - March 2011
Cadence Design Systems April 2008 - July 2010
Cadence Design Systems January 2006 - March 2008
Skills
EDA, Algorithms, Simulations, VLSI, Physics, SPICE, Modeling, ASIC, TCL, SoC, Semiconductors, Verilog, Debugging, Perl, Circuit Design, VHDL
Education
University of Washington 2001 — 2005
PHD, Electrical Engineering
University of Washington 1999 — 2001
Master, Physics
University of Science and Technology of China 1994 — 1999
B.S., physics
Google May 2014 - Present
Apache Design Solutions March 2011 - May 2014
Cadence Design Systems July 2010 - March 2011
Cadence Design Systems April 2008 - July 2010
Cadence Design Systems January 2006 - March 2008
Skills
EDA, Algorithms, Simulations, VLSI, Physics, SPICE, Modeling, ASIC, TCL, SoC, Semiconductors, Verilog, Debugging, Perl, Circuit Design, VHDL
Education
University of Washington 2001 — 2005
PHD, Electrical Engineering
University of Washington 1999 — 2001
Master, Physics
University of Science and Technology of China 1994 — 1999
B.S., physics
Ken Shiring's Cadence Design Systems Experience August 2007 - August 2012
Job Senior Staff Engineer at Wave Semiconductor
Industry Computer Hardware
Experience
Wave Semiconductor September 2012 - Present
Sunburst Financial Technologies August 2011 - December 2014
Cadence Design Systems August 2007 - August 2012
USC August 2005 - December 2007
Self-Employed November 2004 - June 2007
IBM January 1999 - November 2004
Virigina Tech May 1998 - December 1998
Annapolis Micro Systems January 1997 - August 1997
Skills
EDA, Game Theory, Logic Synthesis, VLSI, Verilog, C++, Linux, VHDL, Algorithms, Embedded Systems, C, TCL, FPGA, SystemC, ASIC, Low Power Systems, Emulation, Software Engineering, RTL design, RTL verification, High Level Synthesis
Education
University of Southern California 2005 — 2007
M.S., Computer Engineering
Virginia Polytechnic Institute and State University 1994 — 1998
B.S., Computer Engineering
Wave Semiconductor September 2012 - Present
Sunburst Financial Technologies August 2011 - December 2014
Cadence Design Systems August 2007 - August 2012
USC August 2005 - December 2007
Self-Employed November 2004 - June 2007
IBM January 1999 - November 2004
Virigina Tech May 1998 - December 1998
Annapolis Micro Systems January 1997 - August 1997
Skills
EDA, Game Theory, Logic Synthesis, VLSI, Verilog, C++, Linux, VHDL, Algorithms, Embedded Systems, C, TCL, FPGA, SystemC, ASIC, Low Power Systems, Emulation, Software Engineering, RTL design, RTL verification, High Level Synthesis
Education
University of Southern California 2005 — 2007
M.S., Computer Engineering
Virginia Polytechnic Institute and State University 1994 — 1998
B.S., Computer Engineering
Ian Chronister's Cadence Design Systems Experience July 2013 - Present
Job IT Director at Cadence Design Systems
Industry Information Technology and Services
Experience
Cadence Design Systems July 2013 - Present
Chronister Family Wines, LLC 2012 - Present
Cortina Systems December 2010 - July 2013
Telegent Systems April 2009 - December 2010
SiRF Technology, Inc March 1999 - April 2009
USWeb April 1997 - March 1999
Whitetree 1994 - 1997
Skills
Semiconductors, Product Management, Wireless, Cross-functional Team..., Embedded Systems, SoC, ASIC, Perl, Start-ups, Cloud Computing, Consumer Electronics, Debugging, Electronics, Embedded Software, Hardware, IC, Linux, Product Marketing, RF, Software Development, System Architecture, Testing, Verilog
Education
University of South Alabama 1989 — 1993
Cadence Design Systems July 2013 - Present
Chronister Family Wines, LLC 2012 - Present
Cortina Systems December 2010 - July 2013
Telegent Systems April 2009 - December 2010
SiRF Technology, Inc March 1999 - April 2009
USWeb April 1997 - March 1999
Whitetree 1994 - 1997
Skills
Semiconductors, Product Management, Wireless, Cross-functional Team..., Embedded Systems, SoC, ASIC, Perl, Start-ups, Cloud Computing, Consumer Electronics, Debugging, Electronics, Embedded Software, Hardware, IC, Linux, Product Marketing, RF, Software Development, System Architecture, Testing, Verilog
Education
University of South Alabama 1989 — 1993
Tian Ling's Cadence Design Systems Experience July 2011 - Present
Job Architect at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems July 2011 - Present
Cadence Design Systems December 2000 - June 2011
Imatron Systems July 2000 - December 2000
Education
Vanderbilt University 1996 — 1999
MS, Physics
University of Science and Technology of China 1993 — 1996
MS, Optics
University of Science and Technology of China 1989 — 1993
BS, Physics
Beijing Shida Shiyan Zhong Xue
Cadence Design Systems July 2011 - Present
Cadence Design Systems December 2000 - June 2011
Imatron Systems July 2000 - December 2000
Education
Vanderbilt University 1996 — 1999
MS, Physics
University of Science and Technology of China 1993 — 1996
MS, Optics
University of Science and Technology of China 1989 — 1993
BS, Physics
Beijing Shida Shiyan Zhong Xue
Henry Szymanski's Cadence Design Systems Experience February 2008 - Present
Job Senior Technical Sales Lead Engineer
Industry Design
Experience
Cadence Design Systems February 2008 - Present
Mentor Graphics Corporation August 2004 - February 2008
Hughes Aircraft Company 1984 - 1992
Skills
ASIC, IC, TCL, Verilog, SoC, Formal Verification, EDA, Low-power Design, Semiconductors, Functional Verification, Integrated Circuit..., Debugging
Education
University of Southern California 1980 — 1984
Cadence Design Systems February 2008 - Present
Mentor Graphics Corporation August 2004 - February 2008
Hughes Aircraft Company 1984 - 1992
Skills
ASIC, IC, TCL, Verilog, SoC, Formal Verification, EDA, Low-power Design, Semiconductors, Functional Verification, Integrated Circuit..., Debugging
Education
University of Southern California 1980 — 1984
Amir Ajami's Cadence Design Systems Experience May 1999 - August 1999
Job Software Architect at Magma Design Automation
Industry Computer Software
Experience
Magma Design Automation October 2002 - Present
Cadence Design Systems May 1999 - August 1999
Education
University of Southern California 1999 — 2002
Ph.D., Electrical Engineering
University of Southern California 1997 — 1999
M.Sc., Electrical Engineering
University of Tehran
B.Sc., Electrical Engineering
Magma Design Automation October 2002 - Present
Cadence Design Systems May 1999 - August 1999
Education
University of Southern California 1999 — 2002
Ph.D., Electrical Engineering
University of Southern California 1997 — 1999
M.Sc., Electrical Engineering
University of Tehran
B.Sc., Electrical Engineering
Christopher Jost's Cadence Design Systems Experience October 2001 - May 2008
Job Senior Director of Sales and Marketing at Pulsic
Industry Marketing and Advertising
Experience
Pulsic October 2014 - Present
Pulsic November 2009 - Present
Efficient Frontier (aquired by Adobe Systems) May 2008 - July 2009
Cadence Design Systems October 2001 - May 2008
Calico Commerce 1999 - 2001
Skills
SEM, Demand Generation, Integrated Marketing, Product Marketing, Product Management, Marketing, Lead Generation, B2B Marketing, Web Analytics, Email Marketing, Strategic Partnerships, Cross-functional Team..., B2B, Public Relations, Strategy
Education
University of Southern California
Bachelor's degree, Communications
Pulsic October 2014 - Present
Pulsic November 2009 - Present
Efficient Frontier (aquired by Adobe Systems) May 2008 - July 2009
Cadence Design Systems October 2001 - May 2008
Calico Commerce 1999 - 2001
Skills
SEM, Demand Generation, Integrated Marketing, Product Marketing, Product Management, Marketing, Lead Generation, B2B Marketing, Web Analytics, Email Marketing, Strategic Partnerships, Cross-functional Team..., B2B, Public Relations, Strategy
Education
University of Southern California
Bachelor's degree, Communications
Scott Rader's Cadence Design Systems Experience May 1993 - May 1998
Job Systems Architect at National Instruments AWR Group
Industry Computer Software
Experience
AWR Corporation May 2000 - Present
Cadence Design Systems May 1993 - May 1998
Harris Semiconductor December 1983 - May 1993
Skills
Microsoft SQL Server, EDA, Product Management, Firewalls, Software Development, Active Directory, Semiconductors, Networking, IC, Software Engineering, Microwave, Databases, Microsoft Exchange, VPN, ASP.NET, SSRS, Analog, RF
Education
University of South Florida 1978 — 1983
MSEE/BSEE, Electrical Engineering
AWR Corporation May 2000 - Present
Cadence Design Systems May 1993 - May 1998
Harris Semiconductor December 1983 - May 1993
Skills
Microsoft SQL Server, EDA, Product Management, Firewalls, Software Development, Active Directory, Semiconductors, Networking, IC, Software Engineering, Microwave, Databases, Microsoft Exchange, VPN, ASP.NET, SSRS, Analog, RF
Education
University of South Florida 1978 — 1983
MSEE/BSEE, Electrical Engineering
Jie Chen's Cadence Design Systems Experience September 2014 - Present
Job Senior Meshing Developer at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems September 2014 - Present
University of Cincinnati September 2011 - August 2014
Virginia Tech April 2009 - September 2011
Virginia Tech August 2006 - March 2009
Virginia Tech August 2006 - December 2006
Vanderbilt University August 2004 - July 2006
Vanderbilt University August 2004 - May 2005
University of Science and Technology of China September 2001 - June 2004
University of Science and Technology of China September 2001 - January 2002
Skills
Mathematica, Turbulence, Tecplot, Unigraphics, CFD, Numerical Analysis, Simulation, Fluid Mechanics, Matlab, Fortran, ANSYS, Mathematical Modeling, LaTeX, Fluid Dynamics, Finite Element Analysis, Solidworks, Polymers, High Performance..., Programming, Heat Transfer, Modeling, C, Simulations, Mechanical Engineering, Thermodynamics, Parallel Computing
Education
Virginia Polytechnic Institute and State University 2006 — 2008
Ph.D, Engineering Mechanics
Vanderbilt University 2004 — 2006
Mechanical Engineering
University of Science and Technology of China 1996 — 2004
M.Eng, Fluid Mechanics
University of Science and Technology of China 1996 — 2001
B.Eng, Engineering Thermophysics
Cadence Design Systems September 2014 - Present
University of Cincinnati September 2011 - August 2014
Virginia Tech April 2009 - September 2011
Virginia Tech August 2006 - March 2009
Virginia Tech August 2006 - December 2006
Vanderbilt University August 2004 - July 2006
Vanderbilt University August 2004 - May 2005
University of Science and Technology of China September 2001 - June 2004
University of Science and Technology of China September 2001 - January 2002
Skills
Mathematica, Turbulence, Tecplot, Unigraphics, CFD, Numerical Analysis, Simulation, Fluid Mechanics, Matlab, Fortran, ANSYS, Mathematical Modeling, LaTeX, Fluid Dynamics, Finite Element Analysis, Solidworks, Polymers, High Performance..., Programming, Heat Transfer, Modeling, C, Simulations, Mechanical Engineering, Thermodynamics, Parallel Computing
Education
Virginia Polytechnic Institute and State University 2006 — 2008
Ph.D, Engineering Mechanics
Vanderbilt University 2004 — 2006
Mechanical Engineering
University of Science and Technology of China 1996 — 2004
M.Eng, Fluid Mechanics
University of Science and Technology of China 1996 — 2001
B.Eng, Engineering Thermophysics
Mark Boucher's Cadence Design Systems Experience July 2011 - Present
Job Sales AE Director at Cadence Design Systems
Industry Electrical/Electronic Manufacturing
Experience
Cadence Design Systems July 2011 - Present
Cadence Design Systems July 2010 - June 2012
Cadence Design Systems October 2000 - June 2012
Motorola November 1992 - October 2000
Plessey September 1985 - November 1992
Skills
RF, EDA, Engineering, PCB design, Allegro, Signal Integrity, Electronics
Education
University of South Wales 1982 — 1985
EE, Electronic Engineering
Cadence Design Systems July 2011 - Present
Cadence Design Systems July 2010 - June 2012
Cadence Design Systems October 2000 - June 2012
Motorola November 1992 - October 2000
Plessey September 1985 - November 1992
Skills
RF, EDA, Engineering, PCB design, Allegro, Signal Integrity, Electronics
Education
University of South Wales 1982 — 1985
EE, Electronic Engineering
Aiguo Xie's Cadence Design Systems Experience 1999 - 2001
Job Senior Architect at Calypto Design Systems
Industry Computer Software
Experience
Calypto Design Systems 2003 - 2014
Fulcrum Microsystems 2001 - 2003
Cadence Design Systems 1999 - 2001
Skills
ASIC, Algorithms, C, C, Debugging, Distributed Systems, EDA, Perl, RTL design, Semiconductors, SoC, TCL, Verilog
Education
University of Southern California
Ph.D., Electrical Engineering
Calypto Design Systems 2003 - 2014
Fulcrum Microsystems 2001 - 2003
Cadence Design Systems 1999 - 2001
Skills
ASIC, Algorithms, C, C, Debugging, Distributed Systems, EDA, Perl, RTL design, Semiconductors, SoC, TCL, Verilog
Education
University of Southern California
Ph.D., Electrical Engineering
Nihal Pradhan's Cadence Design Systems Experience June 2014 - Present
Job Product Engineer at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems June 2014 - Present
University of Southern California September 2013 - December 2013
Skills
Computer Architecture, Verilog, VLSI, Logic Design, Cadence Virtuoso, C, Programming, C++, Integrated Circuit..., ModelSim, Perl Script, SoC, Debugging, MIPS, NCSim, Xilinx, RTL design, DFT, SystemVerilog, VHDL, Synopsys Primetime, Encounter, Static Timing Analysis, Physical Design, RTL coding, Xilinx ISE, ASIC, Synopsys tools, Cadence, TCL, Perl, RTL Design, Circuit Design, Cadence Encounter
Education
University of Southern California 2012 — 2014
Master's degree, Electrical and Electronics Engineering, 3.7/ 4.0
Sardar patel institute of technology 2008 — 2012
Bachelor's degree, Electronics Engineering, 70%
Cadence Design Systems June 2014 - Present
University of Southern California September 2013 - December 2013
Skills
Computer Architecture, Verilog, VLSI, Logic Design, Cadence Virtuoso, C, Programming, C++, Integrated Circuit..., ModelSim, Perl Script, SoC, Debugging, MIPS, NCSim, Xilinx, RTL design, DFT, SystemVerilog, VHDL, Synopsys Primetime, Encounter, Static Timing Analysis, Physical Design, RTL coding, Xilinx ISE, ASIC, Synopsys tools, Cadence, TCL, Perl, RTL Design, Circuit Design, Cadence Encounter
Education
University of Southern California 2012 — 2014
Master's degree, Electrical and Electronics Engineering, 3.7/ 4.0
Sardar patel institute of technology 2008 — 2012
Bachelor's degree, Electronics Engineering, 70%
Vibha Holla's Cadence Design Systems Experience June 2014 - Present
Job Lead Design Engineer at Cadence Design Systems
Industry Electrical/Electronic Manufacturing
Experience
Cadence Design Systems June 2014 - Present
NVIDIA January 2014 - May 2014
USC Ming Hsieh Institute - Department of Electrical Engineering January 2013 - December 2013
NVIDIA May 2013 - August 2013
CoreEL Technologies October 2009 - June 2012
Skills
ModelSim, RTL design, Verilog, Xilinx, VHDL, Functional Verification, Cadence Virtuoso, EDA, Xilinx ISE, CMOS, VLSI, FPGA, RTL coding, NCSim, Computer Architecture, Simulations, Matlab
Education
University of Southern California 2012 — 2014
Master of Science (M.S.), Electrical and Electronics Engineering, 3.95/4.00
R. V. College of Engineering, Bangalore 2005 — 2009
BE, Electronics and Communication, 77.72/100
Cadence Design Systems June 2014 - Present
NVIDIA January 2014 - May 2014
USC Ming Hsieh Institute - Department of Electrical Engineering January 2013 - December 2013
NVIDIA May 2013 - August 2013
CoreEL Technologies October 2009 - June 2012
Skills
ModelSim, RTL design, Verilog, Xilinx, VHDL, Functional Verification, Cadence Virtuoso, EDA, Xilinx ISE, CMOS, VLSI, FPGA, RTL coding, NCSim, Computer Architecture, Simulations, Matlab
Education
University of Southern California 2012 — 2014
Master of Science (M.S.), Electrical and Electronics Engineering, 3.95/4.00
R. V. College of Engineering, Bangalore 2005 — 2009
BE, Electronics and Communication, 77.72/100
Rob McCance's Cadence Design Systems Experience 2000 - 2001
Job New Logo Business Development Manager at Altium
Industry Computer Software
Experience
Altium July 2014 - Present
ModernTech Corporation May 2013 - July 2014
EMA Design Automation January 2010 - April 2013
Technical Systems Integrators January 2006 - December 2010
iSYSTEM USA LLC January 1999 - December 2005
Cadence Design Systems 2000 - 2001
ACCEL Technologies, Inc. 1998 - 2000
TekSales, Inc. 1997 - 1999
Technical Systems Integrator, Inc. 1994 - 1996
Procter and Gamble, Inc. 1992 - 1994
Skills
Direct Sales, Solution Selling, EDA, Enterprise Software, Salesforce.com, Product Lifecycle..., International Sales, Product Marketing, Lead Generation, Product Launch, Sales Process, SaaS, Sales Operations, Product Management, Sales, Account Management, Partner Management, Sales Management, Embedded Systems, CRM, Management, Semiconductors, Start-ups, Debugging, Go-to-market Strategy, Selling, Demand Generation, Competitive Analysis, Cloud Computing, Cross-functional Team..., Channel Partners, Wireless, Business Development, Mobile Devices, Professional Services, Product Development, Strategic Partnerships, Marketing, Business Alliances, Software Industry, Complex Sales, Executive Management, Sales Enablement, Email Marketing, New Business Development
Education
University of South Florida 1987 — 1990
BSEE, Analog Design
Edward White 1980 — 1982
Altium July 2014 - Present
ModernTech Corporation May 2013 - July 2014
EMA Design Automation January 2010 - April 2013
Technical Systems Integrators January 2006 - December 2010
iSYSTEM USA LLC January 1999 - December 2005
Cadence Design Systems 2000 - 2001
ACCEL Technologies, Inc. 1998 - 2000
TekSales, Inc. 1997 - 1999
Technical Systems Integrator, Inc. 1994 - 1996
Procter and Gamble, Inc. 1992 - 1994
Skills
Direct Sales, Solution Selling, EDA, Enterprise Software, Salesforce.com, Product Lifecycle..., International Sales, Product Marketing, Lead Generation, Product Launch, Sales Process, SaaS, Sales Operations, Product Management, Sales, Account Management, Partner Management, Sales Management, Embedded Systems, CRM, Management, Semiconductors, Start-ups, Debugging, Go-to-market Strategy, Selling, Demand Generation, Competitive Analysis, Cloud Computing, Cross-functional Team..., Channel Partners, Wireless, Business Development, Mobile Devices, Professional Services, Product Development, Strategic Partnerships, Marketing, Business Alliances, Software Industry, Complex Sales, Executive Management, Sales Enablement, Email Marketing, New Business Development
Education
University of South Florida 1987 — 1990
BSEE, Analog Design
Edward White 1980 — 1982
Mazek Kukkady's Cadence Design Systems Experience May 2014 - Present
Job Lead Design Engineer at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems May 2014 - Present
Cadence Design Systems February 2014 - May 2014
University of Southern California August 2013 - December 2013
University of Southern California August 2013 - December 2013
University of Southern California January 2013 - May 2013
Ittiam Systems September 2010 - July 2012
Skills
Verilog, Embedded Systems, VHDL, C, Embedded Software, Logic Design, ModelSim, Cadence Virtuoso, IEEE 802.11, SoC, ASIC, Perl, Perl Script, WiFi, Computer Architecture, Static Timing Analysis, Cadence Spectre, C++, DRC, RTL design, LVS, FPGA, Physical Design, Cadence Schematic..., Programmable Logic, DRAM, SDRAM, Processors, Synopsys tools, Design Flow, Chipscope, Xilinx ISE, NCSim, ATPG, VLSI, Debugging, Simulations, Cadence
Education
University of Southern California 2012 — 2014
Master's degree, Electrical and Electronics Engineering
RVCE 2006 — 2010
BE, Electronics and Communication
Cadence Design Systems May 2014 - Present
Cadence Design Systems February 2014 - May 2014
University of Southern California August 2013 - December 2013
University of Southern California August 2013 - December 2013
University of Southern California January 2013 - May 2013
Ittiam Systems September 2010 - July 2012
Skills
Verilog, Embedded Systems, VHDL, C, Embedded Software, Logic Design, ModelSim, Cadence Virtuoso, IEEE 802.11, SoC, ASIC, Perl, Perl Script, WiFi, Computer Architecture, Static Timing Analysis, Cadence Spectre, C++, DRC, RTL design, LVS, FPGA, Physical Design, Cadence Schematic..., Programmable Logic, DRAM, SDRAM, Processors, Synopsys tools, Design Flow, Chipscope, Xilinx ISE, NCSim, ATPG, VLSI, Debugging, Simulations, Cadence
Education
University of Southern California 2012 — 2014
Master's degree, Electrical and Electronics Engineering
RVCE 2006 — 2010
BE, Electronics and Communication
Deng Pan's Cadence Design Systems Experience June 2014 - Present
Job Principal Software Engineer at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems June 2014 - Present
Cadence Design Systems December 2012 - June 2014
Allied Telesis November 2006 - November 2012
Skills
C, C++, Verilog, VHDL, ModelSim, Algorithm Design, Data Structures, Digital IC Design, Hyperlynx, Signal Integrity, Tcl-Tk, R, Embedded Systems, VLAN, TCP/IP, Wireshark, Routing, LAN Switching, Power Distribution
Education
University of Science and Technology of China 1998 — 2004
Doctor of Philosophy (Ph.D.), Communication and Information System
University of Science and Technology of China 1993 — 1998
Bachelor of Science (BS), Electrical and Electronics Engineering
Cadence Design Systems June 2014 - Present
Cadence Design Systems December 2012 - June 2014
Allied Telesis November 2006 - November 2012
Skills
C, C++, Verilog, VHDL, ModelSim, Algorithm Design, Data Structures, Digital IC Design, Hyperlynx, Signal Integrity, Tcl-Tk, R, Embedded Systems, VLAN, TCP/IP, Wireshark, Routing, LAN Switching, Power Distribution
Education
University of Science and Technology of China 1998 — 2004
Doctor of Philosophy (Ph.D.), Communication and Information System
University of Science and Technology of China 1993 — 1998
Bachelor of Science (BS), Electrical and Electronics Engineering
Hewlett-Packard
SAP
Symantec
Intuit
HP
salesforce.com
Bloomberg LP
Autodesk