Cadence Design Systems
Industry: Software company
DescriptionCadence Design Systems, Inc. is an American multinational electronic design automation software and engineering services company, founded in 1988 by the merger of SDA Systems and ECAD, Inc. CEO: Lip-Bu Tan (Jan 2009–) Headquarters: San Jose, California, United States Revenue: 1.816 billion USD (2016) Subsidiaries: Sigrity, Tensilica, Chip Estimate Corp, nusemi inc,
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Cadence Design Systems Employees
Employee
Years
Job
Industry
Larry Layton Larry Layton's Cadence Design Systems Experience March 2001 - November 2014
Job IC Design Applications Expert
Industry Semiconductors
Experience
Cadence Design Systems March 2001 - November 2014
Avanti Corporation March 1998 - March 2001
Motorola Semiconductor January 1993 - March 1998
Atari Computers 1991 - 1992
Texas Instruments 1983 - 1991
Texas Instruments 1980 - 1983
Skills
Physical Verification, EDA, CAD, Semiconductors, ASIC, IC, TCL, SoC, DFM, Physical Design, Cadence, Electronics
Education
The University of Texas at Dallas 1984 — 1990
Bachelor of Science (BS), Computer Science
Eastern Arizona College 1978 — 1980
AAS, Technology
Eastern Arizona College 1975 — 1976
AAS, Technology
Safford High School 1971 — 1975
Cadence Design Systems March 2001 - November 2014
Avanti Corporation March 1998 - March 2001
Motorola Semiconductor January 1993 - March 1998
Atari Computers 1991 - 1992
Texas Instruments 1983 - 1991
Texas Instruments 1980 - 1983
Skills
Physical Verification, EDA, CAD, Semiconductors, ASIC, IC, TCL, SoC, DFM, Physical Design, Cadence, Electronics
Education
The University of Texas at Dallas 1984 — 1990
Bachelor of Science (BS), Computer Science
Eastern Arizona College 1978 — 1980
AAS, Technology
Eastern Arizona College 1975 — 1976
AAS, Technology
Safford High School 1971 — 1975
Sara Crider Sara Crider's Cadence Design Systems Experience February 1996 - November 2000
Job Program Management and Business Analysis
Industry Information Technology and Services
Experience
Sara Crider Consulting November 2014 - Present
Cisco Systems August 2013 - November 2014
Cisco Systems December 2010 - August 2013
Cisco Systems March 2009 - December 2010
Cisco 2006 - 2009
Cisco Systems November 2001 - January 2006
Cadence Design Systems February 1996 - November 2000
Sun Microsystems April 1992 - February 1996
Skills
Cross-functional Team..., Business Analysis, Integration, Management, Program Management, Project Management, Process Improvement, Requirements Analysis, Virtual Teams, Vendor Management, Enterprise Software, Cloud Computing, Testing, Software Documentation, Project Planning, Analysis, Performance Management, IT Strategy, Leadership, Business Process, Business Intelligence, Software Design, PMP, Requirements Gathering, SaaS, Oracle, CRM, Team Management, Security, Coaching, User Documentation, Software Project..., Business Process..., Mobile Application..., Change Management, Data Center, Training, Talent Management, Mentoring, Product Management, Mobile Applications, Process Architecture, Web Application Design, Application Development, Application Design, Agile & Waterfall..., Design Strategy, PLC, Product Customization, Business Requirements
Education
The George Washington University - School of Business 2006 — 2006
Business Analyst Certification
University of Oregon - Charles H. Lundquist College of Business
MBA
Virginia Polytechnic Institute and State University
BS
Sara Crider Consulting November 2014 - Present
Cisco Systems August 2013 - November 2014
Cisco Systems December 2010 - August 2013
Cisco Systems March 2009 - December 2010
Cisco 2006 - 2009
Cisco Systems November 2001 - January 2006
Cadence Design Systems February 1996 - November 2000
Sun Microsystems April 1992 - February 1996
Skills
Cross-functional Team..., Business Analysis, Integration, Management, Program Management, Project Management, Process Improvement, Requirements Analysis, Virtual Teams, Vendor Management, Enterprise Software, Cloud Computing, Testing, Software Documentation, Project Planning, Analysis, Performance Management, IT Strategy, Leadership, Business Process, Business Intelligence, Software Design, PMP, Requirements Gathering, SaaS, Oracle, CRM, Team Management, Security, Coaching, User Documentation, Software Project..., Business Process..., Mobile Application..., Change Management, Data Center, Training, Talent Management, Mentoring, Product Management, Mobile Applications, Process Architecture, Web Application Design, Application Development, Application Design, Agile & Waterfall..., Design Strategy, PLC, Product Customization, Business Requirements
Education
The George Washington University - School of Business 2006 — 2006
Business Analyst Certification
University of Oregon - Charles H. Lundquist College of Business
MBA
Virginia Polytechnic Institute and State University
BS
Janet Sloan Janet Sloan's Cadence Design Systems Experience September 2014 - Present
Job Program/Project Manager, Product Development & Application Support
Industry Semiconductors
Experience
Cadence Design Systems September 2014 - Present
Exar Corporation March 2011 - March 2014
LSI Logic/Operations and Field Support 2000 - 2003
Field Support/LSI Logic 1994 - 2000
Field Support/LSI Logic 1993 - 1994
Crosspoint Solutions 1991 - 1993
GTE Government Systems 1989 - 1991
Skills
Program Management, Project Management, Process Improvement, Semiconductors, ASIC, SoC, Management, MS Project, SharePoint, Cross-functional Team..., New Product..., Test Automation, FrameMaker, Word, Visio, Training, Product Engineering, PowerPoint, wafer sort, Operations Management, MS Excel, Technical Documentation, ISO Certifications, Team Building, Microsoft Project
Education
The University of Texas at Austin 1983 — 1987
BSEE, Electrical and Electronics Engineering
Cadence Design Systems September 2014 - Present
Exar Corporation March 2011 - March 2014
LSI Logic/Operations and Field Support 2000 - 2003
Field Support/LSI Logic 1994 - 2000
Field Support/LSI Logic 1993 - 1994
Crosspoint Solutions 1991 - 1993
GTE Government Systems 1989 - 1991
Skills
Program Management, Project Management, Process Improvement, Semiconductors, ASIC, SoC, Management, MS Project, SharePoint, Cross-functional Team..., New Product..., Test Automation, FrameMaker, Word, Visio, Training, Product Engineering, PowerPoint, wafer sort, Operations Management, MS Excel, Technical Documentation, ISO Certifications, Team Building, Microsoft Project
Education
The University of Texas at Austin 1983 — 1987
BSEE, Electrical and Electronics Engineering
Ashish Kumar Singla Ashish Kumar Singla's Cadence Design Systems Experience April 2011 - April 2011
Job Design Engineer at Apple Inc.
Industry Semiconductors
Experience
Apple January 2014 - Present
Qualcomm May 2013 - August 2013
Freescale Semiconductor July 2008 - July 2012
Cadence Design Systems April 2011 - April 2011
ST Microelectronics January 2007 - June 2007
Bharat Sanchar Nigam Limited June 2006 - July 2006
Skills
Physical Design, Clock Tree Synthesis, Signal Integrity, Verilog, Cadence Encounter, Calibre, DRC, LVS, Place and Route, Place & Route, Timing Closure, First Encounter, Parasitic Extraction, NanoRoute, P&R, SoC, VLSI, ASIC, RTL design, Cadence Virtuoso, Integrated Circuit..., Low-power Design, Logic Synthesis, Logic Design, Static Timing Analysis, Semiconductors, IC, Computer Architecture, Hardware Architecture, Microcontrollers, RTL, RC Extraction, Primetime, Functional Verification, Cadence, RTL Design
Education
Texas A&M University 2012 — 2013
Master of Science (MS), Computer Engineering
Thapar Institute of Engineering and Technology
Bachelor of Engineering (B.E.), Electronics and Communications Engineering
MSD Senior Secondary Public School, Bathinda - Punjab
Science
Apple January 2014 - Present
Qualcomm May 2013 - August 2013
Freescale Semiconductor July 2008 - July 2012
Cadence Design Systems April 2011 - April 2011
ST Microelectronics January 2007 - June 2007
Bharat Sanchar Nigam Limited June 2006 - July 2006
Skills
Physical Design, Clock Tree Synthesis, Signal Integrity, Verilog, Cadence Encounter, Calibre, DRC, LVS, Place and Route, Place & Route, Timing Closure, First Encounter, Parasitic Extraction, NanoRoute, P&R, SoC, VLSI, ASIC, RTL design, Cadence Virtuoso, Integrated Circuit..., Low-power Design, Logic Synthesis, Logic Design, Static Timing Analysis, Semiconductors, IC, Computer Architecture, Hardware Architecture, Microcontrollers, RTL, RC Extraction, Primetime, Functional Verification, Cadence, RTL Design
Education
Texas A&M University 2012 — 2013
Master of Science (MS), Computer Engineering
Thapar Institute of Engineering and Technology
Bachelor of Engineering (B.E.), Electronics and Communications Engineering
MSD Senior Secondary Public School, Bathinda - Punjab
Science
Robert F. (Bob) Baker Robert F. (Bob) Baker's Cadence Design Systems Experience 1997 - 1998
Job Business Development Professional
Industry Electrical/Electronic Manufacturing
Experience
Ultra Clean Technology July 2011 - 2014
Bourns, Inc. August 2010 - April 2011
EMS July 2009 - August 2010
Microboard Processing, Inc. March 2009 - June 2009
Sanmina-SCI May 2005 - February 2009
Jabil Circuit October 2003 - May 2005
Celestica June 1998 - August 2003
Cadence Design Systems 1997 - 1998
Skills
Manufacturing, Program Management, Business Development, Cross-functional Team..., New Business Development, Business Process..., Engineering, Sales, Supply Chain, Integration, Product Development, Six Sigma, Product Management, Strategy, Management, Electronics, Process Improvement, Supply Chain Management
Education
Almeda University
BA, Business Administration
The Johns Hopkins University
AA, Electrical and Electronics Engineering
Ultra Clean Technology July 2011 - 2014
Bourns, Inc. August 2010 - April 2011
EMS July 2009 - August 2010
Microboard Processing, Inc. March 2009 - June 2009
Sanmina-SCI May 2005 - February 2009
Jabil Circuit October 2003 - May 2005
Celestica June 1998 - August 2003
Cadence Design Systems 1997 - 1998
Skills
Manufacturing, Program Management, Business Development, Cross-functional Team..., New Business Development, Business Process..., Engineering, Sales, Supply Chain, Integration, Product Development, Six Sigma, Product Management, Strategy, Management, Electronics, Process Improvement, Supply Chain Management
Education
Almeda University
BA, Business Administration
The Johns Hopkins University
AA, Electrical and Electronics Engineering
Chaitanya Sankuratri Chaitanya Sankuratri's Cadence Design Systems Experience October 2014 - Present
Job Senior Engineer at Cadence Design Systems
Industry Computer Hardware
Experience
Cadence Design Systems October 2014 - Present
Qualcomm August 2014 - October 2014
AMD August 2012 - July 2014
Ericsson May 2011 - August 2012
Robert Bosch Engineering and Business Solutions Ltd. October 2009 - August 2010
Sankalp Semiconductor Pvt Ltd May 2007 - August 2009
Deshpande Foundation May 2007 - July 2009
Skills
Verilog, VLSI, ASIC, Logic Design, Synopsys Primetime, ModelSim, Synopsys Design Vision, TCL, VHDL, Cadence Virtuoso, SPICE, Xilinx, Integrated Circuit..., C, C++, Python, Spectre, Primetime, Tetramax, SoC Encounter, HSPICE, Cosmoscope, x86 Assembly, Shell Scripting, SystemVerilog, RTL design, Testing, Static Timing Analysis, Computer Architecture, Congestion Analysis, Synopsys tools, Clocking, Physical Design, Logic Synthesis, Place and Route, Methodology, Perl, Microprocessors, RTL coding, Low-power Design, DFT, CMOS, Processors, Cadence, Microarchitecture, Circuit Design, Timing Closure, Hardware Architecture, IC, Mixed Signal
Education
The University of Texas at Dallas 2010 — 2012
Master of Science (M.S.), Electrical Engineering Circuits & Systems
The University of Texas at Dallas 2010 — 2012
Master of Science (M.S.), Electrical Engineering, Circuits
B.V.Bhoomaraddi College of Engineering and Technology (BVBCET) 2005 — 2009
Bachelor of Engineering (B.E.), Electronics and Communication Engineering
Cadence Design Systems October 2014 - Present
Qualcomm August 2014 - October 2014
AMD August 2012 - July 2014
Ericsson May 2011 - August 2012
Robert Bosch Engineering and Business Solutions Ltd. October 2009 - August 2010
Sankalp Semiconductor Pvt Ltd May 2007 - August 2009
Deshpande Foundation May 2007 - July 2009
Skills
Verilog, VLSI, ASIC, Logic Design, Synopsys Primetime, ModelSim, Synopsys Design Vision, TCL, VHDL, Cadence Virtuoso, SPICE, Xilinx, Integrated Circuit..., C, C++, Python, Spectre, Primetime, Tetramax, SoC Encounter, HSPICE, Cosmoscope, x86 Assembly, Shell Scripting, SystemVerilog, RTL design, Testing, Static Timing Analysis, Computer Architecture, Congestion Analysis, Synopsys tools, Clocking, Physical Design, Logic Synthesis, Place and Route, Methodology, Perl, Microprocessors, RTL coding, Low-power Design, DFT, CMOS, Processors, Cadence, Microarchitecture, Circuit Design, Timing Closure, Hardware Architecture, IC, Mixed Signal
Education
The University of Texas at Dallas 2010 — 2012
Master of Science (M.S.), Electrical Engineering Circuits & Systems
The University of Texas at Dallas 2010 — 2012
Master of Science (M.S.), Electrical Engineering, Circuits
B.V.Bhoomaraddi College of Engineering and Technology (BVBCET) 2005 — 2009
Bachelor of Engineering (B.E.), Electronics and Communication Engineering
Tim Baldwin Tim Baldwin's Cadence Design Systems Experience 1997 - 2000
Job Product Leader. Agile. Learn fast. Embrace change.
Industry Computer Software
Experience
Mentor Graphics June 2014 - Present
Haivision (via acquisition of Kulabyte) August 2011 - May 2014
Kulabyte September 2009 - July 2011
Laflin Ltd May 2007 - July 2011
Pyxis Technology July 2005 - April 2007
Magma Design Automation August 2003 - June 2005
Monterey Design Systems 2000 - 2003
Cadence Design Systems 1997 - 2000
International Meta Systems 1996 - 1997
AMD August 1993 - March 1996
Skills
Cloud Computing, SaaS, Streaming Media, Live Streaming, Product Management, Product Marketing, Technical Marketing, Strategic Partnerships, Business Development, Product Development, Sales, Linux, Business Intelligence, User Experience, Microprocessors, Flash, SQL, EDA, Usability, Semiconductors, Virtualization, Digital Media, Start-ups, Cross-functional Team..., SoC, Strategy, H.264, Go-to-market Strategy, Video, VOD, Mobile Devices, Web Video, IPTV, Agile Methodologies, Entrepreneurship, Akamai, Encoding, Internet Services
Education
The University of Texas at Austin 1988 — 1993
BS, Electrical and Computer Engineering
The University of Texas at Austin 1988 — 1993
B.S, Electrical and Computer Engineering
Mentor Graphics June 2014 - Present
Haivision (via acquisition of Kulabyte) August 2011 - May 2014
Kulabyte September 2009 - July 2011
Laflin Ltd May 2007 - July 2011
Pyxis Technology July 2005 - April 2007
Magma Design Automation August 2003 - June 2005
Monterey Design Systems 2000 - 2003
Cadence Design Systems 1997 - 2000
International Meta Systems 1996 - 1997
AMD August 1993 - March 1996
Skills
Cloud Computing, SaaS, Streaming Media, Live Streaming, Product Management, Product Marketing, Technical Marketing, Strategic Partnerships, Business Development, Product Development, Sales, Linux, Business Intelligence, User Experience, Microprocessors, Flash, SQL, EDA, Usability, Semiconductors, Virtualization, Digital Media, Start-ups, Cross-functional Team..., SoC, Strategy, H.264, Go-to-market Strategy, Video, VOD, Mobile Devices, Web Video, IPTV, Agile Methodologies, Entrepreneurship, Akamai, Encoding, Internet Services
Education
The University of Texas at Austin 1988 — 1993
BS, Electrical and Computer Engineering
The University of Texas at Austin 1988 — 1993
B.S, Electrical and Computer Engineering
Naveen Surya K's Cadence Design Systems Experience February 2015 - Present
Job Senior Application Engineer at Cadence Design Systems
Industry Electrical/Electronic Manufacturing
Experience
Cadence Design Systems February 2015 - Present
ON Semiconductor May 2014 - August 2014
ARM May 2013 - December 2013
Skills
Verilog, VHDL, Matlab, Cadence Virtuoso, Cadence, Pspice, ModelSim, Circuit Design, SPICE, Digital Electronics, C, C++, Synopsys Nanotime, Synopsys Finesim, Computer Architecture, VLSI, Integrated Circuit..., ASIC, IC, EDA, Perl, Static Timing Analysis, Simulations
Education
The University of Texas at Dallas 2012 — 2014
Master's degree, Electrical and Electronics Engineering, 3.6
SRM University 2008 — 2012
bachelor of technology, electronics and communication, 8.1
Chettinad vidyashram , chennai 1994 — 2008
Cadence Design Systems February 2015 - Present
ON Semiconductor May 2014 - August 2014
ARM May 2013 - December 2013
Skills
Verilog, VHDL, Matlab, Cadence Virtuoso, Cadence, Pspice, ModelSim, Circuit Design, SPICE, Digital Electronics, C, C++, Synopsys Nanotime, Synopsys Finesim, Computer Architecture, VLSI, Integrated Circuit..., ASIC, IC, EDA, Perl, Static Timing Analysis, Simulations
Education
The University of Texas at Dallas 2012 — 2014
Master's degree, Electrical and Electronics Engineering, 3.6
SRM University 2008 — 2012
bachelor of technology, electronics and communication, 8.1
Chettinad vidyashram , chennai 1994 — 2008
Amir Attarha Amir Attarha's Cadence Design Systems Experience June 2004 - Present
Job Sr. Applications Engineering Consultant for Functional Verification at Mentor Graphics
Industry Computer Hardware
Experience
Mentor Graphics August 2015 - Present
Cadence Design Systems June 2004 - Present
LSI Corporation March 2000 - June 2004
Education
The University of Texas at Dallas 1999 — 2003
Doctor of Philosophy (Ph.D.), EE
University of Tehran
Master's degree, Computer Engineering
Mentor Graphics August 2015 - Present
Cadence Design Systems June 2004 - Present
LSI Corporation March 2000 - June 2004
Education
The University of Texas at Dallas 1999 — 2003
Doctor of Philosophy (Ph.D.), EE
University of Tehran
Master's degree, Computer Engineering
Pavan Kumar Allareddy Pavan Kumar Allareddy's Cadence Design Systems Experience July 2004 - May 2013
Job Experienced Sales and Product Development Professional, Samsung Electronics
Industry Consumer Electronics
Experience
Samsung Electronics May 2011 - Present
Deloitte Digital July 2013 - September 2013
Cadence Design Systems July 2004 - May 2013
Emerson Process Management February 2013 - April 2013
UniMed Direct February 2013 - April 2013
Sun Microsystems June 2002 - September 2002
Skills
SoC, Low-power Design, Business Analysis, VLSI, Testing, Siebel, Processors, Architecture, EDA, Leadership, Product Management
Education
The University of Texas at Austin - The Red McCombs School of Business 2012 — 2015
Master of Business Administration (MBA)
University of California, Los Angeles 2002 — 2004
Master of Science (M.S.), Computer Engineering
University of Madras 1998 — 2002
B.E, Computer Science
Samsung Electronics May 2011 - Present
Deloitte Digital July 2013 - September 2013
Cadence Design Systems July 2004 - May 2013
Emerson Process Management February 2013 - April 2013
UniMed Direct February 2013 - April 2013
Sun Microsystems June 2002 - September 2002
Skills
SoC, Low-power Design, Business Analysis, VLSI, Testing, Siebel, Processors, Architecture, EDA, Leadership, Product Management
Education
The University of Texas at Austin - The Red McCombs School of Business 2012 — 2015
Master of Business Administration (MBA)
University of California, Los Angeles 2002 — 2004
Master of Science (M.S.), Computer Engineering
University of Madras 1998 — 2002
B.E, Computer Science
Kiran Jonnavittula Kiran Jonnavittula's Cadence Design Systems Experience June 2012 - May 2015
Job Sr Applications Engineer at ANSYS, Inc.
Industry Semiconductors
Experience
ANSYS, Inc. June 2015 - Present
Cadence Design Systems June 2012 - May 2015
Magma Design Automation July 2011 - May 2012
Siemens Informations Systems Ltd July 2008 - August 2009
Skills
Verilog, VHDL, C, TCL and Perl..., Static Timing Analysis, Physical Design, ASIC VLSI Design, USB, Semiconductors, EDA, VHDL, Linux, ASIC, TCL, SoC, Low-power Design
Education
The University of Texas at Arlington 2009 — 2011
Masters in Electrical Engineering, VLSI and Computer Architecture
Visvesvaraya Technological University 2004 — 2008
Bachelor of Engineering (BE), Electrical, Electronics and Communications Engineering
ANSYS, Inc. June 2015 - Present
Cadence Design Systems June 2012 - May 2015
Magma Design Automation July 2011 - May 2012
Siemens Informations Systems Ltd July 2008 - August 2009
Skills
Verilog, VHDL, C, TCL and Perl..., Static Timing Analysis, Physical Design, ASIC VLSI Design, USB, Semiconductors, EDA, VHDL, Linux, ASIC, TCL, SoC, Low-power Design
Education
The University of Texas at Arlington 2009 — 2011
Masters in Electrical Engineering, VLSI and Computer Architecture
Visvesvaraya Technological University 2004 — 2008
Bachelor of Engineering (BE), Electrical, Electronics and Communications Engineering
Einat Orlev Einat Orlev's Cadence Design Systems Experience October 2012 - October 2014
Job HR Director & Business Partner at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems October 2012 - October 2014
Integrated Device Technology Inc 2010 - October 2012
Integrated Device Technology Inc 2007 - 2010
Intel 1999 - 2006
Skills
Talent Management, Organizational..., Succession Planning, Employee Relations, Employee Engagement, Performance Management, Organizational Design, Onboarding, Leadership Development, Change Management, Human Resources, Workforce Planning, Organizational...
Education
The Hebrew University 1999 — 2001
Msc, Sociology - Organizational studies
The Hebrew University 1994 — 1997
BA, Sociology and Communication
Cadence Design Systems October 2012 - October 2014
Integrated Device Technology Inc 2010 - October 2012
Integrated Device Technology Inc 2007 - 2010
Intel 1999 - 2006
Skills
Talent Management, Organizational..., Succession Planning, Employee Relations, Employee Engagement, Performance Management, Organizational Design, Onboarding, Leadership Development, Change Management, Human Resources, Workforce Planning, Organizational...
Education
The Hebrew University 1999 — 2001
Msc, Sociology - Organizational studies
The Hebrew University 1994 — 1997
BA, Sociology and Communication
Randy Kieschnick Randy Kieschnick's Cadence Design Systems Experience February 1998 - March 2000
Job Contractor Sr. Layout Designer at ARM
Industry Semiconductors
Experience
Freescale Semiconductor October 2014 - July 2015
Freescale Semiconductor April 2014 - July 2014
IC Enable March 2013 - October 2013
Advanced Micro Devices (AMD) February 2002 - December 2012
Alchemy Semiconductor 2000 - 2002
Cadence Design Systems February 1998 - March 2000
Digital Equipment Corporation January 1996 - February 1998
Skills
IC, LVS, CMOS, Mixed Signal, DRC, ASIC, Physical Design, VLSI, Silicon, SoC, Semiconductors, Microprocessors, Power Management, Cadence Virtuoso, Integrated Circuit..., Physical Verification, Floorplanning, PLL, Circuit Design, Analog
Education
Texas State Technical College 1989 — 1991
Associate of Arts (AA), Commercial Art and Advertising
Freescale Semiconductor October 2014 - July 2015
Freescale Semiconductor April 2014 - July 2014
IC Enable March 2013 - October 2013
Advanced Micro Devices (AMD) February 2002 - December 2012
Alchemy Semiconductor 2000 - 2002
Cadence Design Systems February 1998 - March 2000
Digital Equipment Corporation January 1996 - February 1998
Skills
IC, LVS, CMOS, Mixed Signal, DRC, ASIC, Physical Design, VLSI, Silicon, SoC, Semiconductors, Microprocessors, Power Management, Cadence Virtuoso, Integrated Circuit..., Physical Verification, Floorplanning, PLL, Circuit Design, Analog
Education
Texas State Technical College 1989 — 1991
Associate of Arts (AA), Commercial Art and Advertising
Nathan PK Nathan PK's Cadence Design Systems Experience January 2014 - Present
Job Senior Application Engineer at Cadence Design Systems
Industry Electrical/Electronic Manufacturing
Experience
Cadence Design Systems January 2014 - Present
ON Semiconductor June 2013 - December 2013
UTD August 2011 - December 2013
Intel Corporation September 2012 - January 2013
ON Semiconductor June 2012 - August 2012
Skills
Verilog, VHDL, C++, Cadence Virtuoso, Xilinx, Pspice, Matlab, C, ModelSim, Labview, Analog Design, VLSI, Unix, MS Office Suite, Digital Design, Computer Architecture, Electrical Engineering, Circuit Design, Simulink, Primetime, EDA, FPGA, RTL design, LVS, Analog Circuit Design, Digital Electronics, Simulation, SystemVerilog, ASIC, CMOS, Python, Microprocessors, Testing, Hardware Design, Physical Design, Simulation Software, Orcad, Perl, Linux, DFT, Static Timing Analysis, Formal Verification, Tcl-Tk, Embedded Systems, PLL, DRC, Integrated Circuit..., TCL, Digital IC Design, Simulations
Education
The University of Texas at Dallas 2011 — 2013
MS, Electrical Engineering
Easwari Engineering College 2007 — 2011
Bachelor of Engineering, in "Electronics and Communication Engineering"
Cadence Design Systems January 2014 - Present
ON Semiconductor June 2013 - December 2013
UTD August 2011 - December 2013
Intel Corporation September 2012 - January 2013
ON Semiconductor June 2012 - August 2012
Skills
Verilog, VHDL, C++, Cadence Virtuoso, Xilinx, Pspice, Matlab, C, ModelSim, Labview, Analog Design, VLSI, Unix, MS Office Suite, Digital Design, Computer Architecture, Electrical Engineering, Circuit Design, Simulink, Primetime, EDA, FPGA, RTL design, LVS, Analog Circuit Design, Digital Electronics, Simulation, SystemVerilog, ASIC, CMOS, Python, Microprocessors, Testing, Hardware Design, Physical Design, Simulation Software, Orcad, Perl, Linux, DFT, Static Timing Analysis, Formal Verification, Tcl-Tk, Embedded Systems, PLL, DRC, Integrated Circuit..., TCL, Digital IC Design, Simulations
Education
The University of Texas at Dallas 2011 — 2013
MS, Electrical Engineering
Easwari Engineering College 2007 — 2011
Bachelor of Engineering, in "Electronics and Communication Engineering"
Mo'taz Al-Hami's Cadence Design Systems Experience June 2015 - Present
Job Hardware and Computer Vision Engineer (Intern) at Cadence Design Systems
Industry Higher Education
Experience
Cadence Design Systems June 2015 - Present
Temple University January 2012 - Present
Temple University September 2011 - Present
Temple University September 2011 - Present
Sur University September 2008 - June 2011
Zarqa University September 2007 - May 2008
Zarqa University September 2006 - May 2008
Skills
Computer Vision, Robotics, Machine Learning, Statistics, Higher Education, Teaching, Research, University Teaching, Matlab, Data Analysis, Lecturing, Science, Qualitative Research, Computer Science, Java, Algorithms, Microsoft Office, C++
Education
Temple University
Doctor of Philosophy (Ph.D.), Computer Science
Jordan University of Science and Technology 2003 — 2006
Master's Degree, Computer Science
Cadence Design Systems June 2015 - Present
Temple University January 2012 - Present
Temple University September 2011 - Present
Temple University September 2011 - Present
Sur University September 2008 - June 2011
Zarqa University September 2007 - May 2008
Zarqa University September 2006 - May 2008
Skills
Computer Vision, Robotics, Machine Learning, Statistics, Higher Education, Teaching, Research, University Teaching, Matlab, Data Analysis, Lecturing, Science, Qualitative Research, Computer Science, Java, Algorithms, Microsoft Office, C++
Education
Temple University
Doctor of Philosophy (Ph.D.), Computer Science
Jordan University of Science and Technology 2003 — 2006
Master's Degree, Computer Science
Landon Laws Landon Laws's Cadence Design Systems Experience 2014 - Present
Job Hardware Engineer
Industry Computer Hardware
Experience
Cadence Design Systems 2014 - Present
National Instruments 2009 - 2012
Skills
Hardware Architecture, Verilog, VHDL, Embedded Systems, PCB design, Labview, Debugging, Signal Integrity
Education
The University of Texas at Austin 2005 — 2009
Bachelor of Science (BS), Electrical Engineering
Cadence Design Systems 2014 - Present
National Instruments 2009 - 2012
Skills
Hardware Architecture, Verilog, VHDL, Embedded Systems, PCB design, Labview, Debugging, Signal Integrity
Education
The University of Texas at Austin 2005 — 2009
Bachelor of Science (BS), Electrical Engineering
matt zhang's Cadence Design Systems Experience January 2003 - December 2006
Job PMTS (principle member of technical staff, 首席工程师) at Maxim integrated products
Industry Semiconductors
Experience
maxim integrated products March 2007 - Present
Maxim integrated products March 2007 - Present
Cadence Design Systems January 2003 - December 2006
BTA/Celestry (A Cadence Company) February 2000 - December 2002
Skills
bsim3, bsim4, bsimsoi..., reliability modeling..., Cadence Relxpert..., MFC, Visual Basic..., BJT, RF device modeling, VHDL/Verilog synthesis,..., Virtuoso layout and VXL, CMOS image sensor..., Sensors, Optics, Physics, CMOS, Cadence
Education
The Hong Kong University of Science and Technology 1995 — 2000
Doctor of Philosophy (PhD), Electrical and computer engineering, microelectronics major
university of science and technology of China 1992 — 1995
Master of Science (MS), condensed matter physics
university of science and technology of China 1988 — 1992
Bachelor of Science (BS), physics
JiLin No.1 High School 1985 — 1988
maxim integrated products March 2007 - Present
Maxim integrated products March 2007 - Present
Cadence Design Systems January 2003 - December 2006
BTA/Celestry (A Cadence Company) February 2000 - December 2002
Skills
bsim3, bsim4, bsimsoi..., reliability modeling..., Cadence Relxpert..., MFC, Visual Basic..., BJT, RF device modeling, VHDL/Verilog synthesis,..., Virtuoso layout and VXL, CMOS image sensor..., Sensors, Optics, Physics, CMOS, Cadence
Education
The Hong Kong University of Science and Technology 1995 — 2000
Doctor of Philosophy (PhD), Electrical and computer engineering, microelectronics major
university of science and technology of China 1992 — 1995
Master of Science (MS), condensed matter physics
university of science and technology of China 1988 — 1992
Bachelor of Science (BS), physics
JiLin No.1 High School 1985 — 1988
Stuart McDow Stuart McDow's Cadence Design Systems Experience January 2015 - Present
Job Senior Principal Software Engineer at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems January 2015 - Present
PGS May 2014 - January 2015
RGM Advisors, LLC January 2014 - May 2014
Ticom Geomatics, Inc. (Acquired by Six3 Systems, Inc. (Acquired by CACI International, Inc.)) April 2011 - January 2014
Ticom Geomatics, Inc. (Acquired by Six3 Systems, Inc. (Acquired by CACI International, Inc.)) August 2009 - March 2011
Ticom Geomatics, Inc. (Acquired by Six3 Systems, Inc. (Acquired by CACI International, Inc.)) December 2006 - July 2009
Ticom Geomatics, Inc. (Acquired by Six3 Systems, Inc. (Acquired by CACI International, Inc.)) August 1998 - December 2006
Applied Research Labs, University of Texas at Austin November 1996 - July 1998
Skills
C++, C, Linux, Perl, MySQL, Bash, Python, C/C++ STL, Boost C++, TCP/IP, Protocol Buffers, Subversion, Object Oriented Design, Distributed Systems, Algorithms, Software Engineering, Systems Engineering, Git, Debugging, REST, Embedded Systems, Requirements Analysis, Shell Scripting, Agile Methodologies, Red Hat Linux, Unix, Software Design, TCL, Digital Signal..., XML, Maven, Jenkins, Signal Processing, Embedded Linux, GNU Make, CMake, GNU Debugger, System Administration, Android, protobufs, Node.js, V8, Perl Automation, Perl Script, Linux System..., CentOS, Software Development, Atlassian JIRA, JIRA, Confluence
Education
The University of Texas at Austin
BSEE, Electrical and Computer Engineering
Cadence Design Systems January 2015 - Present
PGS May 2014 - January 2015
RGM Advisors, LLC January 2014 - May 2014
Ticom Geomatics, Inc. (Acquired by Six3 Systems, Inc. (Acquired by CACI International, Inc.)) April 2011 - January 2014
Ticom Geomatics, Inc. (Acquired by Six3 Systems, Inc. (Acquired by CACI International, Inc.)) August 2009 - March 2011
Ticom Geomatics, Inc. (Acquired by Six3 Systems, Inc. (Acquired by CACI International, Inc.)) December 2006 - July 2009
Ticom Geomatics, Inc. (Acquired by Six3 Systems, Inc. (Acquired by CACI International, Inc.)) August 1998 - December 2006
Applied Research Labs, University of Texas at Austin November 1996 - July 1998
Skills
C++, C, Linux, Perl, MySQL, Bash, Python, C/C++ STL, Boost C++, TCP/IP, Protocol Buffers, Subversion, Object Oriented Design, Distributed Systems, Algorithms, Software Engineering, Systems Engineering, Git, Debugging, REST, Embedded Systems, Requirements Analysis, Shell Scripting, Agile Methodologies, Red Hat Linux, Unix, Software Design, TCL, Digital Signal..., XML, Maven, Jenkins, Signal Processing, Embedded Linux, GNU Make, CMake, GNU Debugger, System Administration, Android, protobufs, Node.js, V8, Perl Automation, Perl Script, Linux System..., CentOS, Software Development, Atlassian JIRA, JIRA, Confluence
Education
The University of Texas at Austin
BSEE, Electrical and Computer Engineering
Deepak Pabari Deepak Pabari's Cadence Design Systems Experience 1991 - 1994
Job Senior Principal Engineer at Microsemi Corporation
Industry Semiconductors
Experience
Microsemi Corporation 2014 - Present
Xilinx 2003 - 2014
Chameleon Systems 1999 - 2003
Frontline Design Automation 1994 - 1999
Cadence Design Systems 1991 - 1994
Skills
FPGA, Verilog, Simulations, ASIC, Perl, Xilinx, Hardware Architecture, Testing, Software Development, Simulation, Modeling, Debugging, C++, EDA, Semiconductors, Digital Signal...
Education
The University of Texas at Austin
M.S., Computer Engineering
University Of Bombay
Bachelor's Degree, Electrical and Electronics Engineering
Microsemi Corporation 2014 - Present
Xilinx 2003 - 2014
Chameleon Systems 1999 - 2003
Frontline Design Automation 1994 - 1999
Cadence Design Systems 1991 - 1994
Skills
FPGA, Verilog, Simulations, ASIC, Perl, Xilinx, Hardware Architecture, Testing, Software Development, Simulation, Modeling, Debugging, C++, EDA, Semiconductors, Digital Signal...
Education
The University of Texas at Austin
M.S., Computer Engineering
University Of Bombay
Bachelor's Degree, Electrical and Electronics Engineering
Kamran Torabi Kamran Torabi's Cadence Design Systems Experience October 2012 - January 2014
Job Director of Engineering, Google
Industry Computer Networking
Experience
Google January 2014 - Present
Cadence Design Systems October 2012 - January 2014
Cisco Systems January 2007 - October 2012
Greenfield Networks February 2001 - December 2006
Cisco Systems, Grand Junction Networks 1995 - 2001
Sierra Research and Technology 1993 - 1995
Skills
ASIC, Networking, Emulation, Digital Electronics, Networking Products, Networking Protocol, Management, Executive Management, Product Design, Product Launch, Software Project..., Ethernet, Start-ups, Cloud Computing, Cross-functional Team...
Education
The University of Texas at Austin
MS, Electrical Engineering
The University of Texas at Austin
BS, Electrical Engineering
Google January 2014 - Present
Cadence Design Systems October 2012 - January 2014
Cisco Systems January 2007 - October 2012
Greenfield Networks February 2001 - December 2006
Cisco Systems, Grand Junction Networks 1995 - 2001
Sierra Research and Technology 1993 - 1995
Skills
ASIC, Networking, Emulation, Digital Electronics, Networking Products, Networking Protocol, Management, Executive Management, Product Design, Product Launch, Software Project..., Ethernet, Start-ups, Cloud Computing, Cross-functional Team...
Education
The University of Texas at Austin
MS, Electrical Engineering
The University of Texas at Austin
BS, Electrical Engineering
Sergey Khaikin Sergey Khaikin's Cadence Design Systems Experience June 2014 - Present
Job Staff Applications Engineer at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems June 2014 - Present
Jasper Design Automation March 2011 - June 2014
Intel January 2008 - March 2011
Intel July 2002 - January 2008
Atid Computers LTD October 1995 - March 2000
Skills
EDA, TCL, Debugging, Verilog, Perl, SystemVerilog, Processors, SoC, C, C++, Functional Verification, Formal Verification, Intel, Computer Architecture, Microprocessors, Software Engineering, ASIC, Simulations, VLSI, RTL design, Hardware Architecture, Volleyball
Education
Technion - Israel Institute of Technology 2000 — 2004
B.Sc, Computer Science
Cadence Design Systems June 2014 - Present
Jasper Design Automation March 2011 - June 2014
Intel January 2008 - March 2011
Intel July 2002 - January 2008
Atid Computers LTD October 1995 - March 2000
Skills
EDA, TCL, Debugging, Verilog, Perl, SystemVerilog, Processors, SoC, C, C++, Functional Verification, Formal Verification, Intel, Computer Architecture, Microprocessors, Software Engineering, ASIC, Simulations, VLSI, RTL design, Hardware Architecture, Volleyball
Education
Technion - Israel Institute of Technology 2000 — 2004
B.Sc, Computer Science
Jeff Vopat Jeff Vopat's Cadence Design Systems Experience
Job Systems Engineer at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems
Skills
Semiconductors, Perl, SoC, Linux, TCL, EDA, Cloud Computing, Verilog, Software Development, Unix, ASIC, Enterprise Software, Programming, Debugging, Shell Scripting, Agile Methodologies, IT Infrastructure Design, Data Center, IT Operations, Embedded Systems, IT Infrastructure..., IT Solutions, Simulations
Education
The University of Texas at Austin 1992 — 1997
Cadence Design Systems
Skills
Semiconductors, Perl, SoC, Linux, TCL, EDA, Cloud Computing, Verilog, Software Development, Unix, ASIC, Enterprise Software, Programming, Debugging, Shell Scripting, Agile Methodologies, IT Infrastructure Design, Data Center, IT Operations, Embedded Systems, IT Infrastructure..., IT Solutions, Simulations
Education
The University of Texas at Austin 1992 — 1997
Steve Glaser Steve Glaser's Cadence Design Systems Experience October 2007 - January 2011
Job Senior VP, Corporate Strategy & Marketing, Xilinx
Industry Semiconductors
Experience
Xilinx January 2011 - Present
Cadence Design Systems October 2007 - January 2011
Cadence Design Systems 2005 - 2007
Verisity Design 2002 - 2005
Cadence Design Systems 1999 - 2002
Cadence Design Systems 1996 - 1999
Cadence Alta Group (System Level Design Subsidiary, started with Redwood Design) 1992 - 1996
Compass Design Automation 1991 - 1992
VLSI Technology 1988 - 1991
Hughes Aircraft 1983 - 1988
Education
The University of British Columbia 1986 — 1988
Masters, Business Administration
University of California, Santa Barbara 1979 — 1983
BS, Electrical and Computer Engineering
Palos Verdes High School 1976 — 1979
Xilinx January 2011 - Present
Cadence Design Systems October 2007 - January 2011
Cadence Design Systems 2005 - 2007
Verisity Design 2002 - 2005
Cadence Design Systems 1999 - 2002
Cadence Design Systems 1996 - 1999
Cadence Alta Group (System Level Design Subsidiary, started with Redwood Design) 1992 - 1996
Compass Design Automation 1991 - 1992
VLSI Technology 1988 - 1991
Hughes Aircraft 1983 - 1988
Education
The University of British Columbia 1986 — 1988
Masters, Business Administration
University of California, Santa Barbara 1979 — 1983
BS, Electrical and Computer Engineering
Palos Verdes High School 1976 — 1979
Meirav Nitzan Meirav Nitzan's Cadence Design Systems Experience April 2006 - July 2007
Job Lead Verification Methodologist at Xilinx
Industry Computer Software
Experience
Xilinx November 2010 - Present
TI July 2009 - March 2010
Cadence Design Systems April 2006 - July 2007
Cadence Design Systems 2005 - 2006
Verisity 2001 - 2005
Avant! 1997 - 2001
interHDL, Inc. 1996 - 1998
Skills
Functional Verification, EDA, ASIC, SystemVerilog, SoC, Specman, Verilog, NCSim, RTL design, TCL, VLSI, Semiconductors, Formal Verification, IC, FPGA, SystemC
Education
Tel Aviv University
M.Sc., EE
Xilinx November 2010 - Present
TI July 2009 - March 2010
Cadence Design Systems April 2006 - July 2007
Cadence Design Systems 2005 - 2006
Verisity 2001 - 2005
Avant! 1997 - 2001
interHDL, Inc. 1996 - 1998
Skills
Functional Verification, EDA, ASIC, SystemVerilog, SoC, Specman, Verilog, NCSim, RTL design, TCL, VLSI, Semiconductors, Formal Verification, IC, FPGA, SystemC
Education
Tel Aviv University
M.Sc., EE
Anders Nordstrom's Cadence Design Systems Experience May 2005 - November 2008
Job Senior CAE, Verification Group at Synopsys
Industry Semiconductors
Experience
Synopsys May 2013 - Present
Verilab January 2011 - May 2013
OneSpin Solutions December 2008 - January 2011
NextOp Software April 2009 - June 2009
ASIC Design and Verification November 2008 - June 2009
Cadence Design Systems May 2005 - November 2008
Cadence Design Systems October 2003 - May 2005
Elliptic Semiconductor November 2002 - September 2003
ASIC Design and Verification 2001 - 2002
Nortel Networks September 1990 - October 2001
Skills
Hardware Verification, SystemVerilog, Verilog, Formal Verification, Functional Verification, RTL design, VHDL, RTL coding, SystemC, OVM, SVA, PSL, ASIC, Open Verification..., EDA, DFT, VLSI, SoC, Analog, IC, Mixed Signal, Hardware, Semiconductors, Simulations, Integrated Circuit...
Education
The Faculty of Engineering at Lund University 1984 — 1989
MSEE, Electrical Engineering
Synopsys May 2013 - Present
Verilab January 2011 - May 2013
OneSpin Solutions December 2008 - January 2011
NextOp Software April 2009 - June 2009
ASIC Design and Verification November 2008 - June 2009
Cadence Design Systems May 2005 - November 2008
Cadence Design Systems October 2003 - May 2005
Elliptic Semiconductor November 2002 - September 2003
ASIC Design and Verification 2001 - 2002
Nortel Networks September 1990 - October 2001
Skills
Hardware Verification, SystemVerilog, Verilog, Formal Verification, Functional Verification, RTL design, VHDL, RTL coding, SystemC, OVM, SVA, PSL, ASIC, Open Verification..., EDA, DFT, VLSI, SoC, Analog, IC, Mixed Signal, Hardware, Semiconductors, Simulations, Integrated Circuit...
Education
The Faculty of Engineering at Lund University 1984 — 1989
MSEE, Electrical Engineering
Wei Xue Wei Xue's Cadence Design Systems Experience January 2015 - Present
Job Product Validation Engineer II at Cadence Design Systems
Industry Computer Hardware
Experience
Cadence Design Systems January 2015 - Present
Entropic Communications January 2014 - May 2014
Skills
Verilog, FPGA, Cadence Virtuoso, Xilinx ISE, C/C++, Matlab, Altera Quartus, Rhino 3D, MySQL, Perl
Education
Texas A&M University 2012 — 2014
Master of Engineering (M.Eng.), Computer Engineering
Zhejiang University 2008 — 2012
Bachelor of Engineering (B.Eng.), Electrical, Electronics and Communications Engineering
Cadence Design Systems January 2015 - Present
Entropic Communications January 2014 - May 2014
Skills
Verilog, FPGA, Cadence Virtuoso, Xilinx ISE, C/C++, Matlab, Altera Quartus, Rhino 3D, MySQL, Perl
Education
Texas A&M University 2012 — 2014
Master of Engineering (M.Eng.), Computer Engineering
Zhejiang University 2008 — 2012
Bachelor of Engineering (B.Eng.), Electrical, Electronics and Communications Engineering
Ellen Cohen Ellen Cohen's Cadence Design Systems Experience 2001 - 2005
Job West Coast Sales and Business Development at Voci Technologies Incorporated
Industry Computer Software
Experience
Voci Technologies January 2015 - Present
Loqate Inc. September 2010 - December 2014
VMware February 2009 - October 2009
NetApp (nee Network Appliance) May 2007 - November 2008
Sun Microsystems March 2005 - May 2007
Cadence Design Systems 2001 - 2005
Beyondwork 1999 - 2001
Madge Networks/Lannet/Lucent/Avaya 1994 - 1999
Nice Systems 1994 - 1995
Applied Materials 1991 - 1994
Skills
Process Improvement, Program Management, Cross-functional Team..., Strategic Partnerships, Team Leadership, Account Management, OEM Sales / Business..., Business Process..., Management, Operations Management, Business Development, Quality Assurance, Leadership, Product Management, Business Process, Cloud Computing, Enterprise Software, Marketing, SaaS, Product Marketing, Sales, Risk Management, Project Planning, Business Intelligence, Business Strategy, Agile Methodologies, Scrum, Integration, Start-ups, Go-to-market Strategy, Pre-sales, Mobile Devices, Telecommunications, Mergers & Acquisitions, Salesforce.com, Business Alliances, Professional Services, Testing, Strategy, Software Project..., CRM, Analytics, Executive Management, Solution Selling, Lead Generation, Channel Partners, Partner Management, Sales Enablement, Software Industry, Demand Generation
Education
Tulane University 1977 — 1981
BA, Social science
The Hebrew University 1979 — 1980
One Year Program
Highland Park 1974 — 1977
High School Diploma
Voci Technologies January 2015 - Present
Loqate Inc. September 2010 - December 2014
VMware February 2009 - October 2009
NetApp (nee Network Appliance) May 2007 - November 2008
Sun Microsystems March 2005 - May 2007
Cadence Design Systems 2001 - 2005
Beyondwork 1999 - 2001
Madge Networks/Lannet/Lucent/Avaya 1994 - 1999
Nice Systems 1994 - 1995
Applied Materials 1991 - 1994
Skills
Process Improvement, Program Management, Cross-functional Team..., Strategic Partnerships, Team Leadership, Account Management, OEM Sales / Business..., Business Process..., Management, Operations Management, Business Development, Quality Assurance, Leadership, Product Management, Business Process, Cloud Computing, Enterprise Software, Marketing, SaaS, Product Marketing, Sales, Risk Management, Project Planning, Business Intelligence, Business Strategy, Agile Methodologies, Scrum, Integration, Start-ups, Go-to-market Strategy, Pre-sales, Mobile Devices, Telecommunications, Mergers & Acquisitions, Salesforce.com, Business Alliances, Professional Services, Testing, Strategy, Software Project..., CRM, Analytics, Executive Management, Solution Selling, Lead Generation, Channel Partners, Partner Management, Sales Enablement, Software Industry, Demand Generation
Education
Tulane University 1977 — 1981
BA, Social science
The Hebrew University 1979 — 1980
One Year Program
Highland Park 1974 — 1977
High School Diploma
Aniket Pingley's Cadence Design Systems Experience August 2007 - December 2007
Job Software Development Engineer, Intel Corporation
Industry Computer Software
Experience
Intel Corporation September 2011 - Present
George Washington University September 2008 - August 2011
Cadence Design Systems August 2007 - December 2007
Skills
C++, C, Perl, Unix, Mac OS X, Team Leadership, Team Oriented, Deadline Driven, Attention To Detail, OS X, Windows, C#, MFC, Network Security, Encryption, UPnP, Software Design Patterns, Algorithms, Shell Scripting, Data Structures, Software Development, Object Oriented Design, Visual Studio, OOP, LaTeX, Visual C, XML, Win32 API, Eclipse, Java, Android, TCP/IP, Matlab, Debugging, Software Engineering, Python, Embedded Systems
Education
The George Washington University 2008 — 2011
Ph.D, Computer Science
The University of Texas at Arlington 2006 — 2008
Master of Science (M.S.), Computer Science
Intel Corporation September 2011 - Present
George Washington University September 2008 - August 2011
Cadence Design Systems August 2007 - December 2007
Skills
C++, C, Perl, Unix, Mac OS X, Team Leadership, Team Oriented, Deadline Driven, Attention To Detail, OS X, Windows, C#, MFC, Network Security, Encryption, UPnP, Software Design Patterns, Algorithms, Shell Scripting, Data Structures, Software Development, Object Oriented Design, Visual Studio, OOP, LaTeX, Visual C, XML, Win32 API, Eclipse, Java, Android, TCP/IP, Matlab, Debugging, Software Engineering, Python, Embedded Systems
Education
The George Washington University 2008 — 2011
Ph.D, Computer Science
The University of Texas at Arlington 2006 — 2008
Master of Science (M.S.), Computer Science
Richard Bohl Richard Bohl's Cadence Design Systems Experience 1998 - 2001
Job Field Application Engineer at NXP Semiconductors
Industry Computer Software
Experience
NXP Semiconductors March 2012 - Present
MiCommand February 2010 - March 2012
VaST Systems Technology September 2005 - February 2010
ProphICy Semiconductor, Inc. 2001 - 2005
Cadence Design Systems 1998 - 2001
Ambit Design Systems 1998 - 1998
Synopsys Design Systems 1993 - 1998
Convex Computer Corporation 1993 - 1994
Convex Computer Corporation 1989 - 1993
Education
The University of Texas at Austin 1982 — 1988
BSEE, Electrical and Computer Engineering
NXP Semiconductors March 2012 - Present
MiCommand February 2010 - March 2012
VaST Systems Technology September 2005 - February 2010
ProphICy Semiconductor, Inc. 2001 - 2005
Cadence Design Systems 1998 - 2001
Ambit Design Systems 1998 - 1998
Synopsys Design Systems 1993 - 1998
Convex Computer Corporation 1993 - 1994
Convex Computer Corporation 1989 - 1993
Education
The University of Texas at Austin 1982 — 1988
BSEE, Electrical and Computer Engineering
Tim Pylant Tim Pylant's Cadence Design Systems Experience March 2010 - Present
Job Sr. Staff Sales Engr at Cadence Design Systems
Industry Design
Experience
Cadence Design Systems March 2010 - Present
Cadence Design Systems, Inc. July 1992 - Present
Compaq Computer Corp May 1988 - July 1992
Hewlett Packard/Compaq 1988 - 1992
General Dynamics May 1984 - May 1988
Skills
SystemVerilog, Open Verification..., Functional Verification, Mixed Signal, Semiconductors, Product Marketing, EDA, Low-power Design, Leadership, Simulations, ASIC, Management, Strategy, Cadence, Verilog, Linux, SoC, IC, TCL, VHDL, Assertion Based..., Technical Leadership, Unix, Sales, Product Management, Debugging, Hardware, Strategic Partnerships
Education
University of Houston 1989 — 1991
MBA
Texas A&M University 1980 — 1984
Bachelor of Science (BS), Electrical Engineering Technology
Cadence Design Systems March 2010 - Present
Cadence Design Systems, Inc. July 1992 - Present
Compaq Computer Corp May 1988 - July 1992
Hewlett Packard/Compaq 1988 - 1992
General Dynamics May 1984 - May 1988
Skills
SystemVerilog, Open Verification..., Functional Verification, Mixed Signal, Semiconductors, Product Marketing, EDA, Low-power Design, Leadership, Simulations, ASIC, Management, Strategy, Cadence, Verilog, Linux, SoC, IC, TCL, VHDL, Assertion Based..., Technical Leadership, Unix, Sales, Product Management, Debugging, Hardware, Strategic Partnerships
Education
University of Houston 1989 — 1991
MBA
Texas A&M University 1980 — 1984
Bachelor of Science (BS), Electrical Engineering Technology
Charlotte Karako Charlotte Karako's Cadence Design Systems Experience 2002 - November 2008
Job Staff CAD Engineer at Samsung Austin R&D Center
Industry Semiconductors
Experience
Samsung Austin R&D Center October 2012 - Present
MediaTek June 2011 - October 2012
Karako Computer Services January 2009 - June 2011
Cadence Design Systems 2002 - November 2008
Synopsys January 1998 - January 1999
AMD January 1993 - January 1997
United Technologies Microelectronics Center January 1989 - January 1993
TRW January 1987 - January 1989
Skills
Perl, Visual Basic, Unix, Verilog, VHDL, Compilers, ASIC
Education
The University of Texas at Austin 1982 — 1987
Bachelor of Science, Electrical Engineering
Samsung Austin R&D Center October 2012 - Present
MediaTek June 2011 - October 2012
Karako Computer Services January 2009 - June 2011
Cadence Design Systems 2002 - November 2008
Synopsys January 1998 - January 1999
AMD January 1993 - January 1997
United Technologies Microelectronics Center January 1989 - January 1993
TRW January 1987 - January 1989
Skills
Perl, Visual Basic, Unix, Verilog, VHDL, Compilers, ASIC
Education
The University of Texas at Austin 1982 — 1987
Bachelor of Science, Electrical Engineering
Charles Qi Charles Qi's Cadence Design Systems Experience July 2013 - Present
Job System Solutions Director at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems July 2013 - Present
Xingtera May 2012 - June 2013
Xingtera July 2011 - May 2012
Broadcom Corp. March 2000 - November 2011
Trusted Computing Group 2002 - 2011
Bluesteel Networks November 1999 - March 2000
ATI Research August 1998 - November 1999
Intel September 1995 - August 1998
Scriptel Corp. January 1994 - May 1995
Skills
ASIC, Semiconductors, SoC, Verilog, Debugging, IC, Embedded Systems, Firmware, Processors, FPGA, Microprocessors, Wireless, Security
Education
The Ohio State University 1994 — 1995
MS
The University of Akron 1992 — 1993
MS
Tsinghua University 1986 — 1991
BS
Cadence Design Systems July 2013 - Present
Xingtera May 2012 - June 2013
Xingtera July 2011 - May 2012
Broadcom Corp. March 2000 - November 2011
Trusted Computing Group 2002 - 2011
Bluesteel Networks November 1999 - March 2000
ATI Research August 1998 - November 1999
Intel September 1995 - August 1998
Scriptel Corp. January 1994 - May 1995
Skills
ASIC, Semiconductors, SoC, Verilog, Debugging, IC, Embedded Systems, Firmware, Processors, FPGA, Microprocessors, Wireless, Security
Education
The Ohio State University 1994 — 1995
MS
The University of Akron 1992 — 1993
MS
Tsinghua University 1986 — 1991
BS
Hamilton Carter Hamilton Carter's Cadence Design Systems Experience 2005 - 2007
Job Senior Consultant at Mentor Graphics
Industry Computer Hardware
Experience
Mentor Graphics May 2015 - Present
JB Systems October 2014 - Present
ExtensionMedia June 2011 - Present
Texas A&M University August 2012 - Present
Pythagorean Productions January 2008 - May 2015
Western Digital 2010 - 2011
Toshiba 2009 - 2010
Cadence Design Systems 2005 - 2007
Verisity Design Inc 2003 - 2005
LayerN Networks 2001 - 2003
Skills
Functional Verification, SoC, EDA, SystemVerilog, ASIC, Semiconductors, Verilog, Computer Architecture, Debugging, TCL, IC, Formal Verification, RTL design, Specman, Perl, eRM, UVM, OOP, Python, C++, SQL, I2C, I2S, SPI, ARM, AMBA AHB, AMBA AXI
Education
The Ohio State University 1987 — 1991
Ruidoso High School
Texas A&M University
Mentor Graphics May 2015 - Present
JB Systems October 2014 - Present
ExtensionMedia June 2011 - Present
Texas A&M University August 2012 - Present
Pythagorean Productions January 2008 - May 2015
Western Digital 2010 - 2011
Toshiba 2009 - 2010
Cadence Design Systems 2005 - 2007
Verisity Design Inc 2003 - 2005
LayerN Networks 2001 - 2003
Skills
Functional Verification, SoC, EDA, SystemVerilog, ASIC, Semiconductors, Verilog, Computer Architecture, Debugging, TCL, IC, Formal Verification, RTL design, Specman, Perl, eRM, UVM, OOP, Python, C++, SQL, I2C, I2S, SPI, ARM, AMBA AHB, AMBA AXI
Education
The Ohio State University 1987 — 1991
Ruidoso High School
Texas A&M University
Sarice Plate Sarice Plate's Cadence Design Systems Experience 1996 - 2015
Job Sr. Global Talent Acquisition Leader ★ Operations & Learning ★ Innovative Team Leader ★ Awardwinning Program Manager
Industry Computer Software
Experience
Xilinx July 2015 - Present
Cadence Design Systems 1996 - 2015
Symantec Corporation 1992 - 1996
ARGOSystems, Inc. 1989 - 1992
Skills
Human Resources, Performance Management, Talent Acquisition, Management, Organizational..., Leadership, Personnel Management, Recruiting, Strategy, Interviews, College Recruiting, Talent Management, Program Management, Onboarding, Workforce Planning, Coaching, Employee Engagement, Employee Relations, Applicant Tracking..., Temporary Placement, Mergers & Acquisitions, HRIS, Organizational Design, Technical Recruiting, Metrics, Strategic Planning, Global Human Resources..., Strategic Human..., Change Management, Corporate Branding, Project Management, Business Restructures, HR Operations, Integrated Brand..., Trusted Business Partner, HR Policies, HR Strategy, Globalization, Corporate Communications, Operations Management, Employer Branding, Branding & Identity, Branding
Education
The University of Texas at Austin 2003 — 2004
UT Institute of Managerial Leadership Certificate
University of California Santa Barbara 1985 — 1989
Bachelor of Science (B.S.)
Xilinx July 2015 - Present
Cadence Design Systems 1996 - 2015
Symantec Corporation 1992 - 1996
ARGOSystems, Inc. 1989 - 1992
Skills
Human Resources, Performance Management, Talent Acquisition, Management, Organizational..., Leadership, Personnel Management, Recruiting, Strategy, Interviews, College Recruiting, Talent Management, Program Management, Onboarding, Workforce Planning, Coaching, Employee Engagement, Employee Relations, Applicant Tracking..., Temporary Placement, Mergers & Acquisitions, HRIS, Organizational Design, Technical Recruiting, Metrics, Strategic Planning, Global Human Resources..., Strategic Human..., Change Management, Corporate Branding, Project Management, Business Restructures, HR Operations, Integrated Brand..., Trusted Business Partner, HR Policies, HR Strategy, Globalization, Corporate Communications, Operations Management, Employer Branding, Branding & Identity, Branding
Education
The University of Texas at Austin 2003 — 2004
UT Institute of Managerial Leadership Certificate
University of California Santa Barbara 1985 — 1989
Bachelor of Science (B.S.)
Vadim Kustov Vadim Kustov's Cadence Design Systems Experience May 2014 - Present
Job Sr. Principal Design Engineer at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems May 2014 - Present
Harmonic Inc. September 2009 - April 2014
Silicon Optix Inc. acquired by IDT Inc. August 2004 - May 2009
Aspro Technologies Ltd. July 2003 - June 2004
Finline Technologies Ltd., Impress Research, Division 2 November 2000 - June 2002
Skills
Embedded Software, Digital Signal..., Embedded Systems, Video Processing, MPEG2, H.264, SoC, MPEG-4, MPEG, Verilog, C, ARM, Debugging, Perl, Ethernet, Video Compression, ATSC, Xilinx, Object Oriented Design, System Design, Firmware, ASIC, Algorithms, Transcoding, Device Drivers, Signal Processing, Programming, Software Engineering, RTOS, Software Development, VHDL, Video
Education
Texas Tech University 1995 — 2000
Ph. D., Electrical Engineering, 3.8
Cadence Design Systems May 2014 - Present
Harmonic Inc. September 2009 - April 2014
Silicon Optix Inc. acquired by IDT Inc. August 2004 - May 2009
Aspro Technologies Ltd. July 2003 - June 2004
Finline Technologies Ltd., Impress Research, Division 2 November 2000 - June 2002
Skills
Embedded Software, Digital Signal..., Embedded Systems, Video Processing, MPEG2, H.264, SoC, MPEG-4, MPEG, Verilog, C, ARM, Debugging, Perl, Ethernet, Video Compression, ATSC, Xilinx, Object Oriented Design, System Design, Firmware, ASIC, Algorithms, Transcoding, Device Drivers, Signal Processing, Programming, Software Engineering, RTOS, Software Development, VHDL, Video
Education
Texas Tech University 1995 — 2000
Ph. D., Electrical Engineering, 3.8
Avijit Dutta, PhD Avijit Dutta, PhD's Cadence Design Systems Experience June 2000 - March 2003
Job Sr. Staff at Synopsys
Industry Computer Software
Experience
Synopsys May 2013 - Present
Cypress Semiconductor August 2011 - May 2013
Mentor Graphics May 2007 - July 2011
Cadence Design Systems June 2000 - March 2003
Skills
DFT, EDA, SoC, Algorithms, ATPG, Simulations, BIST, Logic Synthesis, Physical Design, CAD for VLSI, Data Compression, VLSI, Reliability, Error Correcting Codes, Formal Verification, FPGA place & route
Education
The University of Texas at Austin
Doctor of Philosophy (Ph.D.), Electrical and Computer Engineering
The University of Texas at Austin
Master of Science (MS), Electrical and Computer Engineering
Synopsys May 2013 - Present
Cypress Semiconductor August 2011 - May 2013
Mentor Graphics May 2007 - July 2011
Cadence Design Systems June 2000 - March 2003
Skills
DFT, EDA, SoC, Algorithms, ATPG, Simulations, BIST, Logic Synthesis, Physical Design, CAD for VLSI, Data Compression, VLSI, Reliability, Error Correcting Codes, Formal Verification, FPGA place & route
Education
The University of Texas at Austin
Doctor of Philosophy (Ph.D.), Electrical and Computer Engineering
The University of Texas at Austin
Master of Science (MS), Electrical and Computer Engineering
Ron Mazdra Ron Mazdra's Cadence Design Systems Experience August 1989 - July 1999
Job Engineering Director at Dassault Systemes ENOVIA
Industry Computer Software
Experience
Dassault Systèmes (MatrixOne, Synchronicity) 1999 - Present
Cadence Design Systems August 1989 - July 1999
Texas Instruments August 1983 - July 1989
Skills
EDA, Semiconductors, Engineering Management, R&D, Software Engineering, Software Development, Management, Enterprise Software, Agile Methodologies, Product Lifecycle..., Java, C++, Project Planning, Perl, MatrixOne
Education
The University of Texas at Dallas 1985 — 1988
Master of Science, Computer Science
University of Missouri-Rolla 1979 — 1983
Bachelor of Science, Computer Science
Dassault Systèmes (MatrixOne, Synchronicity) 1999 - Present
Cadence Design Systems August 1989 - July 1999
Texas Instruments August 1983 - July 1989
Skills
EDA, Semiconductors, Engineering Management, R&D, Software Engineering, Software Development, Management, Enterprise Software, Agile Methodologies, Product Lifecycle..., Java, C++, Project Planning, Perl, MatrixOne
Education
The University of Texas at Dallas 1985 — 1988
Master of Science, Computer Science
University of Missouri-Rolla 1979 — 1983
Bachelor of Science, Computer Science
David Torrence David Torrence's Cadence Design Systems Experience 1989 - 1990
Job Senior CAD Engineer at Centaur Technology
Industry Semiconductors
Experience
Centaur Technology March 2000 - Present
Cirrus Logic 1998 - 2000
Cypress Semiconductor 1997 - 1998
Logical Silicon Solutions 1990 - 1997
Cadence Design Systems 1989 - 1990
Micron Technology 1986 - 1989
SDA Systems 1985 - 1986
Motorola Semiconductor 1983 - 1985
ConocoPhillips 1982 - 1983
Skills
Semiconductors, IC, LVS, DRC, Cadence Virtuoso, Physical Verification, Perl, Integrated Circuit..., EDA, Physical Design, CMOS, Microprocessors, VLSI, TCL, Processors, Cadence, Parasitic Extraction
Education
Texas Tech University 1978 — 1982
BSEE, Electrical Engineering
Centaur Technology March 2000 - Present
Cirrus Logic 1998 - 2000
Cypress Semiconductor 1997 - 1998
Logical Silicon Solutions 1990 - 1997
Cadence Design Systems 1989 - 1990
Micron Technology 1986 - 1989
SDA Systems 1985 - 1986
Motorola Semiconductor 1983 - 1985
ConocoPhillips 1982 - 1983
Skills
Semiconductors, IC, LVS, DRC, Cadence Virtuoso, Physical Verification, Perl, Integrated Circuit..., EDA, Physical Design, CMOS, Microprocessors, VLSI, TCL, Processors, Cadence, Parasitic Extraction
Education
Texas Tech University 1978 — 1982
BSEE, Electrical Engineering
Giora Alexandron's Cadence Design Systems Experience 2010 - 2012
Job Postdoctoral Researcher, Data Science and Online Education, Massachusetts Institute of Technology (MIT)
Industry Research
Experience
Massachusetts Institute of Technology (MIT) September 2014 - Present
College of Management Academic Studies 2012 - 2014
Cadence Design Systems 2010 - 2012
Cadence Design Systems March 2005 - February 2010
Tel Aviv university January 2003 - January 2005
Kidum August 1997 - July 2000
Skills
Data Science, Algorithms, Computer Science, Software Engineering, C++, C, Programming, Linux, Data Structures, Java, Perl, Software Development, Machine Learning, Research, Data Mining, Teaching, Python, Shell Scripting, Software Design, Artificial Intelligence, Object Oriented Design, OOP, Science, Simulations, University Teaching, Higher Education, Data Analysis, R
Education
Weizmann Institute of Science 2010 — 2014
Doctor of Philosophy (Ph.D.), Computer Science Education
Tel Aviv University 2002 — 2005
M.Sc, Computer Science
Massachusetts Institute of Technology (MIT) September 2014 - Present
College of Management Academic Studies 2012 - 2014
Cadence Design Systems 2010 - 2012
Cadence Design Systems March 2005 - February 2010
Tel Aviv university January 2003 - January 2005
Kidum August 1997 - July 2000
Skills
Data Science, Algorithms, Computer Science, Software Engineering, C++, C, Programming, Linux, Data Structures, Java, Perl, Software Development, Machine Learning, Research, Data Mining, Teaching, Python, Shell Scripting, Software Design, Artificial Intelligence, Object Oriented Design, OOP, Science, Simulations, University Teaching, Higher Education, Data Analysis, R
Education
Weizmann Institute of Science 2010 — 2014
Doctor of Philosophy (Ph.D.), Computer Science Education
Tel Aviv University 2002 — 2005
M.Sc, Computer Science
Les Holben's Cadence Design Systems Experience January 2006 - January 2010
Job Technical Account Manager at Atrenta
Industry Computer Software
Experience
Atrenta July 2010 - Present
Cadence Design Systems January 2006 - January 2010
Cadence Design Systems December 1999 - January 2006
Summit Design Inc. (now Synopsys) 1998 - 1999
Intergraph / VeriBest, Inc. (now Mentor Graphics) 1991 - 1998
Alcatel-Lucent 1986 - 1991
Skills
CRM, Start-ups, Strategy, ASIC, Program Management, IC, Cross-functional Team..., EDA, Product Marketing, Management, Perl, Solution Selling, Enterprise Software, Process Improvement, Unix, Sales Operations, Training, Testing, Pre-sales, Embedded Systems, Semiconductors, Sales, Product Management, Project Management, Go-to-market Strategy
Education
The University of Texas at Arlington 1981 — 1986
Bachelor of Science, Electrical Engineering
The University of Texas at Arlington 1981 — 1986
Bachelor of Science, Electrical and Electronics Engineering
Atrenta July 2010 - Present
Cadence Design Systems January 2006 - January 2010
Cadence Design Systems December 1999 - January 2006
Summit Design Inc. (now Synopsys) 1998 - 1999
Intergraph / VeriBest, Inc. (now Mentor Graphics) 1991 - 1998
Alcatel-Lucent 1986 - 1991
Skills
CRM, Start-ups, Strategy, ASIC, Program Management, IC, Cross-functional Team..., EDA, Product Marketing, Management, Perl, Solution Selling, Enterprise Software, Process Improvement, Unix, Sales Operations, Training, Testing, Pre-sales, Embedded Systems, Semiconductors, Sales, Product Management, Project Management, Go-to-market Strategy
Education
The University of Texas at Arlington 1981 — 1986
Bachelor of Science, Electrical Engineering
The University of Texas at Arlington 1981 — 1986
Bachelor of Science, Electrical and Electronics Engineering
Elsa Delacruz Elsa Delacruz's Cadence Design Systems Experience March 2014 - Present
Job Cadence Design Systems Lead Design Engineer
Industry Semiconductors
Experience
Cadence Design Systems March 2014 - Present
IBM August 2004 - March 2014
Honeywell Aerospace May 2004 - August 2004
Skills
Perl, Timing Closure, VHDL, Verilog, TCL, ASIC, Semiconductors, Physical Design, Static Timing Analysis, Embedded Systems, Linux, C, Java, Agile Methodologies, Logic Design, C#, EDA, PHP, VLSI, Microprocessors, Hardware Architecture, Computer Architecture, Systems Engineering, Electrical Engineering, Circuit Design, CMOS, SoC, Integration, FPGA, Simulations, Logic Synthesis, Debugging, Integrated Circuit..., DRC, Functional Verification, Software Engineering, Analog Circuit Design, Signal Integrity, Processors
Education
The University of New Mexico 2002 — 2004
Computer Engineering, 3.98/4.0
The University of New Mexico 2002 — 2004
Electrical Engineering, 3.98/4.0
Cadence Design Systems March 2014 - Present
IBM August 2004 - March 2014
Honeywell Aerospace May 2004 - August 2004
Skills
Perl, Timing Closure, VHDL, Verilog, TCL, ASIC, Semiconductors, Physical Design, Static Timing Analysis, Embedded Systems, Linux, C, Java, Agile Methodologies, Logic Design, C#, EDA, PHP, VLSI, Microprocessors, Hardware Architecture, Computer Architecture, Systems Engineering, Electrical Engineering, Circuit Design, CMOS, SoC, Integration, FPGA, Simulations, Logic Synthesis, Debugging, Integrated Circuit..., DRC, Functional Verification, Software Engineering, Analog Circuit Design, Signal Integrity, Processors
Education
The University of New Mexico 2002 — 2004
Computer Engineering, 3.98/4.0
The University of New Mexico 2002 — 2004
Electrical Engineering, 3.98/4.0
Jenny Kindwall's Cadence Design Systems Experience January 2001 - May 2002
Job
Industry Semiconductors
Experience
Mentor Graphics August 2007 - Present
Magma May 2002 - August 2007
Cadence Design Systems January 2001 - May 2002
Avanti Corp 1997 - 2001
Skills
EDA, ASIC, Semiconductors, IC, SoC, Verilog, Cadence, FPGA, Mixed Signal, Analog, TCL, Semiconductor Industry, Management, Product Marketing, Embedded Systems, Product Management
Education
Texas A&M 1990 — 1993
Bachelor of Science
Mentor Graphics August 2007 - Present
Magma May 2002 - August 2007
Cadence Design Systems January 2001 - May 2002
Avanti Corp 1997 - 2001
Skills
EDA, ASIC, Semiconductors, IC, SoC, Verilog, Cadence, FPGA, Mixed Signal, Analog, TCL, Semiconductor Industry, Management, Product Marketing, Embedded Systems, Product Management
Education
Texas A&M 1990 — 1993
Bachelor of Science
Anjum Biswas Anjum Biswas's Cadence Design Systems Experience January 2000 - August 2001
Job Self Employed
Industry Computer Software
Experience
Self Employed January 2006 - Present
Poseidon Design Systems May 2004 - December 2005
UC Irvine September 2001 - September 2003
Cadence Design Systems January 2000 - August 2001
Skills
C++, C, Verilog, VHDL, Xilinx ISE, SPARK C-to-RTL, Altera Quartus, TENSILICA Tool Kit, SYNOPSYS Fpga Compiler..., Cadence Analog Artist, Cadence Mixed Signal..., PHP, CSS, WordPress
Education
University of California, Irvine 2001 — 2003
Master of Science (M.S.), Computer Science
Thapar Institute of Engineering and Technology 1996 — 2000
Bachelor of Engineering (B.E.), Computer Science and Engineering
Self Employed January 2006 - Present
Poseidon Design Systems May 2004 - December 2005
UC Irvine September 2001 - September 2003
Cadence Design Systems January 2000 - August 2001
Skills
C++, C, Verilog, VHDL, Xilinx ISE, SPARK C-to-RTL, Altera Quartus, TENSILICA Tool Kit, SYNOPSYS Fpga Compiler..., Cadence Analog Artist, Cadence Mixed Signal..., PHP, CSS, WordPress
Education
University of California, Irvine 2001 — 2003
Master of Science (M.S.), Computer Science
Thapar Institute of Engineering and Technology 1996 — 2000
Bachelor of Engineering (B.E.), Computer Science and Engineering
Libo Chen Libo Chen's Cadence Design Systems Experience May 2015 - August 2015
Job Graduate student at University of Texas, Austin
Industry Computer Software
Experience
Cadence Design Systems May 2015 - August 2015
University of Notre Dame July 2013 - August 2013
Skills
C, C++, Matlab, Algorithms, Verilog, Python, Shell Scripting, CUDA, Perforce
Education
The University of Texas at Austin 2014 — 2016
Master of Science (M.S.), Computer Engineering
Zhejiang University 2010 — 2014
Bachelor of Engineering, Electrical and Electronics Engineering
Cadence Design Systems May 2015 - August 2015
University of Notre Dame July 2013 - August 2013
Skills
C, C++, Matlab, Algorithms, Verilog, Python, Shell Scripting, CUDA, Perforce
Education
The University of Texas at Austin 2014 — 2016
Master of Science (M.S.), Computer Engineering
Zhejiang University 2010 — 2014
Bachelor of Engineering, Electrical and Electronics Engineering
Pat Paulson Pat Paulson's Cadence Design Systems Experience 2000 - 2009
Job Clinical Engineer at BaylorScott & White Healthcare
Industry Hospital & Health Care
Experience
Scott & White Healthcare April 2013 - Present
SETON FAMILY OF HOSPITALS (TRIMEDX) February 2013 - April 2013
Scott & White Healthcare May 2012 - August 2012
Cadence Design Systems 2000 - 2009
VTEL 1990 - 1999
Eagle Signal Controls 1984 - 1990
Skills
Customer Satisfaction, Troubleshooting, Testing, CAD, PCB design, Schematic Capture, Electronics, Allegro, Process Improvement, Customer Relations, Customer Service, Hardware, Innovation, Knowledge Management, Microsoft Office, Problem Solving, Unix, PACS, DICOM, Wireless Networking, Medical Devices, Medical Imaging, Mechanical Aptitude, Biomedical Electronics, Calibration, Program Management, EDA, Debugging, Semiconductors, Cadence, Manufacturing, Technical Support, TCL, Embedded Systems, Signal Integrity
Education
Texas State Technical College Waco 2011 — 2012
Associates of Applied Science, Medical Imaging and Biomedical Equipment Technology, Board of Regents Honor Graduate, 4.0
Texas A&M University 1983 — 1984
Certificate, Electronics, 3.87
Scott & White Healthcare April 2013 - Present
SETON FAMILY OF HOSPITALS (TRIMEDX) February 2013 - April 2013
Scott & White Healthcare May 2012 - August 2012
Cadence Design Systems 2000 - 2009
VTEL 1990 - 1999
Eagle Signal Controls 1984 - 1990
Skills
Customer Satisfaction, Troubleshooting, Testing, CAD, PCB design, Schematic Capture, Electronics, Allegro, Process Improvement, Customer Relations, Customer Service, Hardware, Innovation, Knowledge Management, Microsoft Office, Problem Solving, Unix, PACS, DICOM, Wireless Networking, Medical Devices, Medical Imaging, Mechanical Aptitude, Biomedical Electronics, Calibration, Program Management, EDA, Debugging, Semiconductors, Cadence, Manufacturing, Technical Support, TCL, Embedded Systems, Signal Integrity
Education
Texas State Technical College Waco 2011 — 2012
Associates of Applied Science, Medical Imaging and Biomedical Equipment Technology, Board of Regents Honor Graduate, 4.0
Texas A&M University 1983 — 1984
Certificate, Electronics, 3.87
Gary Vandemark Gary Vandemark's Cadence Design Systems Experience 1994 - 2002
Job President at Vandemark Design
Industry Marketing and Advertising
Experience
Vandemark Design January 2002 - Present
Cadence Design Systems 1994 - 2002
Diablo Research Corp October 1994 - December 2001
California Microwave Corporation July 1974 - August 1994
Education
The Ohio State University 1961 — 1966
BSEE, Electrical Engineering
Vandemark Design January 2002 - Present
Cadence Design Systems 1994 - 2002
Diablo Research Corp October 1994 - December 2001
California Microwave Corporation July 1974 - August 1994
Education
The Ohio State University 1961 — 1966
BSEE, Electrical Engineering
Alessandro Piovaccari's Cadence Design Systems Experience July 2001 - October 2003
Job SVP of Engineering & CTO at Silicon Labs
Industry Semiconductors
Experience
Skillpoint Alliance September 2015 - Present
Silicon Labs February 2015 - Present
Silicon Laboratories April 2012 - February 2015
Silicon Laboratories January 2011 - April 2012
Silicon Laboratories November 2006 - January 2011
Silicon Laboratories November 2003 - October 2006
Cadence Design Systems July 2001 - October 2003
Cadence Design Systems October 1998 - June 2001
Tanner Research February 1997 - September 1998
Skills
Semiconductors, IC, SoC, Program Management, Analog, Mixed Signal, RF, CMOS, Embedded Systems, Sensors, Signal Integrity, Electronics, FPGA, Low-power Design, Digital Signal..., R&D, ASIC, Debugging, RF design, SERDES, Engineering Management, Analog Circuit Design, LNA, Wireless, PLL, Microcontrollers, Circuit Design, EDA, Integrated Circuit..., Power Management, Hardware Architecture, Leadership
Education
The Johns Hopkins University 1999 — 2002
PostGrad
Università di Bologna 1993 — 1998
Ph.D.
Università di Bologna 1984 — 1993
Laurea (MS)
Skillpoint Alliance September 2015 - Present
Silicon Labs February 2015 - Present
Silicon Laboratories April 2012 - February 2015
Silicon Laboratories January 2011 - April 2012
Silicon Laboratories November 2006 - January 2011
Silicon Laboratories November 2003 - October 2006
Cadence Design Systems July 2001 - October 2003
Cadence Design Systems October 1998 - June 2001
Tanner Research February 1997 - September 1998
Skills
Semiconductors, IC, SoC, Program Management, Analog, Mixed Signal, RF, CMOS, Embedded Systems, Sensors, Signal Integrity, Electronics, FPGA, Low-power Design, Digital Signal..., R&D, ASIC, Debugging, RF design, SERDES, Engineering Management, Analog Circuit Design, LNA, Wireless, PLL, Microcontrollers, Circuit Design, EDA, Integrated Circuit..., Power Management, Hardware Architecture, Leadership
Education
The Johns Hopkins University 1999 — 2002
PostGrad
Università di Bologna 1993 — 1998
Ph.D.
Università di Bologna 1984 — 1993
Laurea (MS)
Jason Andrews Jason Andrews's Cadence Design Systems Experience April 2007 - November 2013
Job Director of Product and Applications Engineering at Carbon Design Systems
Industry Computer Software
Experience
Carbon Design Systems December 2013 - Present
Cadence Design Systems April 2007 - November 2013
Cadence April 2005 - April 2007
Verisity January 2001 - April 2005
Simpod 2000 - 2001
Simulation Technologies / Summit Design 1996 - 2000
Cypress Semiconductor 1994 - 1995
Tricord Systems 1991 - 1994
Skills
ARM, EDA, Debugging, Embedded Software, Embedded Linux, Processors, ASIC, SystemC, VHDL, SystemVerilog, RTOS, Xilinx, Linux, TCL, Embedded Systems, FPGA, Verilog, SoC, Simulations, Emulation, C, Hardware Architecture, RTL design, VLSI, Functional Verification, Computer Architecture, Integrated Circuit..., Microprocessors, Specman, Firmware, Perl, Hardware, Formal Verification, Digital Signal..., RTL Design
Education
University of Minnesota-Twin Cities 1991 — 1992
MSEE
The Citadel 1987 — 1991
BSEE
Carbon Design Systems December 2013 - Present
Cadence Design Systems April 2007 - November 2013
Cadence April 2005 - April 2007
Verisity January 2001 - April 2005
Simpod 2000 - 2001
Simulation Technologies / Summit Design 1996 - 2000
Cypress Semiconductor 1994 - 1995
Tricord Systems 1991 - 1994
Skills
ARM, EDA, Debugging, Embedded Software, Embedded Linux, Processors, ASIC, SystemC, VHDL, SystemVerilog, RTOS, Xilinx, Linux, TCL, Embedded Systems, FPGA, Verilog, SoC, Simulations, Emulation, C, Hardware Architecture, RTL design, VLSI, Functional Verification, Computer Architecture, Integrated Circuit..., Microprocessors, Specman, Firmware, Perl, Hardware, Formal Verification, Digital Signal..., RTL Design
Education
University of Minnesota-Twin Cities 1991 — 1992
MSEE
The Citadel 1987 — 1991
BSEE
Arun Agarwal Arun Agarwal's Cadence Design Systems Experience August 2006 - January 2007
Job SAP Financial Solution Architect/Project Manager at NVIDIA
Industry Information Technology and Services
Experience
NVIDIA December 2011 - Present
eBay September 2011 - December 2011
BD Biosciences January 2007 - September 2011
Cadence Design Systems August 2006 - January 2007
Interstate Brands Corporation July 2006 - August 2006
Fresenius Kabi India Pvt. Ltd. May 2005 - July 2006
Artha Infotech Pvt. Ltd. April 2004 - May 2005
Bharat Forge Ltd February 2001 - July 2004
M/s Kumar Mulay Associates July 1999 - February 2001
Skills
SAP, SAP FI, SAP Configuration, CO-PA, Costing, Business Analysis, FI/CO, SAP BW, SD, SAP GRC Access Control, Segregation of Duties, User Provisioning, SAP Authorizations, ECC6.0, SAP BPC, Product Costing, CO-PC, CO-PCA, FI-AA, SAP FSCM, SAP Archiving, SOX controls, GRC 10.0, Business Objects, SAP ERP, SAP Implementation, Target Costing, SAP SRM, Sarbanes-Oxley, Project Management, Testing, SAP R/3, SAP HR, SAP FICO, SDLC, SAP BI, SAP Netweaver, ERP, Business Process, Business Intelligence, Integration, Management, ABAP
Education
University of Pune 2001 — 2003
Masters in Commerce, Finance and Accounts
The Institute of Chartered Accountants of India 1998 — 2002
Master's Degree, Accounting, Tax, Audit, Assurance, Corporate Governance
University of Pune 1998 — 2001
Bacelors in Commerce, Finance, Accounts, Mercantile laws
NVIDIA December 2011 - Present
eBay September 2011 - December 2011
BD Biosciences January 2007 - September 2011
Cadence Design Systems August 2006 - January 2007
Interstate Brands Corporation July 2006 - August 2006
Fresenius Kabi India Pvt. Ltd. May 2005 - July 2006
Artha Infotech Pvt. Ltd. April 2004 - May 2005
Bharat Forge Ltd February 2001 - July 2004
M/s Kumar Mulay Associates July 1999 - February 2001
Skills
SAP, SAP FI, SAP Configuration, CO-PA, Costing, Business Analysis, FI/CO, SAP BW, SD, SAP GRC Access Control, Segregation of Duties, User Provisioning, SAP Authorizations, ECC6.0, SAP BPC, Product Costing, CO-PC, CO-PCA, FI-AA, SAP FSCM, SAP Archiving, SOX controls, GRC 10.0, Business Objects, SAP ERP, SAP Implementation, Target Costing, SAP SRM, Sarbanes-Oxley, Project Management, Testing, SAP R/3, SAP HR, SAP FICO, SDLC, SAP BI, SAP Netweaver, ERP, Business Process, Business Intelligence, Integration, Management, ABAP
Education
University of Pune 2001 — 2003
Masters in Commerce, Finance and Accounts
The Institute of Chartered Accountants of India 1998 — 2002
Master's Degree, Accounting, Tax, Audit, Assurance, Corporate Governance
University of Pune 1998 — 2001
Bacelors in Commerce, Finance, Accounts, Mercantile laws
Nigel Bleasdale Nigel Bleasdale's Cadence Design Systems Experience November 2002 - February 2011
Job Senior Application Engineer at Berkeley Design Automation
Industry Semiconductors
Experience
Solido Design Automation March 2011 - April 2013
Cadence Design Systems November 2002 - February 2011
Antrim Design Systems June 1998 - November 2002
GEC Plessey Semiconductors 1989 - March 1998
Ferranti Electronics Limited June 1983 - 1988
Skills
Product Management, Analog Design, Mixed Signal, Analog, Circuit Design, Product Requirements, Product Marketing, IC, Analog Circuit Design, Product Life Cycle..., SERDES, Product Lifecycle..., EDA, Electronics, Microprocessors, Simulations, Integrated Circuit..., Semiconductors, Debugging, SoC, Perl, Technical Marketing, Silicon, Cadence, Verilog, ASIC, CMOS
Education
The University of Salford 1979 — 1983
BSc (hons.), Electrical & Electronic Engineering
Solido Design Automation March 2011 - April 2013
Cadence Design Systems November 2002 - February 2011
Antrim Design Systems June 1998 - November 2002
GEC Plessey Semiconductors 1989 - March 1998
Ferranti Electronics Limited June 1983 - 1988
Skills
Product Management, Analog Design, Mixed Signal, Analog, Circuit Design, Product Requirements, Product Marketing, IC, Analog Circuit Design, Product Life Cycle..., SERDES, Product Lifecycle..., EDA, Electronics, Microprocessors, Simulations, Integrated Circuit..., Semiconductors, Debugging, SoC, Perl, Technical Marketing, Silicon, Cadence, Verilog, ASIC, CMOS
Education
The University of Salford 1979 — 1983
BSc (hons.), Electrical & Electronic Engineering
David Abada's Cadence Design Systems Experience July 2010 - Present
Job Sr. Systems Engineer at Cadence Design Systems.
Industry Computer Hardware
Experience
Cadence Design Systems July 2010 - Present
Consultant July 2009 - July 2010
Amicus Wireless January 2007 - July 2009
KLA-Tencor June 2002 - January 2007
iCompression/GlobespanVirata 1999 - 2002
Digital Designs Inc. October 1994 - December 1999
Skills
FPGA, Semiconductors, SoC, ASIC, Systems Engineering, Electronics, PCB design, Embedded Systems
Education
Technion - Israel Institute of Technology
BScEE, Communications, DSP
Cadence Design Systems July 2010 - Present
Consultant July 2009 - July 2010
Amicus Wireless January 2007 - July 2009
KLA-Tencor June 2002 - January 2007
iCompression/GlobespanVirata 1999 - 2002
Digital Designs Inc. October 1994 - December 1999
Skills
FPGA, Semiconductors, SoC, ASIC, Systems Engineering, Electronics, PCB design, Embedded Systems
Education
Technion - Israel Institute of Technology
BScEE, Communications, DSP
Mark Alexandre's Cadence Design Systems Experience 1990 - 1992
Job Founder / CTO at Datastance, Inc.
Industry Computer Software
Experience
Datastance, Inc. May 2013 - Present
Sotera Defense Solutions, Inc. March 2009 - February 2013
Reddwerks Corporation December 2007 - July 2008
Baxter Planning Systems January 2005 - June 2007
Pointserve 2004 - 2004
Visa 2000 - 2003
Globeset 1997 - 2000
MCI [now Verizon] 1993 - 1997
Symmetrix 1992 - 1993
Cadence Design Systems 1990 - 1992
Skills
Java, Software Project..., Unix, Tomcat, Microsoft SQL Server, Integration, XML, Agile Methodologies, Scala, Web Services, Software Development, Tableau, Hadoop, Oracle, MySQL, Cloud Computing, Databases, Software Engineering, Bash, User Interface Design, Spring, Distributed Systems, Hive, Python
Education
The University of Texas at Austin 1975 — 1980
B.A., Linguistics
Datastance, Inc. May 2013 - Present
Sotera Defense Solutions, Inc. March 2009 - February 2013
Reddwerks Corporation December 2007 - July 2008
Baxter Planning Systems January 2005 - June 2007
Pointserve 2004 - 2004
Visa 2000 - 2003
Globeset 1997 - 2000
MCI [now Verizon] 1993 - 1997
Symmetrix 1992 - 1993
Cadence Design Systems 1990 - 1992
Skills
Java, Software Project..., Unix, Tomcat, Microsoft SQL Server, Integration, XML, Agile Methodologies, Scala, Web Services, Software Development, Tableau, Hadoop, Oracle, MySQL, Cloud Computing, Databases, Software Engineering, Bash, User Interface Design, Spring, Distributed Systems, Hive, Python
Education
The University of Texas at Austin 1975 — 1980
B.A., Linguistics
Woody LaRue's Cadence Design Systems Experience August 1988 - Present
Job Architect at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems August 1988 - Present
Cadence Design Systems & Tality 1997 - 1998
Comdisco Systems 1988 - 1993
Skills
EDA, SoC, Semiconductors, Embedded Systems, Embedded Software, Simulations, Distributed Systems, C, System Architecture, C++, Verilog, Debugging, VLSI, Algorithms, Object Oriented Design, ARM, TCL, ASIC, Processors, SystemVerilog
Education
University of Kansas 1987 — 1996
Ph.D., Electrical Engineering
University of Kansas 1985 — 1986
M.S., Electrical Engineering
University of Kansas 1981 — 1985
B.S., Electrical Engineering
Cadence Design Systems August 1988 - Present
Cadence Design Systems & Tality 1997 - 1998
Comdisco Systems 1988 - 1993
Skills
EDA, SoC, Semiconductors, Embedded Systems, Embedded Software, Simulations, Distributed Systems, C, System Architecture, C++, Verilog, Debugging, VLSI, Algorithms, Object Oriented Design, ARM, TCL, ASIC, Processors, SystemVerilog
Education
University of Kansas 1987 — 1996
Ph.D., Electrical Engineering
University of Kansas 1985 — 1986
M.S., Electrical Engineering
University of Kansas 1981 — 1985
B.S., Electrical Engineering
Brad Kekst's Cadence Design Systems Experience 1998 - 2000
Job Director of Product Management at Hexis Cyber Solutions
Industry Computer Software
Experience
Hexis Cyber Solutions, Inc. April 2007 - Present
Sensage, Inc. April 2006 - April 2007
Vignette Corporation October 2000 - April 2006
Intraspect Software 2000 - 2003
Broadword Communications February 2000 - October 2000
Cadence Design Systems 1998 - 2000
Cartemps USA October 1996 - October 1999
Skills
Architecture, Software Design, User Experience, Business Analysis, Enterprise Software, Product Management, SaaS, Cloud Computing, Scrum, Scalability, Agile Methodologies, Web Applications, Solution Selling, Ruby on Rails, Java, XML, Business Intelligence, Software Development, Start-ups, Software Engineering
Education
Case Western Reserve University - Weatherhead School of Management 1991 — 1993
MBA, Marketing and Information Technology
Ohio State University 1984 — 1989
BS, Architecture
Hexis Cyber Solutions, Inc. April 2007 - Present
Sensage, Inc. April 2006 - April 2007
Vignette Corporation October 2000 - April 2006
Intraspect Software 2000 - 2003
Broadword Communications February 2000 - October 2000
Cadence Design Systems 1998 - 2000
Cartemps USA October 1996 - October 1999
Skills
Architecture, Software Design, User Experience, Business Analysis, Enterprise Software, Product Management, SaaS, Cloud Computing, Scrum, Scalability, Agile Methodologies, Web Applications, Solution Selling, Ruby on Rails, Java, XML, Business Intelligence, Software Development, Start-ups, Software Engineering
Education
Case Western Reserve University - Weatherhead School of Management 1991 — 1993
MBA, Marketing and Information Technology
Ohio State University 1984 — 1989
BS, Architecture
Vamsi Rachapudi's Cadence Design Systems Experience 2013 - Present
Job Global Account Director at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems 2013 - Present
Autodesk 2010 - 2013
Envis Corp 2009 - 2010
Enchase, Inc 2008 - 2010
Mentor Graphics Corp 2006 - 2008
Mentor Graphics 2004 - 2006
Barcelona Design 2003 - 2004
Cadence Design Systems 1999 - 2003
Cadence Design Systems 1996 - 1998
Skills
Key Account Management, Sales Management, EDA, Direct Sales, Strategy, Sales Process, SaaS, Sales Operations, Product Management, Business Development, Coaching, Executive Management, Leadership, Enterprise Software, Sales, Go-to-market Strategy, Solution Selling, Strategic Partnerships, Cloud Computing, Start-ups, Product Marketing, Professional Services, Salesforce.com, Channel Partners
Education
The George Washington University 1994 — 1996
MS
University of Pune 1990 — 1994
BS
Cadence Design Systems 2013 - Present
Autodesk 2010 - 2013
Envis Corp 2009 - 2010
Enchase, Inc 2008 - 2010
Mentor Graphics Corp 2006 - 2008
Mentor Graphics 2004 - 2006
Barcelona Design 2003 - 2004
Cadence Design Systems 1999 - 2003
Cadence Design Systems 1996 - 1998
Skills
Key Account Management, Sales Management, EDA, Direct Sales, Strategy, Sales Process, SaaS, Sales Operations, Product Management, Business Development, Coaching, Executive Management, Leadership, Enterprise Software, Sales, Go-to-market Strategy, Solution Selling, Strategic Partnerships, Cloud Computing, Start-ups, Product Marketing, Professional Services, Salesforce.com, Channel Partners
Education
The George Washington University 1994 — 1996
MS
University of Pune 1990 — 1994
BS
Monica Keefe's Cadence Design Systems Experience 1997 - 2000
Job UE Lead at Nationwide Insurance
Industry Design
Experience
Nationwide Insurance June 2013 - Present
Motorola Mobility August 2011 - March 2013
Nationwide Insurance September 2009 - August 2011
Involution Studios April 2008 - June 2009
PayPal November 2005 - March 2008
PayPal May 2003 - November 2005
PayPal June 2002 - May 2003
Kovair 2000 - 2002
Cadence Design Systems 1997 - 2000
Skills
User-centered Design, Web Development, User Experience, User Interface Design, Web Design, User Interface, Usability, HTML, Usability Testing, Web Applications, User Experience Design, Wireframes, Information Architecture, Visual Design, Interaction Design, User Research, Design Management
Education
The University of Kansas 1998 — 1999
Computer Science
The University of Kansas 1992 — 1996
B.A., Creative Writing
Nationwide Insurance June 2013 - Present
Motorola Mobility August 2011 - March 2013
Nationwide Insurance September 2009 - August 2011
Involution Studios April 2008 - June 2009
PayPal November 2005 - March 2008
PayPal May 2003 - November 2005
PayPal June 2002 - May 2003
Kovair 2000 - 2002
Cadence Design Systems 1997 - 2000
Skills
User-centered Design, Web Development, User Experience, User Interface Design, Web Design, User Interface, Usability, HTML, Usability Testing, Web Applications, User Experience Design, Wireframes, Information Architecture, Visual Design, Interaction Design, User Research, Design Management
Education
The University of Kansas 1998 — 1999
Computer Science
The University of Kansas 1992 — 1996
B.A., Creative Writing
Oren Dvir's Cadence Design Systems Experience April 2014 - Present
Job Principal Application Engineer at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems April 2014 - Present
Scintera Networks May 2011 - March 2014
GigOptix Inc. December 2009 - May 2011
ChipX October 2005 - May 2011
ChipX (R&D) June 2004 - October 2005
Silicon Value September 2000 - December 2002
Skills
ASIC, Physical Design, VLSI, Static Timing Analysis, Semiconductors, SoC, IC, Verilog, EDA, Timing Closure, DFT, CMOS, Primetime, TCL, Formal Verification, Mixed Signal, Physical Verification, Clock Tree Synthesis, Floorplanning, Logic Synthesis, DRC, LVS
Education
Technion - Israel Institute of Technology 1998 — 2003
BSEE, Electrical engineering
Cadence Design Systems April 2014 - Present
Scintera Networks May 2011 - March 2014
GigOptix Inc. December 2009 - May 2011
ChipX October 2005 - May 2011
ChipX (R&D) June 2004 - October 2005
Silicon Value September 2000 - December 2002
Skills
ASIC, Physical Design, VLSI, Static Timing Analysis, Semiconductors, SoC, IC, Verilog, EDA, Timing Closure, DFT, CMOS, Primetime, TCL, Formal Verification, Mixed Signal, Physical Verification, Clock Tree Synthesis, Floorplanning, Logic Synthesis, DRC, LVS
Education
Technion - Israel Institute of Technology 1998 — 2003
BSEE, Electrical engineering
Imran Iqbal's Cadence Design Systems Experience October 1994 - September 1998
Job
Industry Semiconductors
Experience
ARM May 2009 - Present
Transmeta Co. October 1998 - January 2009
Cadence Design Systems October 1994 - September 1998
Crystal Semiconductor 1994 - 1994
Skills
Physical Design, Perl, SoC, Microprocessors, Customer Support, ASIC, EDA, IC, Timing Closure, Cadence, Logic Synthesis, Debugging, Place & Route, Floorplanning, Clock Tree Synthesis, Silicon
Education
The University of Texas at Austin 1989 — 1994
BSEE, MSEE, Semiconductor Materials & Devices
The University of Texas at Austin
MSEE, BSEE, Semiconductor Materials & Devices
ARM May 2009 - Present
Transmeta Co. October 1998 - January 2009
Cadence Design Systems October 1994 - September 1998
Crystal Semiconductor 1994 - 1994
Skills
Physical Design, Perl, SoC, Microprocessors, Customer Support, ASIC, EDA, IC, Timing Closure, Cadence, Logic Synthesis, Debugging, Place & Route, Floorplanning, Clock Tree Synthesis, Silicon
Education
The University of Texas at Austin 1989 — 1994
BSEE, MSEE, Semiconductor Materials & Devices
The University of Texas at Austin
MSEE, BSEE, Semiconductor Materials & Devices
Kirti Parmar's Cadence Design Systems Experience March 1999 - March 2000
Job Product & Customer Engagement Management
Industry Semiconductors
Experience
Magma Design Automation (acquired by Synopsys) December 2007 - March 2012
Fastrack Design August 2006 - May 2007
Pulsic, Inc. July 2004 - December 2005
Monterey Design Systems March 2003 - July 2004
Magma Design Automation March 2000 - October 2002
Cadence Design Systems March 1999 - March 2000
Cadence Design Systems January 1997 - March 1999
Cadence Design Systems January 1991 - December 1996
Cadence Design Systems (formerly Tangent Systems) 1987 - 1990
VR Information Systems/ Tektronix, CAESystems Division 1981 - 1987
Skills
Product Development, Product Engineering, Program Management, Strategic Alliances, Major Accounts, Customer Engagement, EDA, IC, Business Development, Physical Design, Semiconductors, ASIC, SoC, VLSI, TCL, Software Development, Field Operations, Release Management, Quality Management, Product Management, Integrated Circuit..., Cross-functional Team..., Static Timing Analysis, Floorplanning, Strategic Partnerships, Mixed Signal, Low-power Design, Verilog, Physical Verification, Analog Circuit Design, Signal Integrity, CMOS
Education
The University of Texas at Austin
M.S.E.E., Electrical Engineering
University of Louisville
B.S.E.E., Electrical Engineering
Magma Design Automation (acquired by Synopsys) December 2007 - March 2012
Fastrack Design August 2006 - May 2007
Pulsic, Inc. July 2004 - December 2005
Monterey Design Systems March 2003 - July 2004
Magma Design Automation March 2000 - October 2002
Cadence Design Systems March 1999 - March 2000
Cadence Design Systems January 1997 - March 1999
Cadence Design Systems January 1991 - December 1996
Cadence Design Systems (formerly Tangent Systems) 1987 - 1990
VR Information Systems/ Tektronix, CAESystems Division 1981 - 1987
Skills
Product Development, Product Engineering, Program Management, Strategic Alliances, Major Accounts, Customer Engagement, EDA, IC, Business Development, Physical Design, Semiconductors, ASIC, SoC, VLSI, TCL, Software Development, Field Operations, Release Management, Quality Management, Product Management, Integrated Circuit..., Cross-functional Team..., Static Timing Analysis, Floorplanning, Strategic Partnerships, Mixed Signal, Low-power Design, Verilog, Physical Verification, Analog Circuit Design, Signal Integrity, CMOS
Education
The University of Texas at Austin
M.S.E.E., Electrical Engineering
University of Louisville
B.S.E.E., Electrical Engineering
Hari Chakravarthula's Cadence Design Systems Experience November 1995 - October 2000
Job
Industry Semiconductors
Experience
Jawbone June 2012 - Present
Tessera September 2010 - June 2012
Tessera Inc January 2007 - September 2010
Tessera Inc January 2006 - January 2007
RedWave Networks, Inc. 2000 - 2002
Cadence Design Systems November 1995 - October 2000
Intel 1994 - 1995
Skills
Systems Design, ASIC, SoC Design, IP generation,..., ASIC, SoC, Hardware Architecture, Semiconductors, Verilog, System Design, Firmware, Simulations, Electronics, Product Development, Analog, RF, Hardware, Systems Engineering, Wireless, Cross-functional Team..., Embedded Systems
Education
The University of Kansas 1993 — 1995
M.S., Electrical Engineering
College of Engineering Guindy, Chennai 1989 — 1993
B.E, Electronics and Communications Engineering
E.R
Jawbone June 2012 - Present
Tessera September 2010 - June 2012
Tessera Inc January 2007 - September 2010
Tessera Inc January 2006 - January 2007
RedWave Networks, Inc. 2000 - 2002
Cadence Design Systems November 1995 - October 2000
Intel 1994 - 1995
Skills
Systems Design, ASIC, SoC Design, IP generation,..., ASIC, SoC, Hardware Architecture, Semiconductors, Verilog, System Design, Firmware, Simulations, Electronics, Product Development, Analog, RF, Hardware, Systems Engineering, Wireless, Cross-functional Team..., Embedded Systems
Education
The University of Kansas 1993 — 1995
M.S., Electrical Engineering
College of Engineering Guindy, Chennai 1989 — 1993
B.E, Electronics and Communications Engineering
E.R
Ron Pluth's Cadence Design Systems Experience February 2012 - Present
Job Staff Application Engineer at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems February 2012 - Present
PMC-Sierra January 2011 - February 2012
Cadence Design Systems April 2005 - January 2011
Verisity Design, Inc. December 2001 - April 2005
Continental Express February 2001 - November 2001
Summit Design December 1997 - August 1998
Simulation Technologies January 1997 - December 1997
Advanced Micro Devices August 1995 - January 1997
IBM July 1989 - August 1995
Skills
Functional Verification, Simulation, Debugging, Specman, Verilog, EDA, NCSim, Perl, ASIC, Simulations, Shell Scripting
Education
The University of Texas at Austin 1992 — 1995
University of Notre Dame 1985 — 1989
BSEE
Cadence Design Systems February 2012 - Present
PMC-Sierra January 2011 - February 2012
Cadence Design Systems April 2005 - January 2011
Verisity Design, Inc. December 2001 - April 2005
Continental Express February 2001 - November 2001
Summit Design December 1997 - August 1998
Simulation Technologies January 1997 - December 1997
Advanced Micro Devices August 1995 - January 1997
IBM July 1989 - August 1995
Skills
Functional Verification, Simulation, Debugging, Specman, Verilog, EDA, NCSim, Perl, ASIC, Simulations, Shell Scripting
Education
The University of Texas at Austin 1992 — 1995
University of Notre Dame 1985 — 1989
BSEE
Shyamal Sivanandan's Cadence Design Systems Experience March 2015 - Present
Job Silicon Validation Manager for SERDES based products
Industry Design
Experience
Cadence Design Systems March 2015 - Present
Teradyne April 2013 - March 2015
Avago Technologies October 2007 - April 2013
Broadcom January 2007 - June 2007
Intel July 2006 - September 2006
National Semiconductors June 2005 - September 2005
Skills
Proficient with high..., High Speed Design, Analog Circuit Design, Signal Integrity, SERDES, Test Automation, TIVA for circuit..., IC, Failure Analysis, Process Improvement, Technical Leadership, Debugging, CMOS, Circuit Design, Integrated Circuit..., Mixed Signal, Analog
Education
The University of Texas at Arlington 2002 — 2004
Master of Science, Electrical Engineering
University of Mumbai 1998 — 2002
Bachelor's degree, Electronics and Telecommunication
Cadence Design Systems March 2015 - Present
Teradyne April 2013 - March 2015
Avago Technologies October 2007 - April 2013
Broadcom January 2007 - June 2007
Intel July 2006 - September 2006
National Semiconductors June 2005 - September 2005
Skills
Proficient with high..., High Speed Design, Analog Circuit Design, Signal Integrity, SERDES, Test Automation, TIVA for circuit..., IC, Failure Analysis, Process Improvement, Technical Leadership, Debugging, CMOS, Circuit Design, Integrated Circuit..., Mixed Signal, Analog
Education
The University of Texas at Arlington 2002 — 2004
Master of Science, Electrical Engineering
University of Mumbai 1998 — 2002
Bachelor's degree, Electronics and Telecommunication
Kham Ken Nguyen's Cadence Design Systems Experience 2001 - 2005
Job CAD Manager at Quellan Inc.
Industry Telecommunications
Experience
Quellan Inc. Sr. ManagerSTATS ChipPAC Ltd. A JCET Company2014 - Present
Proteus Biomedical, Inc. 2009 - 2010
RFco, Inc. 2005 - 2005
Cadence Design Systems 2001 - 2005
Skills
ASIC, Semiconductors, Mixed Signal, IC, EDA, Verilog, SoC, Analog Circuit Design, CMOS, Analog
Education
The University of Texas at Dallas 1986 — 1989
MSEE, Solid State Device Physics
The University of Texas at Arlington 1981 — 1983
BSEE
Saigon University 1976 — 1979
Bachelor of Science (BS), Mathematics and Statistics in Economics
Quellan Inc. Sr. ManagerSTATS ChipPAC Ltd. A JCET Company2014 - Present
Proteus Biomedical, Inc. 2009 - 2010
RFco, Inc. 2005 - 2005
Cadence Design Systems 2001 - 2005
Skills
ASIC, Semiconductors, Mixed Signal, IC, EDA, Verilog, SoC, Analog Circuit Design, CMOS, Analog
Education
The University of Texas at Dallas 1986 — 1989
MSEE, Solid State Device Physics
The University of Texas at Arlington 1981 — 1983
BSEE
Saigon University 1976 — 1979
Bachelor of Science (BS), Mathematics and Statistics in Economics
Steve McDonald's Cadence Design Systems Experience 1990 - 1998
Job Vice President at Synopsys
Industry Computer Software
Experience
Synopsys October 2007 - Present
Simplex /(acquired by Cadence) 1998 - 2002
Cadence Design Systems 1990 - 1998
Cadence 1990 - 1998
Skills
EDA, ASIC, Semiconductors, SoC, IC, Enterprise Software, Strategic Partnerships, Start-ups
Education
The University of Salford 1976 — 1980
Electrical and Electronics Engineering
Xaverian College 1969 — 1976
Synopsys October 2007 - Present
Simplex /(acquired by Cadence) 1998 - 2002
Cadence Design Systems 1990 - 1998
Cadence 1990 - 1998
Skills
EDA, ASIC, Semiconductors, SoC, IC, Enterprise Software, Strategic Partnerships, Start-ups
Education
The University of Salford 1976 — 1980
Electrical and Electronics Engineering
Xaverian College 1969 — 1976
Nimish Aggarwal's Cadence Design Systems Experience June 2000 - June 2006
Job Senior Software Development Engineer
Industry Computer Software
Experience
Microsoft January 2006 - Present
Cadence Design Systems June 2000 - June 2006
Skills
Java, Android Development, Android, Windows Azure, Office 365, Management, Project Management, C#, C++, Cross-functional Team..., Cross-functional..., Requirements Analysis, Business Requirements, Technical Recruiting, Interviews
Education
Thapar Institute of Engineering and Technology 1996 — 2000
Bachelors of Engineering
Microsoft January 2006 - Present
Cadence Design Systems June 2000 - June 2006
Skills
Java, Android Development, Android, Windows Azure, Office 365, Management, Project Management, C#, C++, Cross-functional Team..., Cross-functional..., Requirements Analysis, Business Requirements, Technical Recruiting, Interviews
Education
Thapar Institute of Engineering and Technology 1996 — 2000
Bachelors of Engineering
Viktor Lapinskii's Cadence Design Systems Experience August 2013 - Present
Job Architect at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems August 2013 - Present
Mentor Graphics November 2010 - July 2013
Pyxis Technology February 2005 - November 2010
Ammocore Technology 2002 - 2005
Education
The University of Texas at Austin
Ph.D., Computer Engineering
Cadence Design Systems August 2013 - Present
Mentor Graphics November 2010 - July 2013
Pyxis Technology February 2005 - November 2010
Ammocore Technology 2002 - 2005
Education
The University of Texas at Austin
Ph.D., Computer Engineering
Leon Searl's Cadence Design Systems Experience 1997 - 2000
Job Research Engineer at ITTC, Unversity of Kansas
Industry Telecommunications
Experience
Thump Data Works, Inc. April 2015 - Present
ITTC, Unversity of Kansas 2000 - Present
Cadence Design Systems 1997 - 2000
TRW Space & Defense September 1987 - October 1992
Skills
iOS development, Android Development, KiCAD, Software Design, FPGA, VHDL, PCB design, Programming, Pyrotechnics, Perl, Software Engineering, Python, C, Matlab, C++, Linux, Embedded Systems, System Architecture
Education
The University of Kansas 1985 — 1987
MS, Electrical Engineering
The University of Kansas 1981 — 1985
BS, Electrical Engineering
Thump Data Works, Inc. April 2015 - Present
ITTC, Unversity of Kansas 2000 - Present
Cadence Design Systems 1997 - 2000
TRW Space & Defense September 1987 - October 1992
Skills
iOS development, Android Development, KiCAD, Software Design, FPGA, VHDL, PCB design, Programming, Pyrotechnics, Perl, Software Engineering, Python, C, Matlab, C++, Linux, Embedded Systems, System Architecture
Education
The University of Kansas 1985 — 1987
MS, Electrical Engineering
The University of Kansas 1981 — 1985
BS, Electrical Engineering
Shlomi Uziel's Cadence Design Systems Experience 2014 - Present
Job VP R&D, Verification at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems 2014 - Present
Cadence Design Systems 2012 - 2014
Cadence Design Systems 2008 - 2012
Verisity Design, Inc. 1998 - 2005
Digital Equipment Corporation 1996 - 1998
Skills
Functional Verification, EDA, Simulations, Specman, ASIC, Verilog, R&D, SystemVerilog
Education
The Hebrew University 1995 — 2000
Le'Yada 1984 — 1990
High School
Cadence Design Systems 2014 - Present
Cadence Design Systems 2012 - 2014
Cadence Design Systems 2008 - 2012
Verisity Design, Inc. 1998 - 2005
Digital Equipment Corporation 1996 - 1998
Skills
Functional Verification, EDA, Simulations, Specman, ASIC, Verilog, R&D, SystemVerilog
Education
The Hebrew University 1995 — 2000
Le'Yada 1984 — 1990
High School
Mickey Rodriguez's Cadence Design Systems Experience
Job Sales Technical Leader AE at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems
Skills
EDA, Verilog, Semiconductors, ASIC, Debugging, SoC, IC, TCL
Education
The University of Texas at Austin 1997 — 2000
Cadence Design Systems
Skills
EDA, Verilog, Semiconductors, ASIC, Debugging, SoC, IC, TCL
Education
The University of Texas at Austin 1997 — 2000
Sonny Radler's Cadence Design Systems Experience October 2000 - Present
Job Sr. Principal Configuration Management Engineer at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems October 2000 - Present
Sabre Airline Solutions August 1996 - October 2000
Premier Reource Marketing Group April 1994 - August 1996
Skills
ClearCase, Configuration Management, Perl, CVS, Shell Scripting, Unix, Solaris, Linux, Agile Methodologies, Software Engineering, Subversion, Unix Shell Scripting, RCS, Linux System..., Windows 7, Windows, perforce, Red Hat Linux, Linux Kernel, Electricians, Electrical Safety, Scripting, Perl Script, ClearQuest, AIX Administration, Project Management, Project Planning, Software Project..., Technical Leadership, Team Leadership, Eclipse, Bash, Tcl-Tk, TCL, HTML, HTML 5, HTML scripting, Web Design, Web Development, Software Development, Perforce, IBM Rational Tools
Education
The University of Texas at Dallas 1984 — 1988
University of North Texas
Cadence Design Systems October 2000 - Present
Sabre Airline Solutions August 1996 - October 2000
Premier Reource Marketing Group April 1994 - August 1996
Skills
ClearCase, Configuration Management, Perl, CVS, Shell Scripting, Unix, Solaris, Linux, Agile Methodologies, Software Engineering, Subversion, Unix Shell Scripting, RCS, Linux System..., Windows 7, Windows, perforce, Red Hat Linux, Linux Kernel, Electricians, Electrical Safety, Scripting, Perl Script, ClearQuest, AIX Administration, Project Management, Project Planning, Software Project..., Technical Leadership, Team Leadership, Eclipse, Bash, Tcl-Tk, TCL, HTML, HTML 5, HTML scripting, Web Design, Web Development, Software Development, Perforce, IBM Rational Tools
Education
The University of Texas at Dallas 1984 — 1988
University of North Texas
Bruce Luttrell's Cadence Design Systems Experience computer scientistFerranti Interdesign1982 - 1984
Job SMCS at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems computer scientistFerranti Interdesign1982 - 1984
Education
The University of Texas at Austin 1974 — 1978
Cadence Design Systems computer scientistFerranti Interdesign1982 - 1984
Education
The University of Texas at Austin 1974 — 1978
Jason Dlugosch's Cadence Design Systems Experience June 2014 - Present
Job Product Engineering Architect at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems June 2014 - Present
Cadence Design Systems April 2012 - June 2014
Magma Design Automation March 2009 - April 2012
Magma Design Automation March 2008 - January 2009
Magma Design Automation February 2005 - February 2008
Texas Instruments January 2002 - February 2005
Texas Instruments August 1998 - December 2001
Skills
TCL, Floorplanning, Timing Closure, Static Timing Analysis, DFT, Clock Tree Synthesis, DRC, Formal Verification, EDA, Magma, Route, Timing, Primetime, Physical Design, Digital Design, Perl, Shell Scripting, Integrated Circuit..., ASIC
Education
Texas A&M University 1993 — 1998
Bachelor of Science, Electrical Engineering
Cadence Design Systems June 2014 - Present
Cadence Design Systems April 2012 - June 2014
Magma Design Automation March 2009 - April 2012
Magma Design Automation March 2008 - January 2009
Magma Design Automation February 2005 - February 2008
Texas Instruments January 2002 - February 2005
Texas Instruments August 1998 - December 2001
Skills
TCL, Floorplanning, Timing Closure, Static Timing Analysis, DFT, Clock Tree Synthesis, DRC, Formal Verification, EDA, Magma, Route, Timing, Primetime, Physical Design, Digital Design, Perl, Shell Scripting, Integrated Circuit..., ASIC
Education
Texas A&M University 1993 — 1998
Bachelor of Science, Electrical Engineering
Paula Nguyen's Cadence Design Systems Experience 2002 - 2003
Job Physical Design Engineer at Freescale Semiconductor
Industry Semiconductors
Experience
Freescale Semiconductor November 2012 - Present
Freescale Semiconductor 2005 - Present
FreescaleSemiconductor September 2005 - October 2007
HPL Technologies 2003 - 2005
Cadence Design Systems 2002 - 2003
Testchip Technologies 1999 - 2001
Skills
SoC, Physical Design, CMOS, Design for Manufacturing, ASIC, Mixed Signal, Shell Scripting, Semiconductors, EDA, DRC, IC, Perl, Physical Verification, Analog, TCL
Education
The University of Texas at Austin 1996 — 1999
Bachelor of Science (B.S.)
Freescale Semiconductor November 2012 - Present
Freescale Semiconductor 2005 - Present
FreescaleSemiconductor September 2005 - October 2007
HPL Technologies 2003 - 2005
Cadence Design Systems 2002 - 2003
Testchip Technologies 1999 - 2001
Skills
SoC, Physical Design, CMOS, Design for Manufacturing, ASIC, Mixed Signal, Shell Scripting, Semiconductors, EDA, DRC, IC, Perl, Physical Verification, Analog, TCL
Education
The University of Texas at Austin 1996 — 1999
Bachelor of Science (B.S.)
Ian Nixon's Cadence Design Systems Experience January 2013 - Present
Job Engineering Group Director at Cadence Design Systems
Industry Computer Hardware
Experience
Cadence Design Systems January 2013 - Present
Eve USA August 2008 - January 2013
Eve USA December 2006 - July 2008
Tharas Systems Inc. 1998 - 2006
Zycad August 1994 - August 1997
National Semiconductor August 1989 - August 1994
Philips Components January 1988 - August 1989
Education
The University of Edinburgh 1984 — 1987
PhD, Computer Science
The University of Edinburgh 1983 — 1984
MSc, Computer Science
The University of Sheffield 1980 — 1983
BSc, Applied Mathematics & Computer Science
Cadence Design Systems January 2013 - Present
Eve USA August 2008 - January 2013
Eve USA December 2006 - July 2008
Tharas Systems Inc. 1998 - 2006
Zycad August 1994 - August 1997
National Semiconductor August 1989 - August 1994
Philips Components January 1988 - August 1989
Education
The University of Edinburgh 1984 — 1987
PhD, Computer Science
The University of Edinburgh 1983 — 1984
MSc, Computer Science
The University of Sheffield 1980 — 1983
BSc, Applied Mathematics & Computer Science
Robert Dail's Cadence Design Systems Experience February 2000 - Present
Job AE at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems February 2000 - Present
Lucent Technologies 1997 - 2000
lucent 1997 - 2000
Skills
EDA, VLSI, IC, CAD, Unix, Linux, Physical Design, TCL, Hardware, SoC, Semiconductors, Debugging, Integrated Circuit..., Testing, Simulations, ASIC
Education
Texas State University-San Marcos 1990 — 1996
Master of Science (MS), Physics
Cadence Design Systems February 2000 - Present
Lucent Technologies 1997 - 2000
lucent 1997 - 2000
Skills
EDA, VLSI, IC, CAD, Unix, Linux, Physical Design, TCL, Hardware, SoC, Semiconductors, Debugging, Integrated Circuit..., Testing, Simulations, ASIC
Education
Texas State University-San Marcos 1990 — 1996
Master of Science (MS), Physics
Rohit D'Souza's Cadence Design Systems Experience December 2010 - March 2014
Job Sr. Engineering Manager SoC System Validation Technologist at Intel
Industry Computer Hardware
Experience
Intel Corporation March 2014 - Present
Cadence Design Systems December 2010 - March 2014
Qualcomm June 2008 - December 2010
Focus Enhancements May 2004 - June 2008
Sharp Microelectronics of the Americas 2002 - 2004
Alcatel USA January 1999 - November 2001
Skills
Open Verification..., UVM, Microprocessors, Static Timing Analysis, Formal Verification, Specman, Firmware, PCIe, OVM, System Verilog, VHDL, Perl, ASIC/SOC Verification, Verilog, Team Building, Low Power Verification, TLM Driven Verification, C, C++, SystemC, Palladium, ASIC, SoC, SystemVerilog, RTL Design
Education
The University of Texas at Dallas 2000 — 2004
Master of Science (M.S.), Electrical Engineering (Microelectronics)
Texas Tech University 1994 — 1998
Bachelor of Science (B.S.), Electrical Engineering
S.K. Somaiya 1992 — 1994
HSC, Science
St. Joseph's High School 1982 — 1993
Secondary School Certificate (S.S.C), High School/Secondary Diplomas and Certificates
Intel Corporation March 2014 - Present
Cadence Design Systems December 2010 - March 2014
Qualcomm June 2008 - December 2010
Focus Enhancements May 2004 - June 2008
Sharp Microelectronics of the Americas 2002 - 2004
Alcatel USA January 1999 - November 2001
Skills
Open Verification..., UVM, Microprocessors, Static Timing Analysis, Formal Verification, Specman, Firmware, PCIe, OVM, System Verilog, VHDL, Perl, ASIC/SOC Verification, Verilog, Team Building, Low Power Verification, TLM Driven Verification, C, C++, SystemC, Palladium, ASIC, SoC, SystemVerilog, RTL Design
Education
The University of Texas at Dallas 2000 — 2004
Master of Science (M.S.), Electrical Engineering (Microelectronics)
Texas Tech University 1994 — 1998
Bachelor of Science (B.S.), Electrical Engineering
S.K. Somaiya 1992 — 1994
HSC, Science
St. Joseph's High School 1982 — 1993
Secondary School Certificate (S.S.C), High School/Secondary Diplomas and Certificates
Riputapan (Ripu) Singh's Cadence Design Systems Experience 2002 - 2002
Job Experienced Corporate Development Professional
Industry Computer Software
Experience
Rogue Wave Software 2014 - Present
Rovi 2013 - 2014
NeuStar, Inc. 2010 - 2013
Rutberg & Company 2009 - 2010
Tall Oaks Capital 2008 - 2008
ST Microelectronics 2003 - 2007
Cadence Design Systems 2002 - 2002
Skills
Venture Capital, Mergers, Investment Banking, Corporate Development, Product Management, Financial Modeling, Competitive Analysis, Business Strategy, Strategy, Start-ups, Analytics, Cross-functional Team..., Corporate Finance, Product Development, Valuation, Strategic Planning, Mergers & Acquisitions, Business Development, Strategic Partnerships, Entrepreneurship, Management Consulting, Mobile Devices
Education
University of Virginia - Darden Graduate School of Business Administration 2007 — 2009
MBA
Thapar Institute of Engineering and Technology 1999 — 2003
BE, Computer Engineering
Rogue Wave Software 2014 - Present
Rovi 2013 - 2014
NeuStar, Inc. 2010 - 2013
Rutberg & Company 2009 - 2010
Tall Oaks Capital 2008 - 2008
ST Microelectronics 2003 - 2007
Cadence Design Systems 2002 - 2002
Skills
Venture Capital, Mergers, Investment Banking, Corporate Development, Product Management, Financial Modeling, Competitive Analysis, Business Strategy, Strategy, Start-ups, Analytics, Cross-functional Team..., Corporate Finance, Product Development, Valuation, Strategic Planning, Mergers & Acquisitions, Business Development, Strategic Partnerships, Entrepreneurship, Management Consulting, Mobile Devices
Education
University of Virginia - Darden Graduate School of Business Administration 2007 — 2009
MBA
Thapar Institute of Engineering and Technology 1999 — 2003
BE, Computer Engineering
Klaus Riedel's Cadence Design Systems Experience 1996 - 2000
Job Director of Sales US and Europe at BISTel
Industry Information Technology and Services
Experience
BISTel September 2014 - Present
Comprehend Systems January 2014 - July 2014
Syntricity February 2009 - January 2014
Paladin Partners LLC June 2008 - February 2009
Cognio February 2006 - October 2007
Wireless Valley Communications/Motorola February 2005 - February 2006
Syntricity January 2000 - January 2005
Cadence Design Systems 1996 - 2000
Freescale Semiconductor 1991 - 1996
Skills
Wireless, Cisco Technologies, Semiconductors, Pre-sales, ASIC, EDA, IC, Wireless Networking, Go-to-market Strategy, SaaS, Product Management, Start-ups, Analog, Product Marketing, Strategic Partnerships, Cross-functional Team...
Education
The University of Texas at Austin 1987 — 1991
BS, Electrical Engineering
Reagan
Reagan
BISTel September 2014 - Present
Comprehend Systems January 2014 - July 2014
Syntricity February 2009 - January 2014
Paladin Partners LLC June 2008 - February 2009
Cognio February 2006 - October 2007
Wireless Valley Communications/Motorola February 2005 - February 2006
Syntricity January 2000 - January 2005
Cadence Design Systems 1996 - 2000
Freescale Semiconductor 1991 - 1996
Skills
Wireless, Cisco Technologies, Semiconductors, Pre-sales, ASIC, EDA, IC, Wireless Networking, Go-to-market Strategy, SaaS, Product Management, Start-ups, Analog, Product Marketing, Strategic Partnerships, Cross-functional Team...
Education
The University of Texas at Austin 1987 — 1991
BS, Electrical Engineering
Reagan
Reagan
Aparna Korlimarla's Cadence Design Systems Experience February 2007 - April 2008
Job Manager /Analyst
Industry Computer Software
Experience
Apple August 2010 - Present
Pacific Coast Building Products April 2009 - August 2010
CV Therapeutics January 2009 - April 2009
Material in Motion September 2008 - December 2008
Cadence Design Systems February 2007 - April 2008
AMD June 2006 - February 2007
Verizon wireless October 2005 - May 2006
Abbott September 2004 - May 2005
Skills
Business Objects, SAP R/3, SAP, Business Intelligence, SAP BI, SAP BW, Data Warehousing, ABAP, SD, Data Modeling, SAP Netweaver, ECC, SAP ERP, ERP, SAP Implementation
Education
The University of New Mexico 2002 — 2004
Master's degree, Mechanical Engineering
Apple August 2010 - Present
Pacific Coast Building Products April 2009 - August 2010
CV Therapeutics January 2009 - April 2009
Material in Motion September 2008 - December 2008
Cadence Design Systems February 2007 - April 2008
AMD June 2006 - February 2007
Verizon wireless October 2005 - May 2006
Abbott September 2004 - May 2005
Skills
Business Objects, SAP R/3, SAP, Business Intelligence, SAP BI, SAP BW, Data Warehousing, ABAP, SD, Data Modeling, SAP Netweaver, ECC, SAP ERP, ERP, SAP Implementation
Education
The University of New Mexico 2002 — 2004
Master's degree, Mechanical Engineering
Chi-Kai Chien's Cadence Design Systems Experience 2006 - 2007
Job Product development at CareZone
Industry Computer Software
Experience
Care Zone Inc. July 2012 - Present
Marvell Semiconductor April 2011 - July 2012
NVIDIA August 2007 - April 2011
Cadence Design Systems 2006 - 2007
Cisco May 2005 - June 2006
Vihana October 2003 - May 2005
Vivace Networks September 2000 - April 2002
PMC-Sierra June 1998 - September 2000
Integrated Telecom Technology September 1996 - June 1998
Skills
Debugging, Firmware, Embedded Systems, System Architecture, Software Development, SoC, Algorithms, Device Drivers, Cross-functional Team..., Integrated Circuit..., Software Design, ARM, Verilog, Product Management, ASIC, C, Perl, Semiconductors, C#, Distributed Systems, Financial Analysis, ModelSim, Integration, Software Engineering, Embedded Software, Project Management, Computer Architecture, Hardware, RTOS, Processors
Education
University of California, Irvine 1990 — 1995
Ph.D., Information & Computer Science
The Johns Hopkins University 1988 — 1989
M.S., CS
The Johns Hopkins University 1984 — 1988
B.S., EECS
Care Zone Inc. July 2012 - Present
Marvell Semiconductor April 2011 - July 2012
NVIDIA August 2007 - April 2011
Cadence Design Systems 2006 - 2007
Cisco May 2005 - June 2006
Vihana October 2003 - May 2005
Vivace Networks September 2000 - April 2002
PMC-Sierra June 1998 - September 2000
Integrated Telecom Technology September 1996 - June 1998
Skills
Debugging, Firmware, Embedded Systems, System Architecture, Software Development, SoC, Algorithms, Device Drivers, Cross-functional Team..., Integrated Circuit..., Software Design, ARM, Verilog, Product Management, ASIC, C, Perl, Semiconductors, C#, Distributed Systems, Financial Analysis, ModelSim, Integration, Software Engineering, Embedded Software, Project Management, Computer Architecture, Hardware, RTOS, Processors
Education
University of California, Irvine 1990 — 1995
Ph.D., Information & Computer Science
The Johns Hopkins University 1988 — 1989
M.S., CS
The Johns Hopkins University 1984 — 1988
B.S., EECS
Karthik Rajagopal's Cadence Design Systems Experience August 1999 - January 2001
Job Principal Engineer at Entropic Communications
Industry Computer Hardware
Experience
Intel Corporation September 2014 - Present
Entropic Communications January 2014 - August 2014
Broadcom January 2008 - December 2013
Texas Instruments January 2001 - January 2008
Cadence Design Systems August 1999 - January 2001
Skills
FPGA prototyping, VHDL, Matlab, Perl Script, Verilog, C, Semiconductors, Debugging, RTL design, WCDMA, SystemVerilog, ASIC
Education
University of California, San Diego 2010 — 2016
Phd Candidate, Electrical and Computer Engineering (Focus: Communication theory and Systems)
University of Kansas 1997 — 2001
Master of Science (M.S.), Electrical Engineering (Focus: Digital Signal Processing)
Intel Corporation September 2014 - Present
Entropic Communications January 2014 - August 2014
Broadcom January 2008 - December 2013
Texas Instruments January 2001 - January 2008
Cadence Design Systems August 1999 - January 2001
Skills
FPGA prototyping, VHDL, Matlab, Perl Script, Verilog, C, Semiconductors, Debugging, RTL design, WCDMA, SystemVerilog, ASIC
Education
University of California, San Diego 2010 — 2016
Phd Candidate, Electrical and Computer Engineering (Focus: Communication theory and Systems)
University of Kansas 1997 — 2001
Master of Science (M.S.), Electrical Engineering (Focus: Digital Signal Processing)
Gang He's Cadence Design Systems Experience July 2008 - September 2011
Job Software Engineer, Search at Google
Industry Information Technology and Services
Experience
Google January 2014 - Present
eBay September 2011 - January 2014
Cadence Design Systems July 2008 - September 2011
Timbre Technologies May 2007 - July 2008
Timbre Technologies, a subsidiary of Tokyo Electron Ltd. May 2005 - May 2007
University of Pittsburgh September 2003 - May 2005
Massachusetts Institute of Technology September 2001 - August 2003
Skills
Distributed Systems, Algorithms, C++, Machine Learning, C#, Object Oriented Design, Software Engineering, Perl, C, Simulations, Debugging, Hadoop, Multithreading, Linux, Search Engines, Shell Scripting, Software Design, Software Development, System Architecture, Unix
Education
The Johns Hopkins University 1996 — 2001
Doctor of Philosophy (PhD), Physics
Google January 2014 - Present
eBay September 2011 - January 2014
Cadence Design Systems July 2008 - September 2011
Timbre Technologies May 2007 - July 2008
Timbre Technologies, a subsidiary of Tokyo Electron Ltd. May 2005 - May 2007
University of Pittsburgh September 2003 - May 2005
Massachusetts Institute of Technology September 2001 - August 2003
Skills
Distributed Systems, Algorithms, C++, Machine Learning, C#, Object Oriented Design, Software Engineering, Perl, C, Simulations, Debugging, Hadoop, Multithreading, Linux, Search Engines, Shell Scripting, Software Design, Software Development, System Architecture, Unix
Education
The Johns Hopkins University 1996 — 2001
Doctor of Philosophy (PhD), Physics
Efrat Shneydor's Cadence Design Systems Experience 2005 - Present
Job Verification Methodology Architect Cadence
Industry Computer Software
Marco Yu's Cadence Design Systems Experience 2003 - 2005
Job Software Engineer at Google
Industry Computer Software
Experience
Google September 2012 - Present
Yahoo! April 2011 - September 2012
Yahoo! December 2007 - April 2011
Mentor Graphics March 2005 - November 2007
Cadence Design Systems 2003 - 2005
Simplex 2002 - 2005
Celestry 2001 - 2002
Ultima 1997 - 2002
Skills
c++, Linux, hadoop, MapReduce, Java, HTML, perl, boost, Unicode, MySQL, C++, Perl, Hadoop, Distributed Systems, Multithreading, Subversion, Object Oriented Design, Boost
Education
University of California, Santa Cruz 1993 — 1997
Ph.D., Computer Engineering
The University of Hong Kong 1987 — 1991
BSc, Electrical Engineering
Google September 2012 - Present
Yahoo! April 2011 - September 2012
Yahoo! December 2007 - April 2011
Mentor Graphics March 2005 - November 2007
Cadence Design Systems 2003 - 2005
Simplex 2002 - 2005
Celestry 2001 - 2002
Ultima 1997 - 2002
Skills
c++, Linux, hadoop, MapReduce, Java, HTML, perl, boost, Unicode, MySQL, C++, Perl, Hadoop, Distributed Systems, Multithreading, Subversion, Object Oriented Design, Boost
Education
University of California, Santa Cruz 1993 — 1997
Ph.D., Computer Engineering
The University of Hong Kong 1987 — 1991
BSc, Electrical Engineering
Charles Patino's Cadence Design Systems Experience November 1998 - September 2002
Job Information Technology and Services Professional
Industry Information Technology and Services
Experience
Dell February 2006 - October 2007
DURABLE NETWORKS, INC. January 2003 - February 2006
Cadence Design Systems November 1998 - September 2002
GENERAL SERVICES COMMISSION October 1997 - May 1998
TxDOT January 1994 - October 1997
Education
Texas A&M University 1968 — 1972
BBA, Mnagement
Command and General Staff College
Management and Leadership
Dell February 2006 - October 2007
DURABLE NETWORKS, INC. January 2003 - February 2006
Cadence Design Systems November 1998 - September 2002
GENERAL SERVICES COMMISSION October 1997 - May 1998
TxDOT January 1994 - October 1997
Education
Texas A&M University 1968 — 1972
BBA, Mnagement
Command and General Staff College
Management and Leadership
Tal Zigman's Cadence Design Systems Experience July 2014 - Present
Job HR Director and Business Partner at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems July 2014 - Present
Cadence Design Systems July 2013 - June 2014
Cadence Design Systems April 2012 - June 2013
Keshet Broadcasting Ltd. January 2006 - February 2011
Eden Springs Ltd. October 2000 - December 2005
Skills
Leadership, Talent Management, Organizational..., Human Resources, Training, Recruiting, Team Building, Employee Relations, Labor Relations, Change Management, Employee Benefits, Deferred Compensation, Employee Engagement, HR Consulting, Workforce Planning, Performance Management, Career Development, Executive Coaching, HR Policies, Employee Training, Onboarding, Interviews, Personnel Management, Leadership Development, Conflict Resolution, Organizational..., HRIS, Executive Management, Management Development, Mergers & Acquisitions, Talent Acquisition, Strategy, Management, Sourcing, Management Consulting, Consulting, Start-ups, Team Management, Team Leadership
Education
Tel Aviv University 1997 — 2000
M.Sc., Organizational Behavior
Tel Aviv University 1992 — 1996
BA, Psychology and Political Science
Cadence Design Systems July 2014 - Present
Cadence Design Systems July 2013 - June 2014
Cadence Design Systems April 2012 - June 2013
Keshet Broadcasting Ltd. January 2006 - February 2011
Eden Springs Ltd. October 2000 - December 2005
Skills
Leadership, Talent Management, Organizational..., Human Resources, Training, Recruiting, Team Building, Employee Relations, Labor Relations, Change Management, Employee Benefits, Deferred Compensation, Employee Engagement, HR Consulting, Workforce Planning, Performance Management, Career Development, Executive Coaching, HR Policies, Employee Training, Onboarding, Interviews, Personnel Management, Leadership Development, Conflict Resolution, Organizational..., HRIS, Executive Management, Management Development, Mergers & Acquisitions, Talent Acquisition, Strategy, Management, Sourcing, Management Consulting, Consulting, Start-ups, Team Management, Team Leadership
Education
Tel Aviv University 1997 — 2000
M.Sc., Organizational Behavior
Tel Aviv University 1992 — 1996
BA, Psychology and Political Science
Bill Gamble's Cadence Design Systems Experience October 1997 - Present
Job Sales Technical Leader Application Engineer at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems October 1997 - Present
Lattice Semiconductor August 1996 - October 1997
Symbios Logic 1990 - 1996
United Technologies Microelectronics Center June 1985 - April 1990
Skills
EDA, Timing Closure, IC, TCL, Physical Design, Verilog, Semiconductors, SoC, ASIC, Static Timing Analysis, Low-power Design, VLSI, Integrated Circuit..., Mixed Signal
Education
University of Colorado Colorado Springs 1989 — 1992
MS
The Ohio State University 1980 — 1985
BS
Cadence Design Systems October 1997 - Present
Lattice Semiconductor August 1996 - October 1997
Symbios Logic 1990 - 1996
United Technologies Microelectronics Center June 1985 - April 1990
Skills
EDA, Timing Closure, IC, TCL, Physical Design, Verilog, Semiconductors, SoC, ASIC, Static Timing Analysis, Low-power Design, VLSI, Integrated Circuit..., Mixed Signal
Education
University of Colorado Colorado Springs 1989 — 1992
MS
The Ohio State University 1980 — 1985
BS
Gopi Kudva's Cadence Design Systems Experience April 2003 - Present
Job Engineering Director
Industry Computer Hardware
Experience
Cadence Design Systems April 2003 - Present
Skills
Physical Design, SoC, Semiconductors, Debugging, ASIC, Timing Closure, VLSI, Mixed Signal, Logic Synthesis, Verilog, FPGA, Perl, TCL, IC, Algorithms, Formal Verification, Static Timing Analysis
Education
The Ohio State University 1995 — 1997
Cadence Design Systems April 2003 - Present
Skills
Physical Design, SoC, Semiconductors, Debugging, ASIC, Timing Closure, VLSI, Mixed Signal, Logic Synthesis, Verilog, FPGA, Perl, TCL, IC, Algorithms, Formal Verification, Static Timing Analysis
Education
The Ohio State University 1995 — 1997
Kimberly Carson's Cadence Design Systems Experience November 2000 - November 2003
Job Financial Advisor, CLTC
Industry Financial Services
Experience
Ameriprise Financial Services, Inc. July 2011 - Present
Waddell & Reed January 2009 - May 2011
Silicon Valley Small Business Development Center March 2009 - January 2011
CRG Real Estate and Mortgage Services January 2006 - November 2007
American Home Mortgage July 2005 - February 2007
Bank of America April 2003 - July 2005
Cadence Design Systems November 2000 - November 2003
Park Wine Company 1997 - 2000
Birk's Restaurant 1990 - 2000
Education
Securities Training Institute 2008 — 2008
Series 7, 6, 63, 65 and California Insurance Licenses, Investment, Retirement and Protection Planning
Securities Training Institute 2008 — 2008
Series 65, Financial Planning
CMPS Institute 2007 — 2007
Certificate, Mortgage/Financial Planning
Allied Business School 2002 — 2004
Finance, General
George Washington University 2002 — 2002
Certificate, Project Management
West Valley College 1980 — 1982
General Business
Westmont High School 1976 — 1980
General
Ameriprise Financial Services, Inc. July 2011 - Present
Waddell & Reed January 2009 - May 2011
Silicon Valley Small Business Development Center March 2009 - January 2011
CRG Real Estate and Mortgage Services January 2006 - November 2007
American Home Mortgage July 2005 - February 2007
Bank of America April 2003 - July 2005
Cadence Design Systems November 2000 - November 2003
Park Wine Company 1997 - 2000
Birk's Restaurant 1990 - 2000
Education
Securities Training Institute 2008 — 2008
Series 7, 6, 63, 65 and California Insurance Licenses, Investment, Retirement and Protection Planning
Securities Training Institute 2008 — 2008
Series 65, Financial Planning
CMPS Institute 2007 — 2007
Certificate, Mortgage/Financial Planning
Allied Business School 2002 — 2004
Finance, General
George Washington University 2002 — 2002
Certificate, Project Management
West Valley College 1980 — 1982
General Business
Westmont High School 1976 — 1980
General
Ravi Narayanaswami's Cadence Design Systems Experience 2002 - 2004
Job Google
Industry Semiconductors
Experience
Google June 2014 - Present
Qualcomm May 2011 - June 2014
CSR November 2004 - April 2011
Cadence Design Systems 2002 - 2004
Skills
SystemVerilog, IC, ASIC, Verilog, FPGA, Embedded Systems, SoC, RTL design, Debugging, Semiconductors, VLSI
Education
Texas A&M University 1999 — 2001
MS, Electrical Engineering
Google June 2014 - Present
Qualcomm May 2011 - June 2014
CSR November 2004 - April 2011
Cadence Design Systems 2002 - 2004
Skills
SystemVerilog, IC, ASIC, Verilog, FPGA, Embedded Systems, SoC, RTL design, Debugging, Semiconductors, VLSI
Education
Texas A&M University 1999 — 2001
MS, Electrical Engineering
Cristian Masgras's Cadence Design Systems Experience June 2012 - November 2013
Job Hardware Engineering, Silicon Optimizations at Amazon Web Services
Industry Semiconductors
Experience
Everspin Technologies May 2015 - Present
Amazon Web Services June 2014 - May 2015
Cadence Design Systems June 2012 - November 2013
Emulex May 2010 - June 2012
NextIO February 2005 - May 2010
Microchip Technology October 2002 - February 2005
Philips Semiconductors October 2001 - October 2002
Motorola February 1996 - October 2001
Skills
ASIC, RTL design, Debugging, FPGA, Verilog, IC, Simulations, Integrated Circuit..., Digital Signal..., Static Timing Analysis, VLSI, Analog, Functional Verification, PCB design, RTL Design
Education
The Ohio State University 1988 — 1993
B.S.E.E., Electrical Engineering, Physics
The Ohio State University
M.S.E.E., Digital Design, Optics
Everspin Technologies May 2015 - Present
Amazon Web Services June 2014 - May 2015
Cadence Design Systems June 2012 - November 2013
Emulex May 2010 - June 2012
NextIO February 2005 - May 2010
Microchip Technology October 2002 - February 2005
Philips Semiconductors October 2001 - October 2002
Motorola February 1996 - October 2001
Skills
ASIC, RTL design, Debugging, FPGA, Verilog, IC, Simulations, Integrated Circuit..., Digital Signal..., Static Timing Analysis, VLSI, Analog, Functional Verification, PCB design, RTL Design
Education
The Ohio State University 1988 — 1993
B.S.E.E., Electrical Engineering, Physics
The Ohio State University
M.S.E.E., Digital Design, Optics
Marco Zavaroni's Cadence Design Systems Experience Core Comp Director/Core Comp ArchitectCadence Design Systems2003 - 2005
Job Architect at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems Core Comp Director/Core Comp ArchitectCadence Design Systems2003 - 2005
Cadence Design Systems 1998 - 2003
Motorola Semiconductor 1994 - 1997
Philips Semiconductors 1990 - 1994
Education
The University of Glasgow 1986 — 1990
B. Eng, Electronic Systems & Microprocessor Engineering
Cadence Design Systems Core Comp Director/Core Comp ArchitectCadence Design Systems2003 - 2005
Cadence Design Systems 1998 - 2003
Motorola Semiconductor 1994 - 1997
Philips Semiconductors 1990 - 1994
Education
The University of Glasgow 1986 — 1990
B. Eng, Electronic Systems & Microprocessor Engineering
Douglas Vraa's Cadence Design Systems Experience October 2009 - Present
Job Product Specialist, HW Verification at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems October 2009 - Present
Cadence Design Systems 1997 - 2009
Quickturn Design Systems 1997 - 2000
United Defense 1991 - 1997
Unisys 1987 - 1990
Skills
SystemVerilog, TCL, Verilog, SystemC, Unix Shell Scripting, Microsoft Office, Hardware, Cadence, Electrical Engineering, EDA, Static Timing Analysis, ASIC
Education
The University of North Dakota
BS, Electrical Engineering
Cadence Design Systems October 2009 - Present
Cadence Design Systems 1997 - 2009
Quickturn Design Systems 1997 - 2000
United Defense 1991 - 1997
Unisys 1987 - 1990
Skills
SystemVerilog, TCL, Verilog, SystemC, Unix Shell Scripting, Microsoft Office, Hardware, Cadence, Electrical Engineering, EDA, Static Timing Analysis, ASIC
Education
The University of North Dakota
BS, Electrical Engineering
Simon Kinahan's Cadence Design Systems Experience 2011 - Present
Job Product Engineering Director at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems 2011 - Present
Azuro January 2009 - June 2011
Azuro April 2005 - January 2009
Azuro March 2003 - April 2005
Isocra, Ltd. April 2001 - February 2003
Citrix Systems July 1999 - April 2001
Cadence Design Systems September 1994 - July 1999
Argonaut Software July 1993 - September 1993
Skills
Agile Methodologies, Java, FPGA, Simulations, Static Timing Analysis, EDA, ASIC, SoC, Semiconductors, TCL, IC, Verilog, Physical Design, Software Engineering, Software Development, Product Management, Perl
Education
The University of Edinburgh 1991 — 1994
Bachelor of Science (B.Sc.), Computer Science
Cadence Design Systems 2011 - Present
Azuro January 2009 - June 2011
Azuro April 2005 - January 2009
Azuro March 2003 - April 2005
Isocra, Ltd. April 2001 - February 2003
Citrix Systems July 1999 - April 2001
Cadence Design Systems September 1994 - July 1999
Argonaut Software July 1993 - September 1993
Skills
Agile Methodologies, Java, FPGA, Simulations, Static Timing Analysis, EDA, ASIC, SoC, Semiconductors, TCL, IC, Verilog, Physical Design, Software Engineering, Software Development, Product Management, Perl
Education
The University of Edinburgh 1991 — 1994
Bachelor of Science (B.Sc.), Computer Science
Riko Radojcic's Cadence Design Systems Experience March 1996 - May 2001
Job Consultant
Industry Semiconductors
Experience
n/a October 2015 - Present
Qualcomm November 2005 - Present
DFM_r_US March 2004 - November 2005
PDF Solutions July 2001 - February 2004
Cadence Design Systems March 1996 - May 2001
Unisys March 1986 - June 1995
Burroughs, Inc. March 1981 - March 1986
Ferranti Electronics August 1979 - December 1980
Skills
Strategy, Design for Manufacturing, Start-ups, ASIC, Embedded Systems, Leadership, Product Management, Electronics, Program Management, Semiconductors, EDA, Integration, IC, Management, SoC, Business Development, Analog, Mixed Signal, Engineering, Silicon, Failure Analysis
Education
The University of Salford 1974 — 1978
PhD, Electronics
The University of Salford 1971 — 1974
BSc, Electronics
n/a October 2015 - Present
Qualcomm November 2005 - Present
DFM_r_US March 2004 - November 2005
PDF Solutions July 2001 - February 2004
Cadence Design Systems March 1996 - May 2001
Unisys March 1986 - June 1995
Burroughs, Inc. March 1981 - March 1986
Ferranti Electronics August 1979 - December 1980
Skills
Strategy, Design for Manufacturing, Start-ups, ASIC, Embedded Systems, Leadership, Product Management, Electronics, Program Management, Semiconductors, EDA, Integration, IC, Management, SoC, Business Development, Analog, Mixed Signal, Engineering, Silicon, Failure Analysis
Education
The University of Salford 1974 — 1978
PhD, Electronics
The University of Salford 1971 — 1974
BSc, Electronics
Amir Voskoboynik's Cadence Design Systems Experience May 2006 - May 2011
Job Software Engineer at Google
Industry Information Technology and Services
Experience
Cadence Design Systems May 2006 - May 2011
Magma Design Automation 2003 - 2006
Right Order May 2002 - February 2003
IBM at Haifa research lab June 1994 - July 2001
Skills
Software Engineering, Software Development, Databases, C++, Debugging, C, Algorithms, Perl, Linux, TCL
Education
Technion - Israel Institute of Technology 1988 — 1992
Cadence Design Systems May 2006 - May 2011
Magma Design Automation 2003 - 2006
Right Order May 2002 - February 2003
IBM at Haifa research lab June 1994 - July 2001
Skills
Software Engineering, Software Development, Databases, C++, Debugging, C, Algorithms, Perl, Linux, TCL
Education
Technion - Israel Institute of Technology 1988 — 1992
Edmond Macaluso's Cadence Design Systems Experience 1987 - 1997
Job Staff Engineer at Mentor Graphics
Industry Computer Software
Experience
Mentor Graphics July 2012 - Present
Z Circuit Automation 2001 - March 2013
Independent Consultant 1997 - March 2013
Cadence Design Systems 1987 - 1997
VR Information Systems 1981 - 1986
Education
Texas A&M University 1978 — 1983
BS,MS, EE
Mentor Graphics July 2012 - Present
Z Circuit Automation 2001 - March 2013
Independent Consultant 1997 - March 2013
Cadence Design Systems 1987 - 1997
VR Information Systems 1981 - 1986
Education
Texas A&M University 1978 — 1983
BS,MS, EE
Rakesh H. Patel's Cadence Design Systems Experience January 2011 - March 2011
Job Entrepreneur, Investor & Consultant
Industry Semiconductors
Experience
Very High Speed Mixed Signal Start-Up July 2012 - January 2015
GLOBALFOUNDRIES November 2009 - December 2011
Cadence Design Systems January 2011 - March 2011
Altera Corp. March 2006 - October 2009
Altera Corp. 1997 - March 2006
Philips Semiconductor (Signetics) September 1987 - February 1991
Skills
EDA, Semiconductors, Distributed Team..., Team Building, Production Planning, Leadership Development, Strategic Leadership, Engineering, Cross-functional Team..., IC, ASIC, SoC, Product Management, CMOS, Integrated Circuit..., Silicon, FPGA, SERDES, Engineering Management, R&D, Semiconductor Industry
Education
The University of Texas at Austin 1982 — 1987
BSEE and MSEE
Very High Speed Mixed Signal Start-Up July 2012 - January 2015
GLOBALFOUNDRIES November 2009 - December 2011
Cadence Design Systems January 2011 - March 2011
Altera Corp. March 2006 - October 2009
Altera Corp. 1997 - March 2006
Philips Semiconductor (Signetics) September 1987 - February 1991
Skills
EDA, Semiconductors, Distributed Team..., Team Building, Production Planning, Leadership Development, Strategic Leadership, Engineering, Cross-functional Team..., IC, ASIC, SoC, Product Management, CMOS, Integrated Circuit..., Silicon, FPGA, SERDES, Engineering Management, R&D, Semiconductor Industry
Education
The University of Texas at Austin 1982 — 1987
BSEE and MSEE
Ravi Doppalapudi's Cadence Design Systems Experience June 1997 - February 1999
Job R&D Software Engineer at Nokia
Industry Telecommunications
Warren Mull's Cadence Design Systems Experience 1992 - 1996
Job Senior Enterprise Architect at Workday
Industry Computer Software
Experience
Workday August 2014 - Present
Oracle February 2007 - August 2014
Citrix Online 2005 - 2007
MarketSoft 2002 - 2005
Kana Software 1998 - 2002
Clarify 1996 - 1998
Cadence Design Systems 1992 - 1996
Microsoft 1992 - 1992
MBA Seminars 1991 - 1992
Texas Instruments 1982 - 1991
Skills
Master Data Management, Pre-sales, SaaS, Salesforce.com, Sales, Solution Architecture, Enterprise Software, CRM, Sales Enablement, Sales Process, Professional Services, Business Alliances, Selling, Virtualization, Cloud Computing, ERP, Siebel, Business Intelligence, Integration, Solution Selling, Business Development, Business Analysis, EAI, Requirements Analysis, Telecommunications, OBIEE, Storage, Sales Engineering, Rock Climbing, Enterprise Architecture
Education
Texas A&M University 1979 — 1983
BS, Electrical Engineering
Texas A&M University 1979 — 1983
Bachelor of Science in Electrical Engineering, Electrical and Electronics Engineering
Workday August 2014 - Present
Oracle February 2007 - August 2014
Citrix Online 2005 - 2007
MarketSoft 2002 - 2005
Kana Software 1998 - 2002
Clarify 1996 - 1998
Cadence Design Systems 1992 - 1996
Microsoft 1992 - 1992
MBA Seminars 1991 - 1992
Texas Instruments 1982 - 1991
Skills
Master Data Management, Pre-sales, SaaS, Salesforce.com, Sales, Solution Architecture, Enterprise Software, CRM, Sales Enablement, Sales Process, Professional Services, Business Alliances, Selling, Virtualization, Cloud Computing, ERP, Siebel, Business Intelligence, Integration, Solution Selling, Business Development, Business Analysis, EAI, Requirements Analysis, Telecommunications, OBIEE, Storage, Sales Engineering, Rock Climbing, Enterprise Architecture
Education
Texas A&M University 1979 — 1983
BS, Electrical Engineering
Texas A&M University 1979 — 1983
Bachelor of Science in Electrical Engineering, Electrical and Electronics Engineering
Joanne Lai's Cadence Design Systems Experience October 2004 - Present
Job Finance Director at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems October 2004 - Present
KLA-Tencor May 2003 - October 2004
Novell February 2000 - May 2003
Skills
Revenue Recognition, Sarbanes-Oxley Act, Cross-functional Team..., Financial Analysis, Forecasting, Financial Modeling, Process Improvement, Program Management, Enterprise Software, SAP, Mergers and Acquisitions
Education
University of Washington, Michael G. Foster School of Business 1997 — 1999
MBA, Finance
University of Washington, Michael G. Foster School of Business 1997 — 1999
MPAcc, Master of Professional Accounting, Taxation
The University of British Columbia 1993 — 1997
BA, Economics, Honors Program
Cadence Design Systems October 2004 - Present
KLA-Tencor May 2003 - October 2004
Novell February 2000 - May 2003
Skills
Revenue Recognition, Sarbanes-Oxley Act, Cross-functional Team..., Financial Analysis, Forecasting, Financial Modeling, Process Improvement, Program Management, Enterprise Software, SAP, Mergers and Acquisitions
Education
University of Washington, Michael G. Foster School of Business 1997 — 1999
MBA, Finance
University of Washington, Michael G. Foster School of Business 1997 — 1999
MPAcc, Master of Professional Accounting, Taxation
The University of British Columbia 1993 — 1997
BA, Economics, Honors Program
Sean Lindsay's Cadence Design Systems Experience Senior EngineerGrayson Electronics
Job Lead Design Engineer at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems Senior EngineerGrayson Electronics
Allied Signal Aerospace (now Raytheon) June 1989 - June 1993
Skills
EDA, IC, SystemVerilog, Debugging, Microelectronics, RF, Perl, Spectre, Verilog
Education
The Johns Hopkins University 1990 — 1992
MSEE, Analog and RF Circuit Design
Virginia Polytechnic Institute and State University 1985 — 1989
BSEE, Electrical Engineering, Mathematics
Cadence Design Systems Senior EngineerGrayson Electronics
Allied Signal Aerospace (now Raytheon) June 1989 - June 1993
Skills
EDA, IC, SystemVerilog, Debugging, Microelectronics, RF, Perl, Spectre, Verilog
Education
The Johns Hopkins University 1990 — 1992
MSEE, Analog and RF Circuit Design
Virginia Polytechnic Institute and State University 1985 — 1989
BSEE, Electrical Engineering, Mathematics
Andy Mauffet-Smith's Cadence Design Systems Experience July 2011 - Present
Job Architect at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems July 2011 - Present
Philips Semiconductors 1989 - 1997
Skills
EDA, TCL, ASIC, Verilog, Debugging, VHDL, Perl, Simulations, C++, C, Linux, Program Management, SystemVerilog, Python, Specman, FPGA, Testing, Functional Verification, Emulation, Semiconductors, Electronics, SoC
Education
The University of Salford 1984 — 1987
B.Eng, Electronic Computer Systems
Cadence Design Systems July 2011 - Present
Philips Semiconductors 1989 - 1997
Skills
EDA, TCL, ASIC, Verilog, Debugging, VHDL, Perl, Simulations, C++, C, Linux, Program Management, SystemVerilog, Python, Specman, FPGA, Testing, Functional Verification, Emulation, Semiconductors, Electronics, SoC
Education
The University of Salford 1984 — 1987
B.Eng, Electronic Computer Systems
Rajagopal Vijayaraghavan's Cadence Design Systems Experience January 2007 - Present
Job Principal Design Engineer at Cadence Design Systems
Industry Electrical/Electronic Manufacturing
Experience
Cadence Design Systems January 2007 - Present
Skills
Analog Circuit Design, Mixed Signal
Education
University of Tennessee-Knoxville 2003 — 2007
Ph.D, EE
The University of Texas at Dallas 1999 — 2001
M.S, Electrical Engg
SVCE 1994 — 1998
B.E, Electrical, Electronics and Communications Engineering
Cadence Design Systems January 2007 - Present
Skills
Analog Circuit Design, Mixed Signal
Education
University of Tennessee-Knoxville 2003 — 2007
Ph.D, EE
The University of Texas at Dallas 1999 — 2001
M.S, Electrical Engg
SVCE 1994 — 1998
B.E, Electrical, Electronics and Communications Engineering
Hayward Cho's Cadence Design Systems Experience 1999 - 2000
Job Senior Firmware Engineer at Netgear
Industry Telecommunications
Experience
Netgear March 2013 - Present
Sierra Wireless September 2012 - March 2013
Nokia 2008 - September 2012
Nokia Products Canada 2003 - 2008
Broadcom 2000 - 2003
Scout Electromedia June 2000 - November 2000
Cadence Design Systems 1999 - 2000
Metricom 1994 - 2000
Motorola 1989 - 1994
RMS Industrial Controls 1987 - 1989
Skills
DSP, Software Development, Symbian, Adaptation, Firmware, Embedded Systems, RTOS, S60, ARM, Embedded Software, Device Drivers, Software Design, Software Engineering, Symbian C++, Windows Mobile, Signal Processing, Qt, HTML5, Qt/QML, Javascript, Java, Scheme, Mobile Client Software..., AJAX
Education
The University of British Columbia 1982 — 1987
B.A.Sc., Electrical Engineering
Netgear March 2013 - Present
Sierra Wireless September 2012 - March 2013
Nokia 2008 - September 2012
Nokia Products Canada 2003 - 2008
Broadcom 2000 - 2003
Scout Electromedia June 2000 - November 2000
Cadence Design Systems 1999 - 2000
Metricom 1994 - 2000
Motorola 1989 - 1994
RMS Industrial Controls 1987 - 1989
Skills
DSP, Software Development, Symbian, Adaptation, Firmware, Embedded Systems, RTOS, S60, ARM, Embedded Software, Device Drivers, Software Design, Software Engineering, Symbian C++, Windows Mobile, Signal Processing, Qt, HTML5, Qt/QML, Javascript, Java, Scheme, Mobile Client Software..., AJAX
Education
The University of British Columbia 1982 — 1987
B.A.Sc., Electrical Engineering
Sina Barkeshli's Cadence Design Systems Experience 1996 - 2002
Job Senior Engineering Consultant at Adaptive Spectrum and Signal Alignment ASSIA Inc. Redwood City, CA
Industry Semiconductors
Experience
Adaptive Spectrum and Signal Alignment- ASSIA Inc. Redwood City, CA 2009 - Present
Ikanos Communications 2006 - 2009
Opelcomm Inc. 2002 - 2006
Cadence Design Systems 1996 - 2002
Space Systems Loral 1992 - 1996
Education
The Ohio State University 1982 — 1988
Ph.D.
The University of Kansas 1980 — 1982
MSEE
Adaptive Spectrum and Signal Alignment- ASSIA Inc. Redwood City, CA 2009 - Present
Ikanos Communications 2006 - 2009
Opelcomm Inc. 2002 - 2006
Cadence Design Systems 1996 - 2002
Space Systems Loral 1992 - 1996
Education
The Ohio State University 1982 — 1988
Ph.D.
The University of Kansas 1980 — 1982
MSEE
Oliver Meisel's Cadence Design Systems Experience January 2004 - October 2009
Job ASIC Design Consultant
Industry Semiconductors
Experience
Qualcomm November 2011 - Present
Western Digital January 2010 - April 2011
Cadence Design Systems January 2004 - October 2009
Synopsys September 1999 - January 2004
VLSI Technology GmbH, Munich, Germany April 1997 - August 1999
MAZ Brandenburg, Germany June 1996 - March 1997
Skills
ASIC, EDA, TCL, Static Timing Analysis, SoC, Verilog, Timing Closure, Integrated Circuit..., Semiconductors, Physical Design, VHDL, Mixed Signal, CMOS, Low-power Design, IC, RTL design, Hardware Architecture, Primetime, Digital Signal..., Cadence, Simulations, Floorplanning, Logic Synthesis, Timing, Functional Verification, SystemVerilog, VLSI, Processors, ModelSim, RTL Design
Education
Technische Universität Berlin 1990 — 1997
MSEE, Electrical Engineering
Qualcomm November 2011 - Present
Western Digital January 2010 - April 2011
Cadence Design Systems January 2004 - October 2009
Synopsys September 1999 - January 2004
VLSI Technology GmbH, Munich, Germany April 1997 - August 1999
MAZ Brandenburg, Germany June 1996 - March 1997
Skills
ASIC, EDA, TCL, Static Timing Analysis, SoC, Verilog, Timing Closure, Integrated Circuit..., Semiconductors, Physical Design, VHDL, Mixed Signal, CMOS, Low-power Design, IC, RTL design, Hardware Architecture, Primetime, Digital Signal..., Cadence, Simulations, Floorplanning, Logic Synthesis, Timing, Functional Verification, SystemVerilog, VLSI, Processors, ModelSim, RTL Design
Education
Technische Universität Berlin 1990 — 1997
MSEE, Electrical Engineering
Perry Luoni's Cadence Design Systems Experience Design EngineerMCNC1995 - 1996
Job Staff Design Engineer at Cadence Design Systems
Industry Computer Hardware
Experience
Cadence Design Systems Design EngineerMCNC1995 - 1996
Harris Corporation 1990 - 1995
General Electric 1988 - 1990
Siemens AG 1985 - 1987
Mostek (SGS Thompson) 1983 - 1985
Education
The University of Texas at Dallas 1984 — 1985
Computer Science
Texas A&M University 1982 — 1983
MSEE, Electronic Engineering
West Virginia University Institute of Technology 1978 — 1982
BSEE, Electronic Engineering
Cadence Design Systems Design EngineerMCNC1995 - 1996
Harris Corporation 1990 - 1995
General Electric 1988 - 1990
Siemens AG 1985 - 1987
Mostek (SGS Thompson) 1983 - 1985
Education
The University of Texas at Dallas 1984 — 1985
Computer Science
Texas A&M University 1982 — 1983
MSEE, Electronic Engineering
West Virginia University Institute of Technology 1978 — 1982
BSEE, Electronic Engineering
Sandeep Jangra's Cadence Design Systems Experience January 2004 - June 2004
Job Senior Software Engineer @WalmartLabs
Industry Computer Software
Experience
Walmart eCommerce June 2014 - Present
eBay Inc March 2014 - June 2014
eBay Inc May 2013 - March 2014
NetApp August 2011 - May 2013
University of Massachusetts Dartmouth August 2009 - May 2010
Aricent July 2005 - July 2009
Cadence Design Systems January 2004 - June 2004
Skills
Java, Unix, Algorithms, Hibernate, MySQL, Data Structures, Agile Methodologies, Distributed Systems, Java Enterprise Edition, Relational Databases, Search Engine, Maven, J2EE Application..., J2EE Web Services, Object Oriented Design, Lucene, RESTful WebServices, SpringSource, SoapUI, Apache Pig, Avro, Solr
Education
University of Massachusetts Dartmouth 2009 — 2011
Masters, Computer Engineering, GPA 3.90
Thapar Institute of Engineering and Technology 2001 — 2005
BE, Computer Engineering
Walmart eCommerce June 2014 - Present
eBay Inc March 2014 - June 2014
eBay Inc May 2013 - March 2014
NetApp August 2011 - May 2013
University of Massachusetts Dartmouth August 2009 - May 2010
Aricent July 2005 - July 2009
Cadence Design Systems January 2004 - June 2004
Skills
Java, Unix, Algorithms, Hibernate, MySQL, Data Structures, Agile Methodologies, Distributed Systems, Java Enterprise Edition, Relational Databases, Search Engine, Maven, J2EE Application..., J2EE Web Services, Object Oriented Design, Lucene, RESTful WebServices, SpringSource, SoapUI, Apache Pig, Avro, Solr
Education
University of Massachusetts Dartmouth 2009 — 2011
Masters, Computer Engineering, GPA 3.90
Thapar Institute of Engineering and Technology 2001 — 2005
BE, Computer Engineering
Brandon Fagan's Cadence Design Systems Experience 1999 - 2003
Job Senior MTS, CAD Engineering at MediaTek
Industry Semiconductors
Experience
MediaTek November 2012 - Present
Advanced Micro Devices August 2010 - October 2012
(self employed) November 2009 - June 2010
Freescale Semiconductor 2005 - June 2009
Silicon Canvas 2003 - 2005
Cadence Design Systems 1999 - 2003
Motorola 1997 - 2000
AMD 1993 - 1997
Skills
Physical Design, Floorplanning, Signal Integrity, Clock Tree Synthesis, Physical Verification, TCL, Low Power Design, Static Timing Analysis, EDA, Perl, Cadence Virtuoso, C, Timing Closure, DRC, LVS, Low-power Design, CAD, Semiconductors, SoC, Logic Synthesis, Processors, Cadence, Primetime, Silicon, Verilog, ASIC, VLSI, IC, CMOS
Education
The University of Texas at Austin 1988 — 1991
Computer Science
Bachelor's Degree
MediaTek November 2012 - Present
Advanced Micro Devices August 2010 - October 2012
(self employed) November 2009 - June 2010
Freescale Semiconductor 2005 - June 2009
Silicon Canvas 2003 - 2005
Cadence Design Systems 1999 - 2003
Motorola 1997 - 2000
AMD 1993 - 1997
Skills
Physical Design, Floorplanning, Signal Integrity, Clock Tree Synthesis, Physical Verification, TCL, Low Power Design, Static Timing Analysis, EDA, Perl, Cadence Virtuoso, C, Timing Closure, DRC, LVS, Low-power Design, CAD, Semiconductors, SoC, Logic Synthesis, Processors, Cadence, Primetime, Silicon, Verilog, ASIC, VLSI, IC, CMOS
Education
The University of Texas at Austin 1988 — 1991
Computer Science
Bachelor's Degree
Ningyu Shi's Cadence Design Systems Experience March 2013 - Present
Job Member of Consulting Staff at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems March 2013 - Present
Synopsys April 2012 - March 2013
Magma Design Automation April 2010 - June 2012
Skills
EDA, C/C++ STL, Linux, Python, Tcl-Tk, C, C++, CMOS, Algorithms, Debugging, Perl, Simulations, TCL
Education
The University of Texas at Austin 2008 — 2010
Phd Candidate, Electrical Engineering
The University of Texas at Austin 2006 — 2008
MS, Electrical Engineering
The University of Texas at Austin 2005 — 2006
Physics
University of Science and Technology of China 2001 — 2005
BS, Physics
Hefei No. 1 High School 1998 — 2001
Cadence Design Systems March 2013 - Present
Synopsys April 2012 - March 2013
Magma Design Automation April 2010 - June 2012
Skills
EDA, C/C++ STL, Linux, Python, Tcl-Tk, C, C++, CMOS, Algorithms, Debugging, Perl, Simulations, TCL
Education
The University of Texas at Austin 2008 — 2010
Phd Candidate, Electrical Engineering
The University of Texas at Austin 2006 — 2008
MS, Electrical Engineering
The University of Texas at Austin 2005 — 2006
Physics
University of Science and Technology of China 2001 — 2005
BS, Physics
Hefei No. 1 High School 1998 — 2001
James Billups's Cadence Design Systems Experience
Job R&D Product Expert at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems
Skills
EDA, Physical Design, Integrated Circuit..., Cadence, SoC, ASIC, TCL, Semiconductors, IC, Static Timing Analysis, Perl, ARM, EDI, 14nm, 20nm, 10nm, Floorplanning, NanoRoute, Astrophysics, philosophy, LEF, DPT, methodology, VLSI, Mixed Signal, Silicon, Strategy
Education
The University of Texas at Arlington
BS, Physics, Mathematics
Cadence Design Systems
Skills
EDA, Physical Design, Integrated Circuit..., Cadence, SoC, ASIC, TCL, Semiconductors, IC, Static Timing Analysis, Perl, ARM, EDI, 14nm, 20nm, 10nm, Floorplanning, NanoRoute, Astrophysics, philosophy, LEF, DPT, methodology, VLSI, Mixed Signal, Silicon, Strategy
Education
The University of Texas at Arlington
BS, Physics, Mathematics
Danita Mitchell, PMP's Cadence Design Systems Experience 1996 - 2001
Job Radar Systems Engineering Manager Surveillance Systems
Industry Defense & Space
Experience
Northrop Grumman Corporation 2012 - Present
Northrop Grumman Corporation 2006 - 2012
Northrop Grumman Corporation 2003 - 2006
Northrop Grumman Corporation 2001 - 2003
Cadence Design Systems 1996 - 2001
Education
The Johns Hopkins University
Master of Science (MS), Computer Science
The Johns Hopkins University
Master of Science (MS), Electrical Engineering
The Johns Hopkins University
Bachelor of Engineering Science (BES), Electrical Engineering
Northrop Grumman Corporation 2012 - Present
Northrop Grumman Corporation 2006 - 2012
Northrop Grumman Corporation 2003 - 2006
Northrop Grumman Corporation 2001 - 2003
Cadence Design Systems 1996 - 2001
Education
The Johns Hopkins University
Master of Science (MS), Computer Science
The Johns Hopkins University
Master of Science (MS), Electrical Engineering
The Johns Hopkins University
Bachelor of Engineering Science (BES), Electrical Engineering
Christian Szegedy's Cadence Design Systems Experience 2005 - 2010
Job Senior Research Scientist at Google
Industry Computer Software
Experience
Google February 2015 - Present
Google December 2010 - February 2015
Cadence Design Systems 2005 - 2010
University of Bonn 1998 - 2005
Skills
Machine Learning, Algorithms, Artificial Intelligence, Computer Vision, Software Engineering, Parallel Computing, C++, MapReduce, Python, Simulations, Mathematics, EDA, Physical Design, Scala, Convex Optimization, Optimization, LaTeX, Pattern Recognition, Data Mining, Image Processing, Mathematical Programming, Algorithm Design, Matlab, Artificial Neural..., High Performance..., Distributed Systems, Computer Science, C/C++ STL, Discrete Mathematics, Discrete Optimization, Algorithm Development, VLSI CAD, R, Numerical Analysis, Hadoop, Natural Language..., Data Structures, Big Data, Scalability, Computer Architecture, Ruby, Distributed Algorithms, Nonlinear Optimization, OCaml, Information Retrieval, C, Linux, Programming, Software Development
Education
Rheinische Friedrich-Wilhelms-Universität Bonn / University of Bonn 1998 — 2005
Doctor of Philosophy (Ph.D.), Applied Mathematics
Rheinische Friedrich-Wilhelms-Universität Bonn / University of Bonn 1994 — 1998
Master’s Degree, Mathematics
Eötvös Loránd Tudományegyetem 1990 — 1992
Mathematics and Computer Science
Fazekas Mihaly Fov Gyak Gimn. 1986 — 1990
High School
Google February 2015 - Present
Google December 2010 - February 2015
Cadence Design Systems 2005 - 2010
University of Bonn 1998 - 2005
Skills
Machine Learning, Algorithms, Artificial Intelligence, Computer Vision, Software Engineering, Parallel Computing, C++, MapReduce, Python, Simulations, Mathematics, EDA, Physical Design, Scala, Convex Optimization, Optimization, LaTeX, Pattern Recognition, Data Mining, Image Processing, Mathematical Programming, Algorithm Design, Matlab, Artificial Neural..., High Performance..., Distributed Systems, Computer Science, C/C++ STL, Discrete Mathematics, Discrete Optimization, Algorithm Development, VLSI CAD, R, Numerical Analysis, Hadoop, Natural Language..., Data Structures, Big Data, Scalability, Computer Architecture, Ruby, Distributed Algorithms, Nonlinear Optimization, OCaml, Information Retrieval, C, Linux, Programming, Software Development
Education
Rheinische Friedrich-Wilhelms-Universität Bonn / University of Bonn 1998 — 2005
Doctor of Philosophy (Ph.D.), Applied Mathematics
Rheinische Friedrich-Wilhelms-Universität Bonn / University of Bonn 1994 — 1998
Master’s Degree, Mathematics
Eötvös Loránd Tudományegyetem 1990 — 1992
Mathematics and Computer Science
Fazekas Mihaly Fov Gyak Gimn. 1986 — 1990
High School
Patrick Santavenere's Cadence Design Systems Experience March 2013 - Present
Job Principal Application Engineer at Cadence
Industry Semiconductors
Experience
Cadence Design Systems March 2013 - Present
Atmel June 2008 - July 2012
Synopsys 1998 - 2006
Atmel Corporation January 1992 - October 1998
Westinghouse Electric Company 1985 - 1991
Skills
Front-end hardware..., Verilog RTL, Static Timing Analysis, Logic Synthesis, Formal Verification, Gate-leve and RTL..., Design-For-Test, ATPG, Customer Support, EDA, Applications Engineer, Electrical Engineering, Digital Circuit Design, Verilog, Front-end, Simulations, ASIC, TCL, RTL, Testing, Primetime, Hardware Architecture, ARM
Education
The Johns Hopkins University
MS, Electrical Engineering
The Johns Hopkins University
BSEE, Electrical Engineering
Cadence Design Systems March 2013 - Present
Atmel June 2008 - July 2012
Synopsys 1998 - 2006
Atmel Corporation January 1992 - October 1998
Westinghouse Electric Company 1985 - 1991
Skills
Front-end hardware..., Verilog RTL, Static Timing Analysis, Logic Synthesis, Formal Verification, Gate-leve and RTL..., Design-For-Test, ATPG, Customer Support, EDA, Applications Engineer, Electrical Engineering, Digital Circuit Design, Verilog, Front-end, Simulations, ASIC, TCL, RTL, Testing, Primetime, Hardware Architecture, ARM
Education
The Johns Hopkins University
MS, Electrical Engineering
The Johns Hopkins University
BSEE, Electrical Engineering
Jim Swanson's Cadence Design Systems Experience July 2001 - September 2002
Job VP Finance Strategic & Financial Planning
Industry Consumer Goods
Experience
Columbia Sportswear May 2015 - Present
Columbia Sportswear January 2009 - May 2015
Columbia Sportswear January 2005 - December 2008
Columbia Sportswear April 2003 - December 2004
Freightliner Corporation September 2002 - April 2003
Cadence Design Systems July 2001 - September 2002
Arthur Andersen & Co. July 1997 - July 2001
Skills
Budgets, Business Analysis, Business Intelligence, Cross-functional Team..., Financial Analysis, Leadership, Forecasting, Management, Process Improvement, Retail, SAP, Strategic Planning, Strategy
Education
The University of Montana - School of Business Administration 1996 — 1997
Master's, Accounting
The University of Montana - School of Business Administration 1992 — 1996
Bachelor of Science, Accounting and Finance
Columbia Sportswear May 2015 - Present
Columbia Sportswear January 2009 - May 2015
Columbia Sportswear January 2005 - December 2008
Columbia Sportswear April 2003 - December 2004
Freightliner Corporation September 2002 - April 2003
Cadence Design Systems July 2001 - September 2002
Arthur Andersen & Co. July 1997 - July 2001
Skills
Budgets, Business Analysis, Business Intelligence, Cross-functional Team..., Financial Analysis, Leadership, Forecasting, Management, Process Improvement, Retail, SAP, Strategic Planning, Strategy
Education
The University of Montana - School of Business Administration 1996 — 1997
Master's, Accounting
The University of Montana - School of Business Administration 1992 — 1996
Bachelor of Science, Accounting and Finance
Joe Ozorkiewicz's Cadence Design Systems Experience 1993 - 1999
Job Systems Engineer at Raytheon
Industry Defense & Space
Experience
Raytheon August 2010 - Present
Raytheon November 2007 - August 2010
Cadence Design Systems 1993 - 1999
Skills
Security Clearance, DoD, Earned Value Management, Systems Engineering, Defense, Governance, C4ISR, Software Development, Information Assurance, Requirements Management, Program Management, Engineering Management, Configuration Management, Electronic Warfare, System Architecture, Military, System Design, Space Systems, Integration
Education
University of Kansas 1982 — 1990
Bachelor's and Master's degrees, Electrical and Computer Engineering
Raytheon August 2010 - Present
Raytheon November 2007 - August 2010
Cadence Design Systems 1993 - 1999
Skills
Security Clearance, DoD, Earned Value Management, Systems Engineering, Defense, Governance, C4ISR, Software Development, Information Assurance, Requirements Management, Program Management, Engineering Management, Configuration Management, Electronic Warfare, System Architecture, Military, System Design, Space Systems, Integration
Education
University of Kansas 1982 — 1990
Bachelor's and Master's degrees, Electrical and Computer Engineering
Jim Head, PMP's Cadence Design Systems Experience November 1999 - January 2010
Job Analog IC Design Engineer at West Valley Staffing Group
Industry Semiconductors
Experience
West Valley Staffing Group September 2010 - Present
Cadence Design Systems November 1999 - January 2010
National Semiconductor July 1996 - November 1999
Westinghouse Electric Company April 1983 - July 1996
Education
The Johns Hopkins University 1996 — 2001
MSEE, Solid State Engineering
The Johns Hopkins University 1985 — 1990
BSEE, Electrical Engineering
West Valley Staffing Group September 2010 - Present
Cadence Design Systems November 1999 - January 2010
National Semiconductor July 1996 - November 1999
Westinghouse Electric Company April 1983 - July 1996
Education
The Johns Hopkins University 1996 — 2001
MSEE, Solid State Engineering
The Johns Hopkins University 1985 — 1990
BSEE, Electrical Engineering
Kevin Fugate's Cadence Design Systems Experience 1998 - 2003
Job Technical Lead ASIC Design at Kionix, Inc.
Industry Semiconductors
Experience
Kionix, Inc. March 2013 - Present
Freescale Semiconductor 2003 - December 2012
Cadence Design Systems 1998 - 2003
Advanced Microelectronics 1995 - 1998
Skills
CMOS, Semiconductors, Mixed Signal, IC, ASIC, EDA, Verilog, SystemVerilog, Integrated Circuit..., Cadence Virtuoso, Power Management, SoC, Analog Circuit Design, DFT, Analog, Physical Design, VLSI, Magnetometer, Accelerometer, Low-power Design, Circuit Design, Functional Verification, Spectre, MEMS, Verilog-A, Cadence, BiCMOS, RTL design, SPICE, DRC, Mixed-Signal IC Design, Microelectronics, Static Timing Analysis, Silicon, LVS, Physical Verification, PLL
Education
Tennessee Technological University 1991 — 1994
Bachelor of Science (BS), Electrical and Electronics Engineering
University of Mississippi
Master of Science (MS), Electrical and Electronics Engineering
Kionix, Inc. March 2013 - Present
Freescale Semiconductor 2003 - December 2012
Cadence Design Systems 1998 - 2003
Advanced Microelectronics 1995 - 1998
Skills
CMOS, Semiconductors, Mixed Signal, IC, ASIC, EDA, Verilog, SystemVerilog, Integrated Circuit..., Cadence Virtuoso, Power Management, SoC, Analog Circuit Design, DFT, Analog, Physical Design, VLSI, Magnetometer, Accelerometer, Low-power Design, Circuit Design, Functional Verification, Spectre, MEMS, Verilog-A, Cadence, BiCMOS, RTL design, SPICE, DRC, Mixed-Signal IC Design, Microelectronics, Static Timing Analysis, Silicon, LVS, Physical Verification, PLL
Education
Tennessee Technological University 1991 — 1994
Bachelor of Science (BS), Electrical and Electronics Engineering
University of Mississippi
Master of Science (MS), Electrical and Electronics Engineering
Johnathan Dear's Cadence Design Systems Experience January 1995 - February 2000
Job Senior Layout Designer at Intersil
Industry Semiconductors
Experience
Intersil January 2012 - Present
Semtech February 2000 - January 2012
Cadence Design Systems January 1995 - February 2000
Army National Guard January 1989 - February 1996
Skills
Mixed Signal, DRC, Layout, Power Management, LVS, Floorplanning, Troubleshooting, Routers, Analog, Physical Verification, IC, BiCMOS
Education
The University of Southern Mississippi 1990 — 1995
BS, Electrical Engineering Tech.
Intersil January 2012 - Present
Semtech February 2000 - January 2012
Cadence Design Systems January 1995 - February 2000
Army National Guard January 1989 - February 1996
Skills
Mixed Signal, DRC, Layout, Power Management, LVS, Floorplanning, Troubleshooting, Routers, Analog, Physical Verification, IC, BiCMOS
Education
The University of Southern Mississippi 1990 — 1995
BS, Electrical Engineering Tech.
Scott Buchanan's Cadence Design Systems Experience July 2014 - Present
Job Application Engineer for ElectroMigration and IR Drop
Industry Semiconductors
Experience
Cadence Design Systems July 2014 - Present
Intel Corporation February 2012 - July 2014
ST Microelectronics 2007 - 2012
Texas Instruments 2004 - 2007
Freescale Semiconductor 2002 - 2004
Motorola 2000 - 2002
Motorola 1999 - 2000
Skills
Timing Closure, Physical Design, Static Timing Analysis, ASIC, Verilog, Cadence, Digital Signal..., Functional Verification, IC, Logic Synthesis, Perl, Physical Verification, SoC, Timing, RTL design, RTL Design
Education
Tennessee Technological University 1997 — 1999
Master of Science, Electrical Engineer
Tennessee State University 1992 — 1997
Bachelor of Science, Electrical Engineer
Cadence Design Systems July 2014 - Present
Intel Corporation February 2012 - July 2014
ST Microelectronics 2007 - 2012
Texas Instruments 2004 - 2007
Freescale Semiconductor 2002 - 2004
Motorola 2000 - 2002
Motorola 1999 - 2000
Skills
Timing Closure, Physical Design, Static Timing Analysis, ASIC, Verilog, Cadence, Digital Signal..., Functional Verification, IC, Logic Synthesis, Perl, Physical Verification, SoC, Timing, RTL design, RTL Design
Education
Tennessee Technological University 1997 — 1999
Master of Science, Electrical Engineer
Tennessee State University 1992 — 1997
Bachelor of Science, Electrical Engineer
Jagmohan Singh's Cadence Design Systems Experience August 2013 - Present
Job Software Engineer
Industry Computer Software
Experience
Cadence Design Systems August 2013 - Present
The University of Texas at Austin August 2011 - August 2013
The University of Texas at Austin January 2013 - May 2013
The University of Texas at Austin August 2012 - December 2012
AMD May 2012 - August 2012
The University of Texas at Austin January 2012 - May 2012
STMicroelectronics July 2008 - August 2011
STMicroelectronics June 2006 - July 2008
Motorola February 2005 - July 2005
Skills
Algorithms, EDA, C++, Data Structures, Programming, Java, Discrete Optimization, Multithreaded...
Education
The University of Texas at Austin 2011 — 2013
Master’s Degree, Electrical and Computer Engineering, 3.9175
National Institute of Technology Jalandhar 2002 — 2006
Bachelor’s Degree, Electronics and Communication Engineering
Cadence Design Systems August 2013 - Present
The University of Texas at Austin August 2011 - August 2013
The University of Texas at Austin January 2013 - May 2013
The University of Texas at Austin August 2012 - December 2012
AMD May 2012 - August 2012
The University of Texas at Austin January 2012 - May 2012
STMicroelectronics July 2008 - August 2011
STMicroelectronics June 2006 - July 2008
Motorola February 2005 - July 2005
Skills
Algorithms, EDA, C++, Data Structures, Programming, Java, Discrete Optimization, Multithreaded...
Education
The University of Texas at Austin 2011 — 2013
Master’s Degree, Electrical and Computer Engineering, 3.9175
National Institute of Technology Jalandhar 2002 — 2006
Bachelor’s Degree, Electronics and Communication Engineering
Adrian Lao's Cadence Design Systems Experience April 2013 - Present
Job Architect at Cadence Design Systems
Industry Semiconductors
Experience
Cadence Design Systems April 2013 - Present
Freescale Semiconductor 2004 - March 2013
Motorola Mobility October 1990 - 2004
Microelectronics and Computer Technology Inc. January 1990 - September 1990
Microelectronics and Computer Technology Inc. September 1989 - December 1989
Motorola Mobility June 1989 - August 1989
Skills
X11, C, Tcl-Tk, Perl, MySQL, Motif, GTK+, Interprocess..., Infrastructure, C++, TCL, Semiconductors, SoC, Debugging
Education
The University of Texas at Austin 1987 — 1989
Master of Science (MS), Electrical and Computer Engineering
The University of Texas at Austin 1983 — 1987
Bachelor of Science (BS), Electrical and Computer Engineering
Cadence Design Systems April 2013 - Present
Freescale Semiconductor 2004 - March 2013
Motorola Mobility October 1990 - 2004
Microelectronics and Computer Technology Inc. January 1990 - September 1990
Microelectronics and Computer Technology Inc. September 1989 - December 1989
Motorola Mobility June 1989 - August 1989
Skills
X11, C, Tcl-Tk, Perl, MySQL, Motif, GTK+, Interprocess..., Infrastructure, C++, TCL, Semiconductors, SoC, Debugging
Education
The University of Texas at Austin 1987 — 1989
Master of Science (MS), Electrical and Computer Engineering
The University of Texas at Austin 1983 — 1987
Bachelor of Science (BS), Electrical and Computer Engineering
Thomas Breaux's Cadence Design Systems Experience November 1996 - October 2003
Job Electrical Engineering Technologist at Taylor Power Systems
Industry Electrical/Electronic Manufacturing
Experience
Taylor Power Systems October 2013 - Present
Texas Instruments October 2005 - September 2013
Freescale Semiconductor October 2003 - September 2005
Cadence Design Systems November 1996 - October 2003
Advanced Microelectronics May 1995 - October 1996
Skills
LVS, DRC, Physical Verification, Floorplanning, Hercules, Physical Design, BiCMOS, Mixed Signal, Cadence Virtuoso, CMOS, IC, Analog, Power Management, EDA, ASIC
Education
University of Southern Mississippi 1991 — 1994
Bachelor of Science, Electronics Engineering Technology
Taylor Power Systems October 2013 - Present
Texas Instruments October 2005 - September 2013
Freescale Semiconductor October 2003 - September 2005
Cadence Design Systems November 1996 - October 2003
Advanced Microelectronics May 1995 - October 1996
Skills
LVS, DRC, Physical Verification, Floorplanning, Hercules, Physical Design, BiCMOS, Mixed Signal, Cadence Virtuoso, CMOS, IC, Analog, Power Management, EDA, ASIC
Education
University of Southern Mississippi 1991 — 1994
Bachelor of Science, Electronics Engineering Technology
Josina Joy's Cadence Design Systems Experience June 2013 - July 2013
Job Student at University of Texas at Dallas
Industry Computer Software
Experience
SAP Labs June 2014 - July 2015
Cadence Design Systems June 2013 - July 2013
Skills
C, Java, JavaScript, C++, HTML, Python, Linux, MySQL, CSS, Eclipse, HTML5, JSON, R
Education
The University of Texas at Dallas 2015 — 2017
Master's in Computer Science, Data Science
Government Engineering Colege, Thrissur 2010 — 2014
Bachelor of Technology (B.Tech.), Computer Science
St. Paul's School 1996 — 2010
SAP Labs June 2014 - July 2015
Cadence Design Systems June 2013 - July 2013
Skills
C, Java, JavaScript, C++, HTML, Python, Linux, MySQL, CSS, Eclipse, HTML5, JSON, R
Education
The University of Texas at Dallas 2015 — 2017
Master's in Computer Science, Data Science
Government Engineering Colege, Thrissur 2010 — 2014
Bachelor of Technology (B.Tech.), Computer Science
St. Paul's School 1996 — 2010
Richard Deken's Cadence Design Systems Experience 1999 - 2003
Job Director, ASIC design at Kionix, Inc.
Industry Semiconductors
Experience
Kionix, Inc. February 2013 - Present
Freescale Semiconductor October 2003 - December 2012
Cadence Design Systems 1999 - 2003
Advanced Microelectronics 1995 - 1999
Skills
IC, CMOS, Semiconductors, ASIC, Mixed Signal, RTL design, Analog, Physical Design, Static Timing Analysis, SystemVerilog, Analog Circuit Design, DFT, Verilog, SystemC, Digital Signal..., Hardware Architecture, RTL coding, Silicon, Debugging, PLL, BiCMOS, Semiconductor Industry, Timing Closure, FPGA, Integrated Circuit..., SERDES, Microprocessors, Circuit Design, Formal Verification, Logic Design, Functional Verification, Cadence, Sensors, Microelectronics, Spectre, Verilog-A, Power Management, MEMS, EDA, Low-power Design, SPICE, VLSI, Product Engineering, Cadence Virtuoso, TCL, PCB design, DRC, Mixed-Signal IC Design, Simulations, Failure Analysis
Education
University of Mississippi 1996 — 1999
Tennessee Technological University 1985 — 1995
Bachelor's degree, Electrical and Electronics Engineering
Kionix, Inc. February 2013 - Present
Freescale Semiconductor October 2003 - December 2012
Cadence Design Systems 1999 - 2003
Advanced Microelectronics 1995 - 1999
Skills
IC, CMOS, Semiconductors, ASIC, Mixed Signal, RTL design, Analog, Physical Design, Static Timing Analysis, SystemVerilog, Analog Circuit Design, DFT, Verilog, SystemC, Digital Signal..., Hardware Architecture, RTL coding, Silicon, Debugging, PLL, BiCMOS, Semiconductor Industry, Timing Closure, FPGA, Integrated Circuit..., SERDES, Microprocessors, Circuit Design, Formal Verification, Logic Design, Functional Verification, Cadence, Sensors, Microelectronics, Spectre, Verilog-A, Power Management, MEMS, EDA, Low-power Design, SPICE, VLSI, Product Engineering, Cadence Virtuoso, TCL, PCB design, DRC, Mixed-Signal IC Design, Simulations, Failure Analysis
Education
University of Mississippi 1996 — 1999
Tennessee Technological University 1985 — 1995
Bachelor's degree, Electrical and Electronics Engineering
Yamuna Jathavedan's Cadence Design Systems Experience March 2014 - Present
Job Member of Technical Staff at Cadence Design Systems
Industry Computer Software
Experience
Cadence Design Systems March 2014 - Present
Infosys January 2009 - January 2011
Skills
Java, Algorithms, Eclipse, Hadoop, Hive, Cassandra, Apache Pig, Microsoft SQL Server, C#, Oracle, Mahout, Big Data, Python, Data Warehousing, OLAP, OLAP Cube Studio, SAS, ETL Tools, ETL, Business Intelligence, MySQL, Oracle SQL Developer, SQL Server Management..., OpenCV, Github, .NET, ASP.NET, ADO.NET, HTML
Education
The University of Texas at Dallas 2012 — 2013
Master of Science (MS), Computer Science
Amrita Vishwa Vidyapeetham 2005 — 2009
Bachelor of Technology (B.Tech.), Computer Science
Cadence Design Systems March 2014 - Present
Infosys January 2009 - January 2011
Skills
Java, Algorithms, Eclipse, Hadoop, Hive, Cassandra, Apache Pig, Microsoft SQL Server, C#, Oracle, Mahout, Big Data, Python, Data Warehousing, OLAP, OLAP Cube Studio, SAS, ETL Tools, ETL, Business Intelligence, MySQL, Oracle SQL Developer, SQL Server Management..., OpenCV, Github, .NET, ASP.NET, ADO.NET, HTML
Education
The University of Texas at Dallas 2012 — 2013
Master of Science (MS), Computer Science
Amrita Vishwa Vidyapeetham 2005 — 2009
Bachelor of Technology (B.Tech.), Computer Science
Robert Fooshee''s Cadence Design Systems Experience November 1999 - January 2001
Job Principal at Kayjay Co.
Industry Internet
Experience
Self-employed April 2002 - Present
Kayjay Co. 2002 - Present
Cadence Design Systems November 1999 - January 2001
Skills
Software Development
Education
The University of Texas at Austin 1963 — 1967
Bachelor's degree, Electrical and Electronics Engineering
Self-employed April 2002 - Present
Kayjay Co. 2002 - Present
Cadence Design Systems November 1999 - January 2001
Skills
Software Development
Education
The University of Texas at Austin 1963 — 1967
Bachelor's degree, Electrical and Electronics Engineering
Di Gao's Cadence Design Systems Experience May 2015 - Present
Job MS in Computer Engineering
Industry Computer Software
Experience
Cadence Design Systems May 2015 - Present
Skills
Simulation, EDA tool development, C/C++, Sparse Linear System, Numerical Methods, Matrix Solver, VLSI, Computer Aided Design, IC design, Power Electronics, Python, Behavioral Modeling, Matlab, Microsoft Office
Education
Texas A&M University 2013 — 2015
Master's Degree, Electrical and Computer Engineering, Male
Cadence Design Systems May 2015 - Present
Skills
Simulation, EDA tool development, C/C++, Sparse Linear System, Numerical Methods, Matrix Solver, VLSI, Computer Aided Design, IC design, Power Electronics, Python, Behavioral Modeling, Matlab, Microsoft Office
Education
Texas A&M University 2013 — 2015
Master's Degree, Electrical and Computer Engineering, Male
Hewlett-Packard
SAP
Symantec
Intuit
HP
salesforce.com
Bloomberg LP
Autodesk